Single controller performs synchronous rectification post regulation I

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Single controller performs synchronous rectification post regulation I

Datasheet Thumbnail

Top Searches for this datasheet

COMBI-SYNC Secondary Side Synchronous Rectifier Regulator
Single controller performs synchronous rectification post regulation Independent regulation multiple outputs from common secondary winding Turn shoot through inherently eliminated Primary switch turns with zero current synchronising other signals needed across isolation boundary Eliminates need secondary bias supply Independent soft start, ON/OFF, remote sense current limit each output Resistive inductive current sensing with current signal 2.5V reference external applications. operation operating frequency profile TSSOP package Based Semtech's patent pending Combi Sync concept
SC4901
SC4901 unique secondary side regulator designed implementing Semtech's proprietary Combi-Sync topology isolated convertors with multiple outputs. Combi-Sync true all-MOSFET topology that allows synchronous rectification post regulation transformer isolated outputs, resulting higher efficiency component count. Details this unique topology described Application Information section. Multiple outputs synchronously rectified independently regulated individual SC4901s. Each output ON/OFF control, soft start, remote sense current limits. They turned without affecting primary other outputs. secondary side control makes much easier design tight control loops implement load current sharing swap features. devices synchronised transformer winding. current sense either from output inductor high efficiency resistor better accuracy. amplified current signal provided external use. Each device capable driving high side MOSFETs with current. forward drive configured direct connection pulse transformer. SC4901 undervoltage lockout with typical turn-on threshold 4.5V available cost TSSOP-16 package
Applications
Telecom isolated converters with multiple voltage outputs High density brick brick modules with independently regulated multiple outputs Distributed power architectures Isolated VRMs
Typical Application Circuit
FORW CONVERTOR
PGND
SSEN
4901
Revision 2004
www.semtech.com
SC4901
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding specifications below result permanent damage device, device malfunction. Operation outside parameters specified Electrical Characteristics section implied.
Parameter Supply Voltage Ground voltages Output Voltages common mode voltage AGND other pins AGND current into current into OUTA, XFRA Current Source Sink OUTB Current Source Sink Ambient Temperature Range Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering) Sec. Rating (Human Body Model)
Symbol AVCC, PVCC AGND PGND OUTA, XFRA, OUTB CS+, CSVZCD
Maximum +0.3V PVCC -0.3
Units
IZCD IRCT
+2.0
IOUTB TSTG TLEAD VESD
+1.0 +125 +150
Electrical Characteristics
Unless specified: 25°C,
Parameter Power Supply Operating Current Undervoltage Lockout Start Threshold UVLO Hysteresis Soft Start Enable Enable Threshold Charge Current Effective Discharge Current
Test Conditions
Unit
SSEN IOUTX
AVCC rising AVCC falling
VENA -ISS
0.55
0.65
0.75
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: 25°C,
Parameter VREF Reference Output Voltage Output Current Line Regulation Load Regulation Error Amplifier Reference Voltage Level
Test Conditions
Unit
85°C IREF AVCC IREF
85°C
0.74 0.735
0.750
0.76 0.765
V/µS
Input Bias Current Offset Voltage
ICOMP source ICOMP sink
Open Loop Gain
Unity Gain Bandwidth Slew Rate
Output High Voltage Output Voltage Frequency Range
Frequency range Frequency range
1000
Peak Voltage
Clamped internally
Valley Voltage
Timing Capacitor Discharge Current Current Limit Cycle Cycle Threshold Hiccup Mode Threshold Delay Output Current Amplifier offset VCAO VEA- falling
0.375
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: 25°C,
Parameter Output Drivers Output High Voltage OUTA Output High Voltage OUTB
Test Conditions
Unit
IOUTA Source IOUTB Source IOUTA Sink IXFRA Sink IOUTB Sink COUTA 2000 COUTB 1000
10.5 10.5
Output Voltage OUTA Output Voltage XFRA Output Voltage OUTB Rise Fall Time
OUTA Falling OUTB Rising
85°C
Notes: Assured design. tested production.
Configurations
Ordering Information
Part Number SC4901ITSTRT Package TSSOP-16 Temp. Range -40°C 85°C
VIEW
CSCAO SSEN AVCC OUTB XFRA PGND AGND VEAREF OUTA PVCC
Notes: Only available tape reel packaging. reel contains 2500 devices. Lead free product
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Descriptions
Name CSCAO SSEN AVCC OUTB XFRA PGND PVCC OUTA VEAVEA AGND Function Current sense inverting input differential current amplifier. Maximum differential Current sense inverting input differential current amplifier. Output differential current amplifier. Current limit threshold 2.5V this pin. Soft Start Enable pin. Taking this below 0.65V will shut down both gate drives Analog supply voltage. rating 18V. Gate drive side rectifying MOSFET. Transformer connection gate driver bidirectional forward MOSFET pair. High current sinking open collector terminal synchronised OUTA. Connect lower gate drive transformer this pin. Ground return gate drive currents. Power supply gate drive circuits. Bypass with minimum electrolytic Ceramic capacitor PGND. Gate drive high side bidirectional forward MOSFET pair. Reference voltage 2.5V external use. drawn from pin. Output voltage sense feedback error amplifier inverting input. Reference level 0.75V Error amplifier output feedback compensation. Connection timing resistor capacitor. Zero Crossover Detect. Detects transitions transformer secondary synchronises ramp components. Internally clamped AGND side Analog Ground signal return paths.
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Block Diagram
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Charecteristic Curves
Quiescent Current AVCC
8.000
Current Amplifier Offset Temperature
4.00
Quiescent Current
7.800 7.700 7.600 7.500 7.400 7.300 7.200 7.100 7.000
Current Offset (mV)
7.900
3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 -0.50 -1.00
AVCC Volts
Temperature (°C)
Internal Reference Temperature
0.7550 2.51 2.51 0.7530
External Reference Temperature
Internal Ref. (mV)
External Refernce
2.50 2.50 2.50 2.50 2.50
0.7510
0.7490
0.7470
0.7450
2.49
Temperature (°C)
Temperature (°C)
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Applications Information
Introduction
SC4901 voltage mode controller implementing secondary side synchronous rectification simultaneous post regulation forward convertors. Multiple outputs derived same transformer winding. Each output independently regulated modulating time forward MOSFET pair which acts bidirectional switch. introduction this unique Combi Sync topology presented later this section. device takes transformer secondary voltage clock input generates internal ramp. switching frequency maximum duty cycle always determined transformer waveform. output current sensed level differential input signal. amplified current signal device further current share swap applications. Overload protection achieved peak current limiting followed hiccup mode under short circuit. buffered 2.5V reference also system monitoring other purposes. controller implements classical trailing edge modulation outputs complementary signals that drive forward rectifying MOSFETs. high side outputs source peak current configured driving pulse transformer with duty ratios greater than 50%.
Undervoltage, Soft Start Enable
Since SC4901 specifically designed secondary side control, oscillator always derived from transformer winding. Special care must taken ensure that transformer voltage, with variations rise time, shape, magnitude duty ratio translated into steady ramp cycle cycle basis. SC4901 provides pins, RCT, this purpose. transformer voltage sensed Zero Crossover Detect pin. limiting resistor, Typical Application Circuit, from winding required limit input current into under conditions. comparators with hysteretic thresholds. comparator lower thresholds 0.75/0.25V other 3.5V/2.5V. Together they ensure proper turn turn timings forward rectifying FETs. There also internal clamp which prevents voltage from going below zero. Ensure that forced into negative voltage external circuits.
SINGLE ENDED FORWARD CONVERTOR
XFRA
SSEN
PGND
AVCC
SC4901
SC4901 operating range 4.5V with undervoltage lockout. conditions must before controller operational. input supply should above undervoltage threshold 4.5V SSEN should above 0.65V typical. not, device deactivated outputs held active low, SSEN pins also held low. controller standby mode draws only quiescent current typical. Once undervoltage threshold been exceeded SSEN released, soft start capacitor charged constant current follows SSEN voltage output gradually ramps Once SSEN charges 3.3V, soft start cycle complete device fully operational.
Generating Zero Crossover Detect (ZCD) Timing Ramp (RCT) signals timing capacitor connected AGND charging resistor connected source, which typically derived from transformer voltage. Refer Typical Applications Circuit first page. clamped peak internally ramp operates between high side forward pulse terminated whenever ramp hits peak.
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Ensure that ramp reaches this peak only after negative transition transformer voltage, even under worst case conditions high line maximum applicable duty ratio. Otherwise available pulse width post regulation will limited. other hand, timing capacitor should charged fully prior positive transition transformer voltage. This will ensure that dead time between rectifying forward gate drives consistently maintained. Ideally ramp should charged peak just after falling edge transformer secondary voltage that voltage error amplifier output utilises full range This shown idealised waveforms below.
Turn Sequence
Prior transformer voltage going positive, ramp capacitor maximum 3.0V. rising edge transformer secondary, 0.75V detected first OUTB gate drive goes which turns side rectifying (Fig. Simultaneously current sink activated discharge timing capacitor lower threshold This discharge time provides delay between turn rectifying turn forward MOSFETs given
DLon
where ramp capacitor value DLon dead time actual dead time extended propagation delays internal controller, which should taken into account while choosing propagation delays typically range tens nanoseconds. When goes down discharge stopped timing capacitor charges back Meanwhile, rising edge pin, higher threshold 3.5V detected. Once both these conditions have been met, OUTA goes high, XFRA forward FETs turned capacitor typically charged from transformer secondary voltage through Having chosen meet dead time requirements, chosen that ramp voltage just below 3.0V peak maximum time.
VOLTAGE
INPUT
Const÷
where
Idealised waveforms idealised waveforms above easier implement transformer some form constant volt-second operation control; secondary voltage directly used charge timing capacitor transformer operates open loop with constant time, recommended that timing capacitor charged from constant voltage. maximum input current into under clamped conditions should limited
2004 Semtech Corp.
Vsec Peak value transformer secondary voltage Switching frequency Operating duty cycle which Vsec applied primary side modulated feedback loop volt second clamp, term Vsec constant. free running with fixed duty cycle, maximum value Vsec. formula assumes that Vsec much larger than ramp voltage 3.0V. lower secondary voltages, smaller value
www.semtech.com
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Output Error Amplifier
reference level output voltage feedback 0.75V bandgap. This amplified, buffered 2.5V output. voltage used external monitoring circuits regulating output voltages less than 0.75V. output error amplifier swing between 0.3V 2.9V, just below clamped peak timing ramp. should bypassed AGND with ceramic capacitor. maximum drawn from output.
Delays Turn Sequence
When 2.5V limit reached pin, bidirectional forward switch QS/QF turned rest cycle. rectifying kept throughout discharge high inductor current. overload level increased, time continues reduce output drops gradually. output continuously monitored undervoltage when falls below nominal voltage, abnormal condition detected both outputs shut down. soft start capacitor discharged current sink down 0.8V which point soft start cycle initiated restart convertor. This effectively provides hiccup mode protection under short circuit.
Output Drivers
delay between turn rectifying MOSFET turn forward MOSFETs determined discharge ramp capacitor through current. other delay, between turn forward MOSFETs turn rectifying MOSFET fixed typically This delay valid when output regulation forward FETs turned comparator. During transients output loses regulation, will turned falling edge transformer voltage. First, high comparator detects 2.5V threshold pulls down OUTA. This turns forward FETs. Further down, lower comparator detects 0.25V threshold turns OUTB. This ensures that forward pair before transformer voltage goes negative.
Current Sense Current Limit
There complementary outputs designated Output XFRA drives that control bidirectional forward MOSFETs. complementary output driving ground referenced rectifying MOSFET designated OUTB. This drive capable sourcing sinking +1A. OUTA enabled when transformer voltage turns voltage exceeds 3.5V. turned three conditions. ramp voltage exceeds error amplifier output detects that transformer voltage turning gone below 2.5V overcurrent detected 2.5V pin. these cases OUTA XFRA turned and, after fixed delay rectifier MOSFET turned Both OUTA XFRA sink source peak current.
VOUT
Current sensing done input uncommitted differential amplifier. current limit threshold 2.5V pin. This allows user considerable flexibility design current sensing circuit. very value sense resistor which results current signal tens millivolts inductor drop sensing used simple protection maximum efficiency. current amplifier gain correspondingly higher. larger current sense signal with lower gain preferred better noise immunity more precise current limit. Maximum recommended differential input minimum differential gain current amplifier ensure proper operation. output typically full load. This signal brought used further current sharing applications. current sense pins have maximum common mode range AVCC
FORW VERTOR
OUTA
PVCC
XFRA
Driving Pulse Transformer using XFRA OUTA
2004 Semtech Corp. www.semtech.com
SC4901
AZCD
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Since OUTA drive level shifted MOSFET gate, must used with pulse transformer. Another called XFRA provided simplify gate drive design with transformer. XFRA configured high current open collector transistor turned synchronously with OUTA. maximum duty cycle expected less than 50%, pulse transformer connected directly between OUTA XFRA. This ensures that gate always driven with PVCC during both periods. Schottky ultrafast rectifier should connected reverse across XFRA transistor. Refer Fig. This required discharge MOSFET gate rapidly during turn off. addition, smaller signal diode should connected from XFRA PVCC supply reset driver transformer. This diode rated carry magnetising current drive transformer. Refer maximum duty ratio more than ceramic added series transformer primary shown capacitor carries small voltage only when duty ratio more than 50%. Note that common source high side FETs presents negative voltage return high side drive circuit therefore semiconductor driver recommended this application. drive circuits powered separate supply ground pair, designated PVCC PGND. Adequate independent noise bypassing both AVCC PVCC corresponding grounds strongly recommended.
Reference Design Typical Waveforms Layout Guidelines
Combi Sync topology SC4901 intended multi output convertors demand careful attention good layout practices. topology inherent advantage that switching circuits naturally operate same frequency primary controller. operating duty ratio different different outputs this cause unexpected interferences. Make sure that currents path kept separate returned single node transformer end. High current returns from output should isolated from signal current returns going into AGND pins other outputs. dedicated ground plane strongly recommended improve noise immunity. SC4901 requires clean synchronising signal ensure proper operation. There several sources that contribute noise this pin. traces from transformer terminals corresponding drain source pins must kept absolute minimum. When FETs turned OFF, current transformer secondary winding subjected rapid rate di/dt. Long traces that encompass wide areas have higher parasitic lead inductances. combination rapid di/dt large parasitic inductance spike transformer waveform which confuse lead random transitions output. series resistor shown Typical Application Circuit should have separate connection transformer secondary terminal where source waveform relatively free distortions. primary side layout also requires special attention. Excessive ringing spikes primary side will reflected secondary interfere with controller operation. important physically separate primary secondary circuits separate ground planes minimise interference. drive transformer forward FETs contribute significantly overall performance. fast rise fall times switching losses, choose driver with inductances. traces from transformer OUTA XFRA pins must kept short minimise overall inductance drive path.
complete schematic secondary side channel delivering 3.3V/10A shown Typical waveforms shown Figs These waveforms were taken dual output convertor with input transformer turns ratio 6:1. outputs were rated 3.3V/10A 2.5V/10A. special interest primary side waveforms shown zero current turn clearly seen. During turn off, current decreases 2.5V forward FETs turn first, followed 3.3V output. last small step final turn represents magnetising current transformer primary.
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Secondary side schematic 3.3V/10A output.
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Transformer secondary voltage ramp
Transformer scondary voltage (top), rectified output 2.5V (center) rectified output 3.3V (bottom)
Transformer scondary voltage (top), OUTA gate drive forward MOSFET pair (center) OUTB gate drive rectifying (bottom)
Primary MOSFET waveforms Drain Source Voltage (Blue) Current (green)
2004 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Combi-Sync Topology
Combi-Sync unique secondary side topology that overcomes most problems associated with synchronous rectification isolated outputs. also incorporates synchronous post regulation, making ideal solution voltage, high current outputs. Independently regulated multiple outputs derived from common transformer winding. output stage replaces conventional rectifiers regulators with three MOSFETs, which switch zero voltage. topology inherently eliminates turn shoot through without complicated timing look ahead circuits maximise efficiency. secondary switching circuits naturally synchronised primary which simplifies noise suppression. There separate synchronising, current sensing gate driving signals crossing isolation boundary. most cases, there will need separate bias supply secondary side further simplifying system design. primary side Combi-Sync circuit typical single ended forward convertor which regulated free running. additional benefit Combi-Sync topology zero current turn turn primary MOSFET well. free running mode preferred when there multiple outputs without minimum load cross regulation constraints. Input voltage feedforward recommended achieve volt-second clamp minimise core losses free running mode.
Background Synchronous Rectification Post Regulation
Isolated Synchronous Rectification that conduct synchronously only while transformer being reset. Thereafter there gate voltage drive circuit must employ diode. Secondly since gate voltages, peak transformer secondary, must with 4.5V under conditions, scheme fail lower voltage wide input ranges. alternative control driven approach where synchronous controller provides gate drive. This provides loss conduction over entire cycle limited output input ranges. However without problems. instant transformer voltage turns positive body diode gets forward biased. same time, would also fully conducting result shorted winding just when primary switch trying turn prevent catastrophe necessary turn prior transformer voltage going positive. This requires advanced signal from primary side crossing isolation boundary. Attempts have been made avoid this complex timing look ahead circuits secondary side itself several patents have been issued them. should understood that these techniques isolated synchronous rectification have been restricted single unregulated secondary output. existing circuits only rectify output synchronously regulate further. possible generate multiple outputs from same winding. Post regulation isolated outputs been implemented using either saturable magnetic inductor power MOSFET series with forward diode. saturable magnetic element bulky inefficient high frequencies. circuit with series MOSFET widely known well documented. shows standard implementation.
www.semtech.com
synchronous rectifier technology widely used isolated DC-DC convertors been limited isolated convertors because various difficulties. example synchronous rectification secondary side forward convertor shown parasitic body diodes their respective FETs. forward MOSFET turned when transformer secondary voltage goes positive rectifying MOSFET turned when transformer secondary negative. approaches have been used drive MOSFETs. self driven scheme where transformer secondary itself provides gate voltage appropriate FET. While scheme simple very cost, several limitations.
2004 Semtech Corp.
SC4901
POWER MANAGEMENT Applications Information (Cont.)
series turned controlled manner synchronously with secondary waveform. width time pulse varied regulate output.
After forward FETs turned OFF, rectifying turned after short delay. continues conduct until beginning next cycle when transformer secondary voltage goes positive again. modulating time high side power MOSFETs output regulation achieved. This arrangement MOSFETs their control provides highly efficient combination synchronous rectification simultaneous control isolated secondary voltages.
Trailing Edge Modulation
Synchronous Post Regulation Again should understood that previous attempts have used synchronously rectified secondary. That transformer secondary rectified using power diodes series MOSFET added synchronously regulate further.
Combi Sync Technique
Combi Sync, name indicates unique secondary configuration that combines synchronous rectification post regulation transformer isolated multiple secondary voltages. proposed implementation well typical waveforms shown next page. highlights operation follows Prior transformer voltage going positive, rectifying MOSFET conducting. When voltage goes positive, turned OFF. After delay, both turned This delay prevents both high side FETs conducting same time shorting secondary winding. forward pair acts bidirectional switch turned controlled manner irrespective polarity transformer voltage. This topology. With SC4901 forward pair turned following conditions active duration peak current crosses overload limit iii) transformer secondary voltage begins fall.
Combi Sync topology offers option both leading trailing edge modulations achieve synchronous post regulation. With leading edge modulation, turned during forward mode, with dictated delay, turn synchronised falling edge transformer voltage. This results zero current turn primary switch hard turn with full load. other hand, conventional secondary side post regulation, trailing edge modulation results hard turn zero current turn primary switch. However, Combi Sync topology already inherent turn delay forward FETs secondary side. This ensures zero current turn primary switch, irrespective modulation scheme used. therefore advantageous trailing edge modulation which results both zero current turn turn primary switch. some form used primary control, switching losses eliminated primary side. Trailing edge modulation method employed SC4901.
Switching Waveforms
Theoretical switching waveforms Combi Sync topology shown next page. first transformer secondary voltage which acts reference. Second third gate drives forward rectifying FETs respectively. Rectified pulse width modulated output that appears before filter stage shown next. Notice that this rectified output rises after delay which crucial isolated synchronous rectification. simple isolated synchronous rectifiers, there begins conduct (initially through body diode) same instant transformer voltage going positive. Transformer secondary inductor currents also shown. delay T1-T0 capacitor T3-T2 delay fixed internally SC4901
www.semtech.com
2004 Semtech Corp.
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Theoretical waveforms Combi Sync topology
Vsec
GATE
Vsec
Driv
Driv
ECTIF SECON TAGE POST ATION
urne inst ched inding urne This Pulse Widt dula gulat urne Turn dela prev thro
www.semtech.com
2004 Semtech Corp.
SC4901
POWER MANAGEMENT Applications Information (Cont.)
Features Applications Combi Sync Circuit with SC4901
Combi Sync topology quite versatile number useful features There connection between primary secondary sides. synchronising signals, drive pulses, voltage current information needs exchanged across isolation boundary. bias supply controller also generated secondary side, eliminating additional burden power bias supply. SC4901 designed operate over range 4.5V AVCC supply which typical range MOSFET gate drives. multiple secondary windings, each winding have synchronous MOSFETs each controlled individual SC4901 generate independently regulated outputs. There cross regulation minimum load requirement, each output turned independently others. Placing controller secondary side also helps optimise transient response. possible have multiple sets synchronous FETs attached same transformer secondary control them individually shown This multiple secondary outputs with common ground regulated same secondary winding. secondary switching synchronised automatically with transformer waveform. There only switching frequency convertor which simplifies filter design. Zero current switching primary further reduces switching noise generated primary side. number options used generate control transformer secondary voltage. primary free running, that without being regulated feedback loop. further employ constant volt second operation reduce magnetic stresses. this mode duty cycle always optimum value maximise efficiency. primary regulated feedback loop outputs; such regulation will typically employ voltage mode average current mode control. Note that peak current mode control suitable with trailing edge modulation.
2004 Semtech Corp.
necessary drive forward FETs through transformer interface. common source devices floating return will swing peak negative voltage appearing transformer secondary; Vsec waveform 11). This negative swing does allow semiconductor device used driving forward pair. additional called XFRA provided SC4901 simplify design driver transformer interface, particularly with duty ratios >50%. XFRA open collector sink which turns simultaneously with OUTA. load condition output needs special consideration this topology. Under light load, inductor current negative synchronous rectifier. When synchronous MOSFET turned off, current interrupted tends charge drain source capacitor back back connected forward FETs prevent this current being returned source. resulting overshoot clamped connecting zener diode combination across inductor shown zener clamp conducts only during dead time also provides small benefit reducing voltage across forward FETs during turn detailed application schematic shows diode zener connected across output inductor reduce load spike.
GATE DRV1
GATE DRV2
GATE
Generating Multiple Outputs from same secondary winding using Combi Sync Topology
www.semtech.com
SC4901
POWER MANAGEMENT Outline Drawing TSSOP-16
Land Pattern TSSOP-16
Contact Information
Semtech Corporation Power Management Products Division Flynn Road, Camarillo, 93012 Phone: (805)498-2111 (805)498-3804
2004 Semtech Corp.
www.semtech.com

Single controller performs synchronous rectification post regulation I

Top Searches for this datasheet

Other recent searches