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BluetoothTransceiver FEATURES component ISSI's family complete ha


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IS11LV5010
BluetoothTransceiver
FEATURES component ISSI's family complete hardware
software BluetoothSolutions
ISSI
DESCRIPTION
PRELIMINARY INFORMATION JUNE 2003
Complete 2.45GHz radio transceiver lowest-cost
CMOS silicon
Complete BluetoothGFSK data modem Compliant BluetoothSpecification
BlueRFinterface
Integrated PLL, VCO, resonator, channel filter Low-IF approach minimize offset Built-In AutoTune circuity analog filters Direct up-conversion stable modulation index
ISSI IS11LV5010 low-cost, fully integrated CMOS radio frequency (RF) transceiver GFSK data modem optimized Bluetoothcommunications applications globally available 2.4-2.5 band. contains transmit, receive, functions, including on-chip channel filter resonator minimizing need external components. IS11LV5010 used stand-alone conjunction with ISSI's complete Bluetoothsolution that includes Baseband chipsets, antennas, software protocol stacks reference designs. IS11LV5010 fully compliant with BluetoothSpecification 1.1, class operation, which allows output power. low-IF receiver architecture produces offsets spur below dBc. IS11LV5010 produces in-band spurious signals that allow class operation simply adding power amplifier. RSSI values available monitor channel quality. count baseband interface complies with BlueRFstandard bi-directional communication, allowing interoperability with various baseband components. consists three wire transmit, receive control data, three-wire serial data general control data, power management. Additionally, recovered-clock recovered-data signals available externally. longer battery life, power consumption minimized providing separate power controls transmit, receive, PLL, sections, well sleep mode reduce standby battery usage. This product available 48-lead JEDEC standard package, featuring exposed bottom best characteristics.
2MHz spur below -40dBc class operation Package: Power management minimizing current consumption Support RSSI output power control APPLICATIONS
Battery Powered Portable Hand held Devices Laptop Computers PDAs Modems Internet Access Points Cordless Cellular Phones
Bluetoothand BlueRFare trademarks owned Bluetooth SIG, Inc. used ISSI under license. PCMCIAand CompactFlashare trademarks their respective organizations. Copyright 2003 Integrated Silicon Solution, Inc. rights reserved. ISSI reserves right make changes this specification products time without notice. ISSI assumes liability arising application information, products services described herein. Customers advised obtain latest version this device specification before relying published information before placing orders products.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
PRELIMINARY INFORMATION Rev. 06/10/03
IS11LV5010
ISSI
Block Diagram
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Absolute Maximum Ratings
Ratings
Parameter Symbol
Operating Temperature Storage Temperature Supply Voltage Applied Voltages Other Pins Input Level Output Load mismatch (Z0=50) TSTORAGE VSUPPLY VOTHER -0.3
Rating
+125 +3.0 +3.0
Unit
VSWROUT
10:1
VSWR
Notes:
Absolute Maximum Ratings indicate limits beyond which damage device occur. Recommended operating conditions indicate conditions which device intended functional, guarantee specific performance limits. guaranteed specifications test conditions, Electrical Characteristics section below. These devices electro-static sensitive. Devices should transported stored anti-static containers. Equipment personnel contacting devices need properly grounded. Cover work benches with grounded conductive mats.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Electrical Characteristics
following specifications guaranteed 2.50 0.25 VDC, unless otherwise noted: Parameter Symbol Specification Units Test Condition Notes
Current Consumption Current Consumption Current Consumption Current Consumption IDLE IDD_TX IDD_RX IDD_SB IDD_SYNTH Current Consumption SLEEP Current Consumption STATE (BnPWR=0) Digital Inputs Logic input high Logic input Input Capacitance Input Leakage Current Digital Outputs Logic output high Logic output Output Capacitance Output Leakage Current Rise/Fall Time C_OUT I_LEAK_OUT T_RISE_OUT C_IN I_LEAK_IN IDD_SLP IDD_ST0 IDD_ST0n
POUT nominal output power
Synthesizer VCO: (see Reg. Synthesizer VCO: (see Reg. Clock (pin still applied Clock (pin removed Clock (pin still applied
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Symbol Specification Units Test Condition Notes
Parameter
Clock Signals BRCLK output frequency BRCLK Depends Register setting: Always either during always. Same OSCIN frequency tolerance Required error-free register reading, writing. serial (3-wire bus) clock freq. range.
BRCLK tolerance BDCLK rise, fall time BDCLK frequency range Overall Transceiver Operating Frequency Range Input mismatch Output mismatch Receive Section
T_BRCLK
BDCLK
F_OP VSWR_I VSWR_O
2400 <2:1 <2:1
2482
VSWR VSWR Z0=50 Z0=50 RXDATA pin, using baseband clock recovery. 0.1%:
Receiver sensitivity Maximum useable signal Input order intercept point Data (Symbol) rate Min. Carrier/Interference ratio Co-Channel Interference Adjacent Interference, 1MHz offset CI_cochannel CI_1 IIP3
Meas. antenna
0.1% desired signal. desired signal.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Symbol Specification Units Test Condition Notes
desired signal.
Parameter
Adjacent Interference, 2MHz offset Adjacent Interference, 3MHz offset Image Frequency Interference Adjacent (1MHz) interference image Out-of-Band Blocking 2000 2000 2400 2500 3000 3000 12.75 Transmit Section Output Power Modulation Characteristics Frequency Deviation Zero Crossing Error In-Band Spurious Emission (+/- 550kHz) 2MHz offset >3MHz offset
CI_2
CI_3
desired signal.
CI_Image
desired signal. Image freq. always higher than desired signal. desired signal. Always higher than desired signal. Meas. with ceramic filter ant. pin:
CI_Image_11
OBB_1 OBB_2 OBB_3 OBB_4
Register bits (Power level
Pout
Power Level Meas. antenna
FDEV ZCERR
-125
Peak deviation Symbol Period
IBS_1 IBS_2 IBS_3
(+/- 550kHz) 2MHz offset >3MHz offset
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Symbol Specification Units Test Condition Notes
Parameter
Out-of-Band Spurious Emission, Operation 30MHz 1GHz 1GHz 12.75GHz 1.8GHz 1.9GHz 5.15GHz 5.3GHz Section Typical Lock range Frequency Tolerance Channel (Step) Size Phase Noise FVCO 2390 -115 Reference Frequency OSCIN Reference Frequency OSCIN Voltage required 2500 dBc/Hz dBc/Hz 550kHz offset 2MHz offset Must always 13.000 MHz. Must integer multiple MHz. Min. voltage level needed fully functional PLL's, coupled into 1.25 1.25
THOP
OBS_O_1 OBS_O_2 OBS_O_3 OBS_O_3
Excludes desired signal.
Same OSCIN frequency tolerance
Sine wave wave
Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p
Sine wave wave
Sine wave Sine wave
Settling Time
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Symbol Specification Units Test Condition Notes
IDLE state. Synthesizer OBS_1 OBS_2
Parameter
Out-of-Band Spur. Emissions 30MHz 1GHz 1GHz 12.75GHz
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Description
Name
TR_SW_EN
Type
Description
Control signal external switch. Logic polarity determined register Power supply voltage. Ground connection. Power supply voltage. Ground connection. Differential Transmit output Ground connection. Receiver input. Ground connection. Power supply voltage. Ground connection. Power supply voltage. Ground Connection. Power supply voltage. Ground Connection. CONNECT. Reserved factory test. Ground Connection
Interface
TEST
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
BRCLK
Type
Description
Outputs either 1MHz symbol clock, APLL output.
Interface
BPKTCTL
transmit state this turns PA_ON receiving high signal from baseband. receive state, this controls estimation behavior different states: state used estimation fast acquisition high state used slower fixed estimation.
RXDATA
Receiver data output, Mbps. Same BDATA1 output, with extra stage filtering. extra filter results less jitter longer receiver delay, compared BDATA1 output. Receiver symbol clock recovery output. Fixed fundamental rate. Useful clocking RXDATA signal, above. CONNECT. Reserved factory test.
RXCLK
TEST-SE
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
BXTLEN
Type
Description
This sets chip into SLEEP state supplying signal.
Interface
TEST3 BnDEN
Reserved factory test. Enable line 3wire bus. Active low.
TEST4
CONNECT. Reserved factory test. Data line 3wire bus. Sets digital voltage. +2.5 +3.3 VDC. Clock line 3wire bus.
BDDATA
VDDIO
BDCLK
BnPWR
When BnPWR low, chip will state power consumption very low. When raised high, BnPWR used turn chip, restoring registers their default value.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
BDATA1
Type
Description
transmit mode, this receives transmit data from baseband. will sampled Msps. Sample clock derived from OSC_IN signal. Sampling begins with Data Sync pulse. receive mode, this sends receive data baseband Mbps data rate. This also used initialize chip into IDLE.
Interface
TEST6,
Power supply voltage. Ground connection. Power supply voltage. CONNECT. Reserved factory test.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
XTL_OSCIN
Type
Description
Reg. (XTAL_OSC_EN) Crystal oscillator input, from reference oscillator. sine square wave. square wave, some rounding edges preferable, reduce transmit spurious products that offset from carrier MHz. Reg. (XTAL_OSC_EN) Connect quartz crystal from this ground, on-chip negative resistance oscillator will oscillate. sure "communicationsgrade" crystal, app. note. Also place variable capacitor from this ground manually trim crystal frequency, necessary. Power supply voltage. Ground connection. CONNECT. loop filter internal. Ground connection. Power supply voltage.
Interface
PLL_LPF
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
Exposed
Type
Description
Ground connection.
Interface
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Serial Register Interface
additional information, please refer Application Note AN5000
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Field Device Address Read/Write Register Address Data Field Comments Always Write, Read. registers configured "WRITE" mode, outputs it's register contents "READ" mode.
3-Wire Protocol
Bits (A7:A5) (A4:A0) (D15:D0)
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
State Diagram
additional information, please refer Application Note AN5000.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Detailed Register Information
Estimator Control (Write/Read) Register (Default =0x1000)
Name
(reserved) BPKTCTL_TC_DC [1:0]
Description
(reserved) time constant estimation circuit, after BPKTCTL asserted. Please note setting select fixed offset value that calculated before BPKTCTL asserted. register also.
TC_DC [1:0]
time constant estimation circuit, before BPKTCTL asserted. (reserved)
(reserved)
BPKTCTL_TC_DC [1:0]
Symbols
Fixed offset value (requires register setting)
TC_DC [1:0]
Symbols
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
(reserved) RD_LNA_GAIN
Synthesizer Status (Read only) Register
Description
(reserved) 2-bit Gain Control dB/step. Baseband read back gain controlled local circuit. RF_SYNTH_LOCK original output signal from synthesizer indicate lock status. 10-bit compliment offset adjustment. Baseband read back offset adjustment value estimated local estimation circuit.
RF_SYNTH_LOCK
RD_DC_ADJ [9:0]
Configure (Write/Read) Register (Default 0x0406)
Name
(reserved) PGA_PARA_OW
Description
(reserved) When indicates BBIC overwrites adjustment value (reserved) When indicates BBIC overwrites adjustment value. DC_PARA_OW allow chip track frequency drift receive input signal.
(reserved) DC_PARA_OW
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
RF_STATE[4:0] RD_PGA [2:0]
RFIC State (Read only) Register
Description
Read status finite state machine. 3-bit control (-10/+40 dynamic range. Baseband read back setting, which controlled local circuit. 8-bit RSSI value with time constant baseband. value read long term averaging control transmit power
RSSI_LTERM [7:0]
RF_STATE
Binary [4:0] 00000 00001 00010 00011 00100 00101 01000 01001 01010 01011 10000 10001 10010 10011 10100 10101 10110 10111 11000 Decimal
STATE
PwrOnWaitXTL HoldXTL Idle Sleep SleepWaitXTL RXPLLWait1 RXPLLWait2 RXWideFilt RXNarrowFilt WaitDataSync1 WaitDataSync2 DataSync EnblePA1 EnblePA2 TXData DisablePA1 DisablePA2 DisablePA3
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
(reserved) WT_LNA_GAIN[1:0]
Receiver Control (Write/Read) Register (Default 0x0030)
Description
(reserved) 2-bit Gain Control dB/step. Active only when PGA_PARA_OW register set. normal operation, receive gains controlled local circuit. 3-bit control (-10/+40 dynamic range dB/step. Active only when PGA_PARA_OW register set. normal operation, receive gain controlled local circuit.
WT_PGA [2:0]
WT_LNA_GAIN [1:0]
Gain (dB)
Defined
WT_PGA [2:0]
Gain (dB)
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
SYNTH_ON_DELAY_CN T[4:0]
RFIC Control (Write/Read) Register (Default 0x4D0C)
Description
state WAIT DATA SYNC, oscillator will enabled first. There time offset controlled counter SYNTH_ON_DELAY_CNT. When counter counts zero SYNTH_IDLE_OFF synthesizer will enabled. Each time increment
(reserved) REG_PROTECT
(reserved) used protect registers from accidental change. REG_PROTECT (default), only registers this REG_PROTECT bit, modified. REG_PROTECT registers modified.
RX_DELAY
Receive delays from receiving synthesizer program register start transmit BDATA1 BBIC. Each time increment
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
DC_LONGTERM [15:0]
Estimator (Read only) Register
Description
16-bits compliment offset long-term averaged value. Baseband read back offset long-term averaged value estimated local estimator circuit.
Synthesizer, Tx/Rx Control (Write/Read) Register (Default 0x0030)
Name
Reserved SWALLOW [4:0]
Description
5-Bits Synthesizer Swallow counter. synthesizer will programmed directly with Register [13:9] Register [6:0]. Valid only when RF_PLL_DIRECT (register Enable Transmit Sequence state machine control. Note that TX_EN RX_EN cannot HIGH same time. Enable Receive Sequence state machine control. Note that TX_EN RX_EN cannot HIGH same time.
TX_EN
RX_EN
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
RF_PLL[6:0]
Description
When RF_PLL_DIRECT (register synthesizer will programmed directly, using both Register [13-9] Register [6:0]. Register [6:0] used 7-bit synthesizer program counter. When RF_PLL_DIRECT (register these bits channel number. Transmit receive carrier frequency will 2402+ PLL_CH_NO. this case, SWALLOW bits will ignored.
RF_PLL_CH_NO [6:0]
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
(reserved)
Reserved (Write/Read) Register (Default 0x1676)
Description
(reserved)
RFIC Control (Write/Read) Register (Default 0x6803)
Name
SYNTH_ID [4:0]
Description
Synthesizer input reference clock divider, ranging from valid) (reserved) Transmit power level (reserved) Analog power-down mode. When APLL power-off Selects BRCLK output signal: BRCLK_SEL (default), BRCLK always outputs 12MHz APLL output. BRCLK_SEL BRCLK outputs TXCLK MHz).
(reserved) PA_CTRL [2:0] (reserved) APLL_PD
BRCLK_SEL
(reserved)
(reserved)
PA_CTRL (Power level)
Binary [2:0] Decimal
Typical Power Amplifier Output Level,
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
PA_CTRL (Power level) Typical Power Amplifier Output Level,
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
(reserved)
Reserved (Write/Read) Register (Default 0x0004)
Description
(reserved)
On-chip Oscillator (Write/Read) Register (Default 0x4040)
Name
(reserved) XTAL_OSC_EN
Description
(reserved) When set, enable internal oscillator circuit.
In-chip Oscillator (Write/Read) Register (Default 0x9000)
Name
XTAL_EX_TUNE[2:0] (reserved) XTAL_LOAD[2:0] XTAL_BIAS_EN (reserved)
Description
Fine tune external Xtal.(default 100) (reserved) When on-chip xtal load. When set, switches bias point. (reserved)
Reserved (Write/Read) Register (Default 0x0000)
Name
(reserved)
Description
(reserved)
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
TX_MOD_OFF_DELAY
Timing (Write/Read) Register (Default 0x0200)
Description
These registers initial value counter modulator power-off control. counter begins decrease zero just after that turn PA-OFF state, modulator turn when zero reached. Each time increment (reserved)
(reserved)
Reserved (Write/Read) Register (Default 0X7193)
Name
(reserved)
Description
(reserved)
Reserved (Write/Read) Register (Default 0XC9CF)
Name
(reserved)
Description
(reserved)
Reserved (Write/Read) Register (Default D3D7)
Name
(reserved)
Description
(reserved)
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
SOFTWARE_CNTL
Control (Write/Read) Register (Default 0x0000
Description
this enable software control transmit sequencing modulator, switch, based values TX_MOD_ON_DELAY, TX_PA_ON_DELAY TX_SW_ON_DELAY respectively. Default setting select hardware state machine control sequencing.
DC_CNTL[1:0]
Select fixed offset value after BPKTCTL asserted; however, this value computed before preamble period opposed setting 13-12 Register Select symbols time constant compute offset values after BPKTCTL asserted. Select enable BPKTCTL_DC_TC (bit 1312 Register setting.
(reserved) ALTRXCLK_SEL
(reserved) Select normal RXCLK phase (rising edge RXCLK coincides with rising edge RXDATA). RXCLK phase MHz-clock-cycles later than usually It's used sampling RXDATA closer middle symbol time.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
TX_DATA_INVERSE
Description
Internal SGN5010, transmit data inverted, setting TX_DATA_INVERSE=1 restores normal data polarity (0=space; 1=mark). SOFTWARE_CTRL this delay from rising edge BPKTCTL, Modulator turning SOFTWARE_CTRL this sets timing delay Modulator turning after BPKTCTL asserted. Each time increment
TX_MOD_ON_DELAY [7:0]
Reserved (Write/Read) Register (Default 0x0000)
Name
(reserved)
Description
(reserved)
Reserved (Write/Read) Register (Default 0x83E0)
Name
(reserved)
Description
(reserved)
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
(reserved) RF_VCO_IDLE_OFF
Synthesizer Control (Write/Read) Register (Default 0x0962)
Description
(reserved) RF_VCO_IDLE_OFF will shutdown while state machine Idle state. This saves power, longer settling time required when automatically powered Transmit Receive. RF_VCO_IDLE_OFF stays even when state machine Idle state. While this consumes more power, there extra settling time required when transmit receive desired.
SYNTH_IDLE_OFF
SYNTH_IDLE_OFF synthesizer will shutdown while state machine Idle state. This saves power, longer settling time required when synthesizer automatically powered Transmit Receive. SYNTH_IDLE_OFF synthesizer stays even when state machine Idle state. While this consumes more power, there extra settling time required when transmit receive desired.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
RF_PLL_DIRECT
Description
RF_PLL_DIRECT transmit receive carrier frequency will programmed MHz, with Register [6:0] [13:9]. RF_PLL_DIRECT transmit receive carrier frequency will programmed channel number. Carrier frequency PLL_RF_FREQ_BASE PLL_CH_NO.
PLL_RF_FREQ_BASE
RF_PLL_DIRECT this sets frequency channel Default 2402 MHz. RF_PLL_DIRECT this value ignored.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
TX_PA_ON_DELAY
Timing Control (Write/Read) Register (Default 0x0A02)
Description
SOFTWARE_CTRL this delay from Modulator turning turning SOFTWARE_CTRL this sets timing delay turning after BPKTCTL asserted. Each time increment
TX_PA_OFF_DELAY
These registers initial value counter power-off control. When state PA-OFF counter decreases zero, will turn OFF. Each time increment
Timing Control (Write/Read) Register (Default 0x0302)
Name
TX_SW_ON_DELAY
Description
SOFTWARE_CTRL this delay from turning switch position. SOFTWARE_CTRL this sets timing delay Switch after BPKTCTL asserted. Each time increment
(reserved)
(reserved)
Reserved (Write/Read) Register (Default 0x0000)
Name
(reserved) (reserved)
Description
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Name
(reserved) (reserved)
Reserved (Write/Read) Register (Default 0x3000)
Description
Receiver Control (Write/Read) Register (Default 0x0022)
Name
(reserved) BDATA1_SW (reserved)
Description
"1": route RXDATA output BDATA1 during receive mode. (reserved) "1": route inverse version RXCLK BRCLK pin, achieve BlueRFcompatibility. (reserved)
(reserved) BRCLK_SW
(reserved)
Receive RSSI Value (Read only) Register
Name ADJ_RSSI[7:0] RSSI_IN[7:0] Description Instantaneous RSSI value, which adjusted compensate current gain gain. They represent RSSI values generated analog circuit (not adjusted gain).
Reserved (Write/Read) Register (Default 0x6C00)
Name
(reserved) (reserved)
Description
Revision Number (Read only) Register
Name
REVISION_NUMBER
Description
Reading "0000000000000011" represents revision
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Rev. 06/10/03
IS11LV5010
ISSI
Manufacture's Code (Read only) Register 30(0x8E8E)
Name
ID_CODE_L [15:0]
Description
Lower 16-bit Manufacture's code.
Manufacture's Code (Read only) Register 31(0x10C0)
Name
ID_CODE_L [31:16]
Description
Upper 16-bit Manufacture's code.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
IS11LV5010
ISSI
Typical Bluetooth Tranceiver Application
Regulated +2.5
+2.5V_RF
100uF SMD-D
0.10uF 1.5uH S0805
Notes: denotes CONNECT.
0.10uF +2.5VA
Panasonic 0805 (2012) type Q>15@8MHz, SRF>100MHz 1.85
13_MHz
+2.5VD
+2.5VD
+2.5VA 39nF 0.10uF BDATA1 39nF
3.3uH 0805 10nF
+Vddio
+2.5
100pF
CONNECT
TEST7 XTL_OSC TEST8 TEST6
SGN5010
BDATA1
1=Rx 0=Tx
QFN48 exposed pad, 0.5mm pitch
TR_SW TR_SW*
BnPWR BDCLK TEST4
0.10uF
BnPWR BDCLK
Baseband Interface
Corp. BL2012-05B2450 Unbal. Bal. <1.0 2400 2500 VSWR <2:1, Watt
Antenna
+2.5VA Balun, 1.25 10nF
BDDATA VddIO
BDDATA
Unbal
Second Source: MuRata LDB15C500A2400
47pF
Bal*
Equal length
ISSI IS11LV5010 Bluetooth Transceiver
BnDEN TEST3 BXTLEN TEST-SE RXCLK RXDATA
BnDEN
BF3216-B2R4BAA
0.85mm thick
47pF
BXTLEN
47pF
+2.5VA
uPG158TB SC-70-6
TEST-MN
TEST-MP
TEST-MN2
TEST-MP2
Alt. suppliers: (requires higher control voltage): Skyworks Solutions, Inc. AS179-92 +3~5 operation Peregrine Semiconductor Corp. PE4239 (2.7~3.3V, control lines, ultra thin CMOS) Hittite Microwave Corp. HMC190, 195, 197, (+3~8V, control lines, GaAs) Logic: high connects
0.10uF
BRCLK
Filter, ACX: pass: 2400~2500, -2dB max, VSWR stop: max, 1750~1950; max, 2100; stop: max, 4800~5000; max, 7200~7500 Alt: Soshin, MuRata
RXCLK RXDATA MUX'ed BDATA1 BRCLK necessary.
BPKTCTL
uPG158TB SPDT switch, GaAs FET, +2.5~ operation
10nF
BPKTCTL
0.10uF
0.10uF
CONNECT
BRCLK
+2.5VA
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03
3.3V logic level
PACKAGING INFORMATION
Plastic (Quad Flat No-lead) Package Code:QF(48-pin)
ISSI
0.08
DETAIL:
DETAIL:
MILLIMETERS Sym.
INCHES Min.
0.031 0.000 0.089 0.089 0.007 0.012
Min.
0.80 0.00 2.25 2.25 0.18 0.30
Nom.
0.90 0.02 0.65 0.20 7.00 4.70 7.00 4.70 0.50 0.25 0.40
Max.
1.00 0.05 1.00 5.42 5.42 0.30 0.50
Nom.
0.035 0.001 0.026 0.008 0.185 0.185
Max.
0.039 0.002 0.039 0.213 0.213
Leads
Notes: Controlling dimensions millimeters. Leads shall planar with respect another within 0.08mm seating plane. Reference document: JEDEC MO-220.
0.276 0.276 0.020 0.010 0.016 0.012 0.020
Copyright 2003 Integrated Silicon Solution, Inc. rights reserved. ISSI reserves right make changes this specification products time without notice. ISSI assumes liability arising application information, products services described herein. Customers advised obtain latest version this device specification before relying published information before placing orders products.
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 05/01/03
SEATING PLANE
IS11LV5010
ISSI
Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774
Rev. 06/10/03

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