Next-generation 0.18µ hybrid gate array Platform high-performance 1.8V

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Next-generation 0.18µ hybrid gate array Platform high-performance 1.8V

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XPressArray0.18µ Hybrid Gate Array
Next-generation 0.18µ hybrid gate array Platform high-performance 1.8V/1.5V ASICs FPGA-to-ASIC conversions production cost savings Significant time-to-market advantages Drop-in replacement cost-reducing Xilinx Altera FPGA designs 2.6M ASIC gates, 220K FPGA system gates 200MHz system, 350MHz local clock speeds power consumption (0.060µW/MHz/gate) 38Kbits 1.4Mbits embedded configurable memory Single-port/dual-port RAM, initializable Flexible technology Configurable signal, core power supply locations Supports LVTTL, LVCMOS, PCI, PCI-X, HSTL, SSTL, GTL/+, LVPECL, LVDS, BLVDS 1.5V, 1.8V, 2.5V 3.3V capable True 3.3V tolerance with external resistor necessary user I/Os Comprehensive clock management circuitry digital DLLs PLLs Variety package options Integrated scan-test JTAG support high-fault coverage
Feature Sheet
Product Description
Targeted medium-density, high-speed, 1.8V 1.5V ASIC applications high-density FPGA-to-ASIC conversions, XPressArray 0.18µ hybrid gate array innovative next-generation technology platform that reduces time-to-market system-on-chip (SoC) applications while delivering significant unit cost savings. XPressArray offers true drop-in replacement most Xilinx Altera FPGAs, making industry's lowest cost ASIC conversion solution. result simplified route cost reductions OEMs looking combine flexibility FPGA prototyping with path ASICs final production. Operating with system clock speeds 200MHz local clocks 350MHz available variety package options, XPressArray devices deliver high-performance, power ASIC solutions with densities 2.6M ASIC gates. Embedded configurable memory ranges from 38Kbits 1.4Mbits, while flexible technology includes support comprehensive array common standards compatibility with 1.5V, 1.8V, 2.5V, 3.3V 5.0V schemes. High fault coverage provided through integrated scan-test JTAG support. FPGA conversions, rapid access XPressArray technology achieved Semiconductor's NETRANS® FPGA-to-ASIC design flow. Alternatively, availability XPressArray synthesis libraries leading commercial synthesizers allows conversion FPGA designs ASICs simply re-targeting from FPGA library XPressArray library. datasheet with complete technical specifications, please visit Semiconductor's Technical Library www.amis.com.
XPressArray
XPressArray
XPressArray Technology
XPressArray technology ideal mediumdensity ASIC applications requiring high performance power, with 1.8V 1.5V core operation. XPressArray devices fabricated using hybrid technology that integrates established 0.18µ front-end process with proven Semiconductor metal finishing technology, which used produce customized back end. 0.18µ processing steps common multiple applications, reducing costs allowing existing tooling utilized. same time, tooling manufacturing costs significantly lower metal finishing process than traditional 0.18µ cell-based processes. result that XPressArray delivers reduced cycle times significant reductions terms both unit cost through manufacturing utilizing gate array technology. Compared equivalent FPGAs operating same voltage levels, XPressArray devices offer higher densities, better performance lower power consumption. power consumption further contributes cost savings lower cost plastic packaging used many cases. XPressArray products designed pin-for-pin replacement Virtexand ApexFPGAs offer integration multiple FPGAs into ASIC. Package options include traditional plastic TQFP/PQFP well plastic super 0.80mm, 1.00mm 1.27mm pitches.
includes amortized
There eight arrays Semiconductor XPressArray family. These arrays offer between 2.6M gates 1.4Mbits embedded RAM. configured single dual port with asymmetrical port widths. architecture also supports initialization. Flexible technology includes fully configurable core power supply pads support industry's widest range standards including PCI-X, HSTL, SSTL, 622Mbps LVDS. Comprehensive clock management circuitry features digital delay-locked loops (DLLs) maximum four phase-locked loops (PLLs).
AMIS Feature Sheet
XPressArray Cost Comparison
XPressArray Base System Gates1 XP170E 220K XP220E 616K XP272E 988K XP378E 1972K XP444E 3048K XP568E 4970K XP708E 7942K XP830E 11100K
Usable ASIC Gates2 136K 226K 456K 718K 1181K 1895K 2664K
Usable Bits3 119K 240K 378K 622K 998K 1403K
Bond Pads4 8305
Equivalent FPGA system gates. Usable 2-NAND gate array equivalent gates, assumes full utilization. Usable bits, assumes full logic utilization.
Total combined signal, power/ground test bond pads. Flip-chip power pads included bond count.
XPressArray Base Configurations
www.amis.com
XPressArray trademark Semiconductor, Inc. Other marks bearing also registered trademarks trademarks Semiconductor, Inc. Terms product names this document trademarks other companies. Semiconductor, Inc. reserves right change specifications required permit improvements design products.

Next-generation 0.18µ hybrid gate array Platform high-performance 1.8V

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