W32A-01A transmitter converts bits CMOS/ data into LVDS (Low Voltage D

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W32A-01A transmitter converts bits CMOS/ data into LVDS (Low Voltage D

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W32A-01A
W32A-01A transmitter converts bits CMOS/ data into LVDS (Low Voltage Digital Signaling) data stream. phase-locked transmit clock transmitted parallel with data streams over fifth LVDS link. W32A-01A programmed rising edge falling edge clocks through dedicated pin. transit clock frequency MHz, bits data bits timing control data (HSYNC, VSYNC, CNTL1, CNTL2) transmitted rate Mbps LVDS data channel.
Features:
LVDS transmitter with suppression 28:4 data channel compression Mega bytes throughput. Wide Frequency Range: 20-70 suited VGA, SVGA, SXGA. Narrow lines) reduces cable size swing LVDS devices requires external components Single 3.3V supply with 130mW (TYP) Power CMOS Design Power -Down Mode profile lead TSSOP package Clock Edge Programmable transistor Compatible with National DS90C383/384
Block Diagram:
PARALLEL LVDS
OS/TTL INPUTS
TRANSMITTER MHz) (M83A only) /PDWN
TCLK
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
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Diagram
VDD_DIG TD1x TA5x TA6x GND_DIG TB0x TB1x TD2x VDD_DIG TD3x TB2x TB3x GND_DIG TB4x TB5x TD4x (N/C)* TD5x TB6x TC0x GND_DIG TC1x TC2x TC3x TD6x VDD_DIG TC4x TC5x TA4x TA3x TA2x GND_DIG TA1x TA0x TD0x GND_LVDS TATA+ TBTB+ VDD_LVDS GND_LVDS TCTC+ TCLKTCLK+ TDTD+ GND_LVDS GND_PLL VDD_PLL GND_PLL /PDWN CLKIN TC6x GND_DIG
W32A-01A
Description
Name VDD_DIG GND_DIG TA0X TA6X TB0x TB6x TC0x TC6x TD0x TD6X (N/C)* /PDWN VDD_PLL GND_PLL GND_LVDS TD+, TDTCLK+ TCLKTC+, TCVDD_LVDS TB+, TBTA+, TA8/19/2003 v1.0
Type Power Ground Input Input Input Input Input Input Power Ground Ground Output Channel Output Clock Output Clock Output Channel Power Output Channel Output Channel Ground digital block.
Description Power supply digital block Single ended voltage data input channel Single ended voltage data input channel Single ended voltage data input channel Single ended voltage data input channel
Power supply analog block Ground analog block Ground LVDS drivers LVDS (low voltage differential signaling) output channel
LVDS (low voltage differential signaling) output channel LVDS (low voltage differential signaling) output channel LVDS (low voltage differential signaling) output channel
Alliance Semiconductor Corporation Santa Clara, Page
W32A-01A
LOAD SHIFT TIMING SEQUENCES
CLKIN (or) CLKIN Previous Cycle
D0-1 D8-1 D19-1 D27-1
Current Cycle
D7+1
Next Cycle
D18+1
D26+1 D23+1
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
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Absolute Maximum Ratings
Parameter Supply Voltage CMOS Input Voltage CMOS Output Voltage LVDS Driver Output Voltage Output Short Circuit Duration Junction Temperature Storage Temperature Range Lead Temperature Maximum Power Dissipation 25°C -0.3 -0.3 -0.3 -0.3 +150 Continuous +260 Unit
W32A-01A
Note: Absolute Maximum Ratings those values beyond which safety device cannot guaranteed. They meant imply that device should operated these limits. tables "Electrical Characteristics" specify conditions device operation.
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
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W32A-01A
Electrical Characteristics
Symbol rVOD rVOC Parameter High Level Input Voltage Level Input Voltage High Level output Voltage Level Output Voltage High Level Input Current Level Input Current Pull Down Current Output Short Circuit Current Differential Output Voltage Change between Complimentary Output States Common Mode Voltage Change between Complimen tary Output States Output Short Circuit Current Output TRI-STATE Current Conditions 1.375 Unit
-4mA =4mA pin, VOUT
1.125
1.25
VOUT /PDWN VOUT
Recommended Operating Conditions
Parameter Supply Voltage High-level input voltage Low-level input voltage Differential load impedance Operating free-air temperature Symbol Unit
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
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Supply Current
Symbol ITCCG ITCCW ITCCS Transmitter Power Down Supply Current Parameter Transmitter Supply Current Conditions 100, 5pF, MHz, 3.3V, Grayscale Pattern 100, 5pF, MHz, 3.3V, Worst Case Pattern /PDWN
W32A-01A
Unit
PARAMETER MEASUREMENT INFORMATION
50ns 100ns 150ns 200ns
clk1
TA0x, TB0x, TD4x TA1x, TB1x, TD5x TA2x, TD2x, TB6x TA3x, TD3x, TC0x TA4x, TD1x, TA5x, TA6x, TB2-5x, -3x, TD6x
clk2 TC4x, TC5x, TC6x, TD0x
16-GRAYSCALE TEST-PATTERN WAVEFORMS
50ns
100ns
150ns
200ns
clk1
CLKIN Even
clk2
WORST CASE TEST PATTERN WAVEFORMS
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
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W32A-01A
Switching Characteristics
td0x td1x td2x td3x td4x td5x td6x td7x Parameter Delay Time, CLKOUT< serial position Delay Time, CLKOUT< serial position Delay Time, CLKOUT< serial position Delay Time, CLKOUT< serial position Delay Time, CLKOUT< serial position Delay Time, CLKOUT< serial position Delay Time, CLKOUT< serial position Output Skew, (n/7) Delay Time, CLKINOE CLKOUT< Cycle time, output clock jitter Test Conditions 15.38 0.2%), |input clock jitter| -0.2 -0.2 18.51 0.2%), |input clock jitter| ps** 15.38 0.75 (2500E3t) 0.05 15.38 0.75 (2500E3t) 0.05 3.75 7.75 Unit
1500
tdis
Pulse duration, high level output clock Transition time, differential output Enable time, SHTDN> phase lock vaid) Disable time, SHTDNoe offstate (CLKOUT low)
typical values 3.3V, |input clock jitter| magnitude change input clock period Output clock jitter change output clock period from cycle next cycle observed over 15000 cycles.
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
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W32A-01A
PARAMETER MEASUREMENT INFORMATION
TIMING WAVEFORMS
OD(H) CLKOUT
0.00V
CLKIN
OD(L) 0.5V
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
Page
W32A-01A
Alliance Semiconductor Corporation 2575, Augustine Drive, Santa Clara, 95054 Tel: 408-855-4900 Fax: 408-855-4999 www.alsc.com
Copyright Alliance Semiconductor Rights Reserved. Preliminary Information Part Number: W32A-01A Document Version: v1.0
Copyright 2003 Alliance Semiconductor Corporation. rights reserved. three-point logo, name Intelliwatt trademarks registered trademarks Alliance. other brand product names trademarks their respective companies. Alliance reserves right make changes this document products time without notice. Alliance assumes responsibility errors that appear this document. data contained herein represents Alliance's best data and/or estimates time issuance. Alliance reserves right change correct this data time, without notice. product described herein under development, significant changes these specifications possible. information this product data sheet intended general descriptive information potential customers users, intended operate provide, guarantee warrantee user customer. Alliance does assume responsibility liability arising application product described herein, disclaims express implied warranties related sale and/or Alliance products including liability warranties related fitness particular purpose, merchantability, infringement intellectual property rights, except express agreed Alliance's Terms Conditions Sale (which available from Alliance). sales Alliance products made exclusively according Alliance's Terms Conditions Sale. purchase products from Alliance does convey license under patent rights, copyrights; mask works rights, trademarks, other intellectual property rights Alliance third parties. Alliance does authorize products critical components life-supporting systems where malfunction failure reasonably expected result significant injury user, inclusion Alliance products such life-supporting systems implies that manufacturer assumes risk such agrees indemnify Alliance against claims arising from such use.
8/19/2003 v1.0
Alliance Semiconductor Corporation Santa Clara,
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W32A-01A transmitter converts bits CMOS/ data into LVDS (Low Voltage D

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