Actel Corporation, Mountain View, 94043-4655 2003 Actel Corporation. r

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Actel Corporation, Mountain View, 94043-4655 2003 Actel Corporation. r

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Silicon Explorer User's Guide
Actel Corporation, Mountain View, 94043-4655 2003 Actel Corporation. rights reserved. Printed United States America Part Number: 5029134-1 part this document copied reproduced form means without prior written consent Actel. Actel makes warranties with respect this documentation disclaims implied warranties merchantability fitness particular purpose. Information this document subject change without notice. Actel assumes responsibility errors that appear this document. This document contains confidential proprietary information that disclosed unauthorized person without prior written consent Actel Corporation. Trademarks Actel Actel logotype registered trademarks Actel Corporation. Adobe Acrobat Reader registered trademarks Adobe Systems, Inc. Liberty licensed trademark Synopsys Inc. This product uses SDC, Proprietary format Synopsys Inc. Libero trademark Actel Corporation. Mentor Graphics, Viewlogic, ViewDraw, MOTIVE, ModelSim registered trademarks Mentor Graphics, Inc. Synplify Synplicity registered trademarks Synplicity, Inc. Verilog registered trademark Open Verilog International. WaveFormer Lite SynaptiCAD trademarks SynaptiCAD, Inc. Windows registered trademark Windows trademark Microsoft Corporation U.S. other countries.
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Introduction.4 Connecting Silicon Explorer Silicon Explorer Software.10 Appendix Appendix B.23 Appendix
Introduction
This User's Guide describes procedures connecting, debugging, analyzing devices, using Silicon Explorer Silicon Explorer does program Flash devices. Silicon Explorer enables control ActionProbe circuitry, patented architectural feature built into Actel's antifuse devices that allows access internal node from selected external pins. integrates diagnostic tools, Command module Analyze module, into single diagnostic logic analysis device that attaches PC's standard port. Command module Explorer software lists observable nets FPGA. Command module also reads back design's checksum. design's checksum verify that programmed correct design FPGA. Analyze module 18-channel logic analyzer that automatically displays signals both probe outputs (and additional signals) target system. sample data asynchronously MHz. Channels logic analyzer connect signals FGPA automatically. Silicon Explorer uses remaining channels logic analyzer examine other signals board. Actel also offers Silicon Explorer Lite. Silicon Explorer Lite enables only Command module relies external scope logic analyzer viewing signals.
Connecting
Silicon Explorer Silicon Explorer Lite connect standard serial port using 8250 16550 UART. Connect 9-Pin connector.
Running Silicon Explorer
Silicon Explorer sets itself Demo mode installation. Silicon Explorer From Device menu, select Silicon Explorer Silicon Explorer (depending your version hardware. Choose port (COM1 through COM4) from Port drop-down list Device menu. software continuously polls hardware activity. Setting port Demo mode prevents application from opening ports your system. serial port saves information "Silicon Explorer 5.0.ini" file found installation directory. default data transfer speed 115,200 baud. this speed data transfer entire buffer less than seconds. download latest version Explorer software from Actel website Note: Many notebook computers share external port with built-in infrared (IR) port. have enter your CMOS setup menu enable external port.
Chapter Connecting Silicon Explorer
Connecting Silicon Explorer
Getting Connected with Silicon Explorer
This section describes following procedures: Connecting Silicon Explorer your device Powering Silicon Explorer Describing Silicon Explorer connector types, logic analysis, Explorer software.
Powering Silicon Explorer
draws power from external power supply (provided) connecting power source (such might exist PCB). must connect reference voltage when using external power supply. Actel recommends using external power supply when target system cannot supply enough current SEII. table below list possible power configurations. Power Configurations Silicon Explorer Power Supply 2.5V 3.3V 5.0V External Power Supply Required Optional Optional 3.3V 5.0V
Note: your current system limited, must external power supply reference voltage. Typical Current Consumption table more information about current requirements. When apply power, yellow "heart beat" Silicon Explorer begins blink. Actel designed Silicon Explorer hardware withstand abuse normally found environment. However, long term exposure out-of-range conditions cause failure. particular, long term connection reverse- over-voltage power conditions cause thermal failure.
Current Consumption
Silicon Explorer CMOS device exhibits very current consumption when idle. Current consumption rises rapidly several hundred milliamps during acquisition. your power supply unable supply necessary current, your target reset. table below guide typical current consumption based acquisition rate current proportionately higher
Silicon Explorer User's Guide
Typical Current Consumption Acquisition Rate IDLE Current 75ma 300ma 400ma 500ma 700ma
Connector Types
Silicon Explorer 22-pin channels, clock, VIO, GND, +5V, clock GND), 26-pin connector (unused), 16-pin connector controlling ActionProbe circuitry reading design checksum. Silicon Explorer Lite only 16-pin 26-pin connector (the large 26-pin connector used). table below summary connector pins their functions. Connector Types Connector Type 22-pin 16-pin 26-pin Mode Logic Analysis Action Probe Control Used
Logic Analysis
This section does apply Silicon Explorer Lite. Actel Silicon Explorer ships with replaceable target cable assembly (SI-EX-TCA) that interfaces Silicon Explorer with your target system. connector SI-EX-TCA polarized only inserted into Silicon Explorer II's connector way. contacts TCA-8020 accept standard 0.025" round square test accessories. Connect Silicon Explorer II's 18-channel leads desired target signals using standard test accessories.
Probe Leads
Connect probe leads attaching supplied cable assemblies. 16-pin cable assembly terminates individual 0.025 connectors that connect 0.025 headers microclips according labels wires. other assembly interfaces directly target board with 16-pin header when install target according pinout shown figure below.
Chapter Connecting Silicon Explorer
Silicon Explorer Probe Connector Pin-Out Connect probe leads according table below. Matching Probe Pins Device Pins Probe Mode GND1 SDI/TDI DCLK/TCK SDO/TDO Act1, 40MX Mode DCLK Used VCCI ACT2, 42MX, 3200DX Mode DCLK Used VCCI SX/SX-A/eX used VCCI Used VCCI
Note: connect pins. best results, connect pins.
Connecting Silicon Explorer
diagrams below describe, detail, connect Silicon Explorer various device families including ACT1/A40MX devices, ACT2/XL/ACT3/DX A42MX devices, SX/SX-A devices, Axcelerator Silicon Explorer Setup.
Silicon Explorer User's Guide
ACT1/A40MX Silicon Explorer Setup
ACT2/XL/ACT3/DX/A42MX Silicon Explorer Setup
Chapter Connecting Silicon Explorer
SX/SX-A devices Silicon Explorer Setup probing SX-A device require special setup. Actel recommends that series termination probe connectors (TDI, TDO, TCK, TMS, PRA, PRB). series termination prevent data transmission corruption during probing reading checksum.
Axcelerator Silicon Explorer Setup
Silicon Explorer Software
Understanding Silicon Explorer Software
Silicon Explorer software consists components, Command module Analyze module. Command module Explorer software lists observable nets FPGA. Command module verify that programmed correct design FPGA. Analyze module 18-channel logic analyzer that automatically displays signals both probe outputs (and additional signals) target system. figure below shows Silicon Explorer window with Axcelerator probe file loaded. displayed other device families.
Silicon Explorer Window with Axcelerator Probe File
Using Command Module
Command module interface select internal nodes Actel FPGA family (figure below). following sections describe exploring with probe.
Silicon Explorer User's Guide
Command Module Window
Exploring FPGA
following procedures describe Command module examine Actel FPGA.
Opening Probe File
Follow instructions below open probe file. open probe file: From Start menu, select Programs Designer Silicon Explorer. Select Probe (.prb) file open. Select File Open. Choose (*.prb) file type double-click desired probe file. also open probe file Silicon Explorer double-clicking Open Actel Probe File icon. Explorer uses .prb file exported from Designer during analysis. exported file contains device information, names, node location information. After .prb file opens, verify information displayed tree structure Analyze window.
Exporting Probe File
steps below export probe file from Designer.
Chapter Silicon Explorer Software
export probe file: From Start menu, Launch Designer. Open your design file. From File menu, select Export Debugging view Export Debugging dialog (see figures below). Select Auxiliary File from File Type pull-down menu. Select Probe from Type pull-down menu. Select continue.
Opening Export Debugging Dialog
Silicon Explorer User's Guide
Saving Probe File .prd also generate probe file using Generate Programming Files: Fuse Files dialog box. From figure below, note that Generate Probe File Also checked.
Verifying Checksum
Make sure SDO/TDO connected. Click Checksum button. After open Probe file make device connection, read checksum target device compare checksum Probe file double-clicking Checksum button. table below explains checksum error messages.
Chapter Silicon Explorer Software
Error Message Checksum: 383A vs.???? Checksum: 383A 0000
Checksum: 383A 8D5B
Checksum Error Messages Explanation Checksum readable. Silicon Explorer connected target device device checksum 0000. -This probe file different design than programmed part. Look probe file with checksum that matches device, i.e. 8D5B. -The SDO/TDO probe-side properly connected device. Please Matching Probe Pins Device Pins table proper connection. -Noise JTAG lines caused read error. Retry reading checksum. retry passes value read changes, then noise cause error.
probe node: Select desired signal from tree clicking name (see Silicon Explorer Window). filter search nets quickly, multiple wildcard characters ("*") restrict your search. Click button. Silicon Explorer routes selected node probe switches corresponding analyzer input probe connector. Analyze module displays name. Right-click Nets icon select either "Show Nets" "Show Pins" modify tree information reflect design's internal names names. figures below show examples types displays.
Silicon Explorer User's Guide
Command Module "Show Nets" Display
Chapter Silicon Explorer Software
Command Module "Show Pins" Display cannot find net, possible that optimized Designer. Refer Troubleshooting section more information about limitations probing Actel devices using Silicon Explorer.
Using Analyze Module
This section does apply Silicon Explorer Lite because does contain Analyze module. analyze module: Open Silicon Explorer check status lower right corner display. have properly selected port powered Silicon Explorer then status IDLE. Analyze module captures samples each channel uploads them host over serial port. (see figure below). acquisition parameters from tool pull-down menus. table below summary parameters. Click button (red triangle) begin acquisition. analyzer begins capturing data. After acquire initial samples, sampling continues until Silicon Explorer recognizes trigger pattern press stop button (black square). During capture period, status window displays "PRE" pretrigger state (although trigger pattern matches quickly).
Silicon Explorer User's Guide
Silicon Explorer enters "POST" state samples data after trigger pattern stop button) until fulfills posttrigger requirement. Then, uploads data host (READ State with progress indicator). entire upload process takes less than seconds, although zoom view data immediately because buffer uploads background task.
Analyze Module
Acquisition Parameters Acquisition Speed Trigger Position asynchronous Click individual signals column specify don't care, low, high, rising, falling either edge. trigger pattern logical patterns.
Trigger Pattern
Chapter Silicon Explorer Software Viewing Data
table below shows shortcut keys viewing data software. access panning zooming features through scroll bars toolbar. also drag display area zoom window out.
Viewing Data Shortcut Keys Arrow Down Arrow Left Arrow Right Arrow Page Page Down Home Function Zoom Zoom Scroll Earlier (Data moves Right) Scroll Later (Data moves Left) Jump Screen Earlier Jump Screen Later Jump Trigger
place cursors clicking display area. Silicon Explorer displays time below channel labels data values columns. "Live" Column indicates current state channels when analyzer "IDLE." Timing Instrument offers many convenient features viewing, saving, printing data. More detailed information available from online help system (select Help command from Help menu).
Appendix
Debugging ex/SX/SX-A/AX Devices Using Silicon Explorer
Axcelerator, SX-A, devices require additional attention when debugging. must control probing SX-A devices through IEEE 1149.1 pins. configure IEEE 1149.1 pins dedicated (JTAG only) flexible (JTAG I/O).
Probe Circuit Control Pins
Silicon Explorer tool uses IEEE 1149.1 pins (TDI, TCK, TDO) select desired nets debugging. Assign selected internal nets PRA/PRB pins observation. figures below show connections between Silicon Explorer SX/SX-A/eX FPGA required perform in-circuit debugging Axcelerator Silicon Explorer Setup.
SX/SX-A/eX Setup
Axcelerator Silicon Explorer Setup
Silicon Explorer User's Guide Diagnostic Consideration
place IEEE 1149.1 (JTAG) probe pins (TDI, TCK, TMS, TDO, PRB) desired mode, select appropriate check boxes "Device Variations" dialog window shown figure below). access "Device Variations" dialog window selecting Design Setup Wizard under Option menu Designer.
Diagnostic Pins Configuration access device variations dialog designer: Launch Designer. Open your Design. From Options menu, select Device Setup. Device Selections dialog appears. Click Next. Device Variations Dialog appears.
Dedicated JTAG Mode
When select "Reserve JTAG Pin" box, place FPGA Dedicated JTAG mode, which configures TDI, TCK, pins JTAG boundary scan in-circuit debug with Silicon Explorer Also, enable internal pull-up resistor both pins (see figure below). addition, checking "Reserve JTAG Pin" box, TDI, available assignment Editor.
Appendix
Dedicated JTAG Mode need specify internal pull-up resistor; automatically configures with internal pull-up resistors.
Flexible JTAG Mode
When select "Reserve JTAG Pin" box, place FPGA Flexible JTAG mode, where TDI, pins function user I/Os JTAG pins. When select Flexible JTAG mode, disable internal pull-up resistors pins. Note that require external pull-up resistor this mode (figure below). Silicon Explorer transforms TDI, pins from user I/Os into JTAG diagnostic pins when rising edge detected while logical low. JTAG pins revert user I/Os when JTAG state machine Test-Logic reset state.
Flexible JTAG Mode with Pull-up Resistor table below shows possible configurations diagnostic pins.
Diagnostic Configuration Dedicated JTAG Mode Flexible JTAG Mode TCK, TDI, dedicated diagnostic TCK, I/Os. pins need pull-up resistor Pin.
Silicon Explorer User's Guide Probe Pins
When select "Reserve Probe Pin" box, direct layout tool reserve pins diagnostic pins. This option merely guideline. Layout tool requires that pins user I/O's achieve successful layout, then tool will these pins user I/Os. assign user I/Os pins select "Reserve Probe Pin" option, Layout tool overrides "Reserve Probe Pin" option.
Design Considerations
Avoid using TDI, TCK, TDO, PRA, pins input bidirectional ports. Since these pins active during probing, critical input signals through these pins available. addition, program Security Fuse. Programming Security Fuse disables Probe Circuit.
Appendix
Locating
Tables through show numbers ACT2 1200XL families.
Package PLCC84 CPGA100 PQFP100 VQFP100
Table B-1. A1225A/A1225XL Number
Table B-2. A1240A/A1240XL Package PLCC84 PQFP100 CPGA132 PQFP144 TQFP176 Number
Package PLCC84 PQFP160 CQFP172 CPGA176 TQFP176 PQFP208
Table B-3. A1280A/A1280XL Number
Tables show numbers ACT3 family.
Table B-4. A1415 Number
Package PLCC84 CPGA100 PQFP100 VQFP100
Silicon Explorer User's Guide
Package PLCC84 PQFP100 VQFP100 CQFP132 CPGA133 PQFP160
Table B-5. A1425 Number
Package PLCC84 VQFP100 PQFP160 CPGA175 TQFP176
Table B-6. A1440 Number
Package PQFP160 TQFP176 CQFP196 CPGA207 PQFP208 BGA225
Table B-7. A1460 Number
Table B-8. A14100 Package RQFP208 CQFP256 CPGA257 BGA313
Number AE23
Tables through B-13 show numbers A3200DX family.
Appendix
Package PLCC84 PQFP100 PQFP160 TQFP176
Table B-9. A3265DX Number
Package CQFP84 PLCC84 PQFP160 TQFP176 PQFP208
Table B-10. A32100DX Number
Package PLCC84 PQFP160 TQFP176 PQFP208 CQFP256
Table B-11. A32140DX Number
Package CQFP208 PQFP208 RQFP208 RQFP240 CQFP256
Table B-12. A32200DX Number
Package RQFP208 RQFP240 CQFP256
Table B-13. A32300DX Number
Silicon Explorer User's Guide
Tables B-14 B-15 show numbers A42MX family. Table B-14. A42MX09 Number
Package PLCC84 PQFP100 VQFP100 PQFP160 TQFP176
Package PLCC84 PQFP100 VQFP100 PQFP160 TQFP176 PQFP208
Table B-15. A42MX16 Number
Tables B-16 through B-19 show numbers RH/RT devices.
Package CQFP
Table B-16. RT1280A/RH1280 Number
Package CQFP132
Table B-17. RT1425A Number
Package CQFP196
Table B-18. RT1460A Number
Appendix
Package CQFP256
Table B-19. RT14100A Number
Notes: ACT1 40MX families devices contain pin. from device must connected input Silicon Explorer. devices listed (i.e. 42MX24/A42MX36, SX-A, RTSX, RTSX-S, AX), they contain pin, instead pin. Please check "Package Description" section appropriate datasheet
Appendix
Troubleshooting
This section lists frequently asked questions Silicon Explorer questions divided into four sections: error messages, general information, software setup, hardware setup. more information, visit Actel online support website http://www.actel.com/guru.
Errors Troubleshooting
I've connected Silicon Explorer window display reads N/C. Why? Look Silicon Explorer flashing yellow "heartbeat." isn't flashing make sure have properly connected adequate power supply. It's flashing still N/C. Why? There number things that prevent from establishing communication. following most common: Wrong port. four ports, even sure that your mouse power Silicon Explorer (see above). Desktop Systems External connector connected port internally. Laptop systems external connector disabled Port Override?). your PC's CMOS setup program enable port. port reassigned program, control panel updated. Multiple mouse drivers system.ini. Third-party serial port "enhancers" conform windows API.
I've IDLE message, when click Run, Silicon Explorer window flashes error message returns IDLE. Why? target power incapable supplying necessary current, then Silicon Explorer resets returns IDLE. Many current-limiting supplies will trip when close operating current. Analyze module acquires data then indicates errors read-back. Why? Analyze module bursts data back blocks high speeds, with built-in retry block uses both checksum byte count). Some third-party serial programs block interrupts, forcing analyzer into retry loop. Some laptops power down UART drop characters. disabling "Power Saving" CMOS setup menu. When Explore window open, other Windows programs slowly. Why? A):If Explore window open connected powered then system constantly timing looking response. Either close window change port DEMO.
Silicon Explorer User's Guide
Q):I message "Device Timed out" when assign particular signal Probe pins. Why? This message gives indication that power sufficient Silicon Explorer solution would have separate power source Silicon Explorer. Refer "Powering Silicon Explorer more information. have assigned internal signal light blinking Probe Pilot. this normal? light Probe Pilot just indication logic level that assigned internal signal. assigned internal permanent logic light Probe Pilot corresponding probe will glow. cable does have pins. Why? Your cable will have pins bought before probing capability introduced. order cable (Si-Ex-Ribbons), contact Actel customer service Customer.Service@actel.com. Q):Is Silicon Explorer displaying incorrect signal? Make sure that signal sampled sufficiently high frequency. sampling rate should least twice frequency fastest changing signal. maximum frequency which signal sampled MHz, which limits frequency device 50MHz. higher sampling frequency required than pins connected logic analyzer view signals. can't find wish probe? Silicon Explorer lists only signals that actually present device. There possibility that want probe been optimized Designer. Please check list nets combined combiner file (*.cob) which exported from Designer File>Export>Auxiliary File with file type *.cob. What limitations probing Actel devices using Silicon Explorer? Probing limitations described table below. Note that dash indicates that feature unavailable, asterisk indicates that feature only applies devices that have Qclock.
Family Input ACT1a/40MX ACT2/XL/42MX ACT3 DX/42MX SX/SX-A/eX
Probing Limitations Probe Capability Clock Hclock
Qclock
Appendix
Notes: ACT1 devices (specifically A10xx, A10xxA, some A10xxB, material, Military ACT1) probed signal inverted. have specific break point numbers A10xxB devices, however provide number will determine that inverted probe signals. course best know sure probe output input buffer compare Silicon Explorer reading with applied value. QCLKINT signal inverted swapped with adjacent quadrant described following Guru document: QClock probe ability SX72A/SX72S currently disabled, become available future.
General Information
Does Silicon Explorer support ProASIC programming debugging? today Silicon Explorer does support either ProASIC programming debugging. What accessories available Silicon Explorer? Silicon Explorer Accessories: Ribbon Breakout Cables FPGA probe connection (for both Silicon Explorer Silicon Explorer lite) SI-EX-TCA: Flying lead cable assembly Quick Probe Clips
Silicon Explorer debug devices which have their security fuses programmed? part Actel FPGAs security feature Silicon Explorer cannot used devices which have their security fuse programmed. probe pins regular I/Os? probe pins used user except MODE pins. Once device enters probe mode, I/O's switch probe functionality. highly recommend that these pins inputs, since your device will accept inputs during probe mode. What differences between Silicon Explorer Silicon Explorer main difference between Silicon Explorer Silicon Explorer that Silicon Explorer logic-analysis system enhanced support external power supply, which permits internal probing 5.0V, 3.3V, 2.5V FPGAs. Other features include four-levels triggering, decompression download speed response time system acquisition rates 100MHz.
Silicon Explorer User's Guide Software Setup
triggering? have option setting trigger either EARLY that displays values ratio (25% 75%), where first represents data sampled before trigger point later represent sampled after trigger point. other options available CENTER(50% 50%) LATE(75% 25%). select trigger position from Instrument Trigger Position then selecting required Trigger position. What recommended sampling rate? accurate reading, sampling rate particular signal should least twice rate which signal changing (According Nyquist theorem). example, clock operating 25MHz should sampled least 50MHz frequency. Sampling higher frequencies however causes Silicon Explorer consume more power. What best find nets? best find nets Silicon Explorer Filter option available software. search require using *partial_name* filter, which would return signals having that partial_name net. using flow, difficult recognize names need observe. recommend that synthesis tool that generate gate-level schematic your synthesized netlist that during probing, easily trace through schematic obtain names from
Hardware Setup
probe SX-A device? probing device requires special setup because requires termination probe connectors (TDI, TDO, TCK, TMS, PRA, PRB). series termination used prevent data transmission corruption during probing. TRST during probing using Silicon Explorer? TRST active input. During JTAG mode Silicon Explorer debugging mode, JTAG state machine's reset must active otherwise probe circuitry disabled. Below recommendation TRST JTAG Silicon Explorer: RTSX Rev0 TRST RTSX Rev1 must TRST high when doing JTAG Silicon Explorer RTSX Rev2 leave TRST floating drive high must driven low) when running JTAG Silicon Explorer "Reserve JTAG TRST" selected Designer. leave TRST floating when running JTAG Silicon Explorer.
What different options that have connect device Silicon Explorer Probe Pilot? connect Silicon Explorer device either implementing probe connector board with ribbon connector connecting device Probe-Pilot using flying lead connector. choose second alternative,
Appendix
either posts your board, clips provided with Explorer connect directly probe pins. Please refer question information about probe connector dimensions. Where mechanical dimensions Silicon Explorer's Probe connector? Please refer following guru document detailed information about connector Where find layout Silicon Explorer? layout Silicon Explorer found back Silicon Explorer case. There notch side connector that determines position checksum device read? checksum most devices read through TDO/SDO pin. information about location pins Actel Devices please refer "Location Pin" page ACT1 40MX pins have pin. order read checksum from ACT1/40MX devices device must connected Silicon Explorer. What power requirements Silicon Explorer Silicon Explorer must connected power supply tolerant devices, 3.3V 3.3V tolerant devices, 2.5V 2.5V tolerant devices.

Actel Corporation, Mountain View, 94043-4655 2003 Actel Corporation. r

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