MC33690 Standalone Reader Circuit STARC Standalone Reader Circuit
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MC33690 Standalone Reader Circuit STARC
Standalone Reader Circuit (STARC) integrated circuit dedicated automotive immobilizer applications. combines same chip circuitry interface with transponder antenna drivers demodulator. dropout voltage regulator physical interface fully compatible with 9141 norm also available. Standalone Reader Circuit fabricated with SMARTMOSTM3.5 technology. This process double layer metal, 1.4µm, technology, combining CMOS bipolar devices.
STANDALONE READER CIRCUIT
Contactless 125kHz reader module Self synchronous sample hold demodulator Amplitude phase modulation detection High sensitivity Fast "read after write" demodulator settling time resistance high current antenna drivers 150mA (typ.) Bidirectionnal data transmission Multi tag, multi scheme operation. dropout voltage regulator Wide input supply voltage range from 5.5V Output current capability 150mA with external power transistor output voltage with accuracy voltage reset function current consumption standby mode 300µA (typ.). 9141 transmitter receiver module Input voltage thresholds ratiometric supply voltage Current limitation Ouput slew rate control external protection device required.
SUFFIX Plastic Package CASE 751D
Connections
VSUP SOURCE GATE MODE1 MODE2
XTAL1 XTAL2 DOUT CEXT AGND
ORDERING INFORMATION
Operating Junction Package Temperature Range
-40°C 125°C SOIC
Device
MC33690DW
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Motorola, Inc. Rev. 4.7, October 2001
MC33690
BLOCK DIAGRAM
Figure Standalone Reader Circuit Optional external channel required sourced current 50mA. recommended reference MMFT 3055VL from Motorola.
VBAT GATE SOURCE 10µF 8MHz VSUP
Voltage Regulator
XTAL1 XTAL2
MODE1
Reader
MODE2 DOUT VBAT
CEXT 10nF AGND CEXT
9141 Interface
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MAXIMUM RATINGS
Rating Supply voltage Supply voltage without using voltage regulator Voltage SOURCE Current into/from GATE Voltage GATE Voltage pins MODE1/2, CEXT, DOUT, LVR, XTAL1/2, Voltage Voltage Current (Drivers off) Voltage AGND voltage capability (HBM, note voltage capability (MM, note Solder heat resistance test (10s) Junction temperature Storage temperature
Note Human Body model, AEC-Q100-002 Rev. Machine Model, AEC-Q100-003 Rev.
Symbol
Value -0.3 -0.3 -0.3 -0.3 -0.3 +0.3 ±300 ±0.3 ±2000 ±200
Unit
+150
THERMAL CHARACTERISTIC
Characteristic Junction ambiant thermal resistance (SOIC20) Symbol Value Unit °C/W
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FUNCTION DESCRIPTION
Function VSUP SOURCE GATE MODE1 MODE2 AGND CEXT DOUT XTAL2 XTAL1 Power supply External channel transistor source External channel transistor gate Antenna driver output Power digital ground Voltage regulator output Antenna driver output Mode selection input Mode selection input Demodulator input Demodulator ground Comparator reference input Demodulator output (5V) Voltage Reset input/output Oscillator output Oscillator input Amplitude modulation input 9141 transmitter output receiver input 9141 receiver monitor output 9141 transmitter input Description
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DESCRIPTION
READER MODULE
Reader module dedicated automotive industrial applications where information transmitted contactless. reader module write/read (challenge/ response) controller applications which demand high security level. reader module connected serial tuned circuit which generates magnetic field power supplying tag. synchronous sample hold technique allows communication with avalaible tags using admittance switching producing absorption field. Load amplitude phase shift modulation detected high rates 8kHz. 125kHz typical operational carrier frequency reader module with 8MHz clock.
Figure Reader block diagram
Data 1/32 counter 125kHz 4MHz 8MHz Clock 8MHz
Shutdown 125kHz Interface 11.25° 22.5° 33.75° 56.25° 67.5° 78.75° -11.25°, -22.5°, -33.75°, -45°, -56.25°, -67.5°, -78.75°
Self synchronous sample hold
Setup Preload
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Buffer 500ns Buffer 100K Comparator 500µA Data AGND CEXT CEXT 10nF
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MC33690
Read function
When answering base station, transponder generates absorption modulation magnetic field. results amplitude/ phase modulation current across antenna. This information picked antenna point between coil capacitor. external resistive ladder down scales this voltage level compatible with demodulator input voltage range (see parameter VINRD page 16). demodulator (see figure consists input stage (emitter follower), sample hold circuit, voltage follower, offset voltage comparator. sampling time automatically take into account phase shift tolerances antenna components oscillator. allowed phase shift measured input ranges from -45° +45°. Assuming that phase reference falling edge driving signal TD1, this leads sampling time phase ranging from -78.75° with discrete steps 11.25°. After reset condition, sampling time phase +11.25°. antenna phase shift evaluation only done after each wake-up command (see pages 12), after reset (see page This necessary obtain best demodulator performances. order ensure fast demodulator settling time after wake reset write sequence, external capacitor CEXT preloaded working voltage. This preset occurs 256µs after switching antenna drivers duration 128µs. After wake reset, preset same duration begins 518µs after clock settling. After power reset, VSUP must meet minimum specified value, enabling nominal operation VDD, before start preset. Otherwise preset must done user through standby/wake-up sequence.
Write function
Whatever selected configuration (see page write function achieved switching on/off output drivers TD1/2. Once drivers have been high impedance, load current flows alternatively
Figure Current flow when buffers switched
ILOAD
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MC33690
VOLTAGE REGULATOR
dropout voltage regulator provides regulated supply internal circuitry. also supply external peripherals sensors. input supply voltage ranges from 5.5V over 40V. This voltage regulator uses series combination high voltage LDMOS voltage PMOS transistors provide regulation. external capacitor required regulator stability. maximum average current limited power dissipation capability package. This limitation overcome connecting external channel parallel with internal LDMOS. threshold voltage this transistor must lower than internal LDMOS (1.95V typ.) order prevent current from flowing into LDMOS. breakdown voltage must higher than maximum supply voltage. voltage reset function monitors output. internal 10µA pull-up current source allows, when external capacitor connected between GND, generate delays power (5ms typ. with Reset=22nF) also input generating internal reset signal. Applying logic level this resets circuit internal flip flops reset, drivers TD1/2 switched
Figure Voltage regulator block diagram
VBAT
VSUP GATE
1MHz oscillator
Charge pump
channel LDMOS
SOURCE
Voltage reference biasing 10µA CReset Comparator generator reset
channel 100nF
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MC33690
9141 PHYSICAL INTERFACE
This interface module fully compatible with 9141 norm describing diagnosis line. includes transmitter (pin receivers (pins AM). input stages consist high voltage CMOS triggers. thresholds ratiometric VSUP. ground referenced current source (2.5µA typ.) pulls down input when unconnected. When negative voltage applied lines, input current internally limited resistor (typ.) series with diode. capacitive load protects against short circuit battery voltage. overtemperature protection shuts driver down when junction temperature exceeds 150°C (typ). Once shut down overtemperature protection, driver switched again junction temperature decreased below threshold, applying off/on command, coming either from demodulator configurations directly applied input configuration (see status table page electromagnetic emission reduced thanks voltage slew rate control (5V/µs typ.).
current limitation allows transmitter drive
Figure 9141interface
data VSUP From configuration controller 2.5µA VSUP From configuration controller Over temperature detector Reader module output Command
line
VBAT
line
Current limitation
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MC33690
COMMUNICATION MODES DESCRIPTION
STARC offers different communication modes. Therefore used standalone circuit connected Electronic Control Unit (ECU) through line directly connected microcontroller case single board architecture.
Table Communication modes description Configuration Type type Name Configuration pins Mode1 Mode2 status function description
output/input demodulator output, amplitude modulation input shutdown/wake-up must connected VSUP DOUT forces level output demodulator output input amplitude modulation input, shutdown/wake-up DOUT forces level DOUT output demodulator output input amplitude modulation input MODE2 input shutdown/wake-up output/input (standalone 9141 interface) driven monitored input (standalone 9141 interface) monitored disabled
wire (VBAT)
Standalone
wires (VBAT)
Direct connection
wires (VDD)
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STANDALONE CONFIGURATION WITH WIRE
When level applied pins MODE1 MODE2, circuit configuration (standalone single wire configuration, figure page 18). After power circuit into read mode. demodulator output directly routed 9141 interface output circuit into write mode anytime violation possible patterns single wire during more than 1ms. Then line achieves amplitude modulation switching on/off both antenna drivers. After inactivity challenge phase (bus idle recessive state), circuit back into read mode. circuit into standby mode forcing line zero during more than after entering write mode. Once line released, circuit sends acknowledge pulse before entering into standby mode. standby mode, oscillator most internal biasing currents switched off. Therefore, functions (tag reader, 9141 driver) inactive except voltage regulator 9141 receiver driver output forces level high level. rising edge wakes circuit. After completion wake-up sequence, circuit automatically read mode. configuration DOUT outputs always force level, disabled.
Figure Mode access description wire configuration
Read write mode line
read mode
write mode
Write read mode line
write mode
read mode
Write standby mode line
write mode
acknowledge standby mode
Standby mode read mode line
standby mode wake-up sequence read mode
Figure Configuration state diagram
line
write reset read
TD1/2 line high
line high
line
write
TD1/2 switching
line
wake
standby
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MC33690
Timing definitions 8MHz crystal: Tref crystal oscillator period (125 typ.) T0=8064.Tref 1.008ms typ. T0'=7932.Tref 0.992ms typ. T1=16256.Tref 2.032ms typ. T1'=16128.Tref 2.016ms typ. T2=4096.Tref, 512µs typ. minimum time required guarantee that device toggles from read write from write read). indeed, STARC toggle from read write from write read) between T0'. minimum time required guarantee that device toggles from write standby. indeed, STARC toggle standby between T1'.
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STANDALONE CONFIGURATION WITH WIRES
When level applied MODE1 high level MODE2, circuit configuration (standalone wires configuration, figure page 19). output sending demodulated data. VSUP referenced input receiving amplitude modulation shutdown/wake-up commands. Forcing high levels achieves amplitude modulation switching on/off both antenna drivers. Meanwhile, this amplitude modulation monitored output. This allows antenna short open circuit diagnosis. circuit into standby mode forcing line zero during more than circuit sends acknowledge pulse before entering into standby mode standby mode, oscillator most internal biasing currents switched off. Therefore, functions (tag reader, 9141 driver) inactive except voltage regulator 9141 receiver driver output forces level high level. rising edge wakes circuit. After completion wake-up sequence, circuit automatically read mode. configuration DOUT outputs always force level, disabled.
Figure Modes access description wires configuration
Read write sequences line
data read drivers
drivers
data write modulation
data write
line Entering into standby mode line
acknowledge
line monitoring
standby mode
line
Coming standby mode line
standby mode wake-up sequence data read
line
Figure Configuration state diagram
reset TD1/2 switching
line
line high line high TD1/2 wake line line
standby
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DIRECT CONNECTION MICROCONTROLLER CONFIGURATION
When high level applied MODE1, circuit configuration (direct connection microcontroller configuration, figure page 19). demodulated data sent through DOUT. referenced input receiving command. Forcing high levels achieves amplitude modulation switching on/off both antenna drivers. Meanwhile, this amplitude modulation monitored DOUT. This allows antenna short open circuit diagnosis. circuit into standby mode applying level MODE2 pin. standby mode, oscillator most internal biasing currents switched off. Therefore, functions (tag reader, 9141 interface) inactive except voltage regulator. driver outputs frozen their state (high level) before entering into standby mode. DOUT forces level. 9141 interface standalone directly controlled input monitored output Applying logic high level switches output driver (dominant zero state when external pull-up resistor connected between VBAT). Applying logic level turns driver (one recessive state). monitors voltage pin. When voltage below threshold voltage, forces logic level. When voltage above high threshold voltage, forces logic high level. standby mode, disabled output monitors voltage pin.
Figure Configuration state diagram
reset TD1/2 switching
high high TD1/2 wake mode2 mode2 high mode2
standby
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ELECTRICAL CHARACTERISTICS
Typical values reflect average measurements SUP=12V TJ=25°C.
SUPPLY CURRENT
VSUP 16V, -40°C +125°C, unless otherwise noted Parameter
VSUP Standby mode current Operating mode current SUP1 SUP2 note
Symbol
Test Conditions Comments
Unit Type
Note Circuit configuration current sunk from VDD, drivers TD1/2 switched off, forced low.
VOLTAGE REGULATOR
VSUP 16V, -40°C +125°C, unless otherwise noted Parameter
Pins VSUP Output Voltage (5.5V 40V) Total Output Current Load Regulation Output Voltage (5.5V 40V) VDD1 VDD1 LoadReg1 VDD2 VDD2 LoadReg2 LineReg Without external transistor 50mA Without external transistor 50mA change With external transistor, notes 150mA With external transistor 150mA change 4.75 5.25
Symbol
Test Conditions Comments
Unit Type
1.11 Total Output Current Load Regulation Line Regulation 16V)
Note stability ensured with decoupling capacitor between 10µF with Note current capability increased 150mA using external channel transistor (see figure page main characteristics choosing this component 1.8V BVDSS 40V.
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VOLTAGE RESET
VSUP 16V, -40°C +125°C, unless otherwise noted Parameter
Voltage Reset Threshold Voltage Reset Hysteresis LVRON LVRH LVRUP ILLVR IHLVR note figure VLVR 2.5V VLVR 2.5V 4.35
Symbol
Test Conditions Comments
Unit Type
1.12 Pull-up Current 1.13 Output Resistance reset condition 1.14 Input Voltage 1.15 Input High Voltage
Note voltage regulator voltage reset using same internal voltage reference, ensured that voltage reset will only occur when voltage regulator regulation.
Figure voltage reset waveform VLVRON VLVRH VLVRON
OSCILLATOR
VSUP 16V, -40°C +125°C, unless otherwise noted Characteristic
Pins XTAL1, XTAL2 Input Capacitance Voltage gain XTAL2 XTAL1 Clock input level XTAL1 XTAL1 XTAL1 2.5V XTAL1 2.5V note
Symbol
Test Condition Comments
Unit Type
Note This level ensures circuit operation with 8MHz clock. applied through capacitive coupling. resistor connected between XTAL1 XTAL2 biases oscillator input.
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READER
VSUP 16V, -40°C +125°C, unless otherwise noted Parameter
DEMODULATOR (pin Input Voltage Range Input Modulation Frequency Demodulator Sensitivity INRD SENSE1 6.5V figure note 6.5V figure note figure Configuration note2 configurations
Symbol
Test Conditions Comments
Unit Type
2.31 Demodulator Sensitivity
SENSE2
Demodulation Delay
Demod
After Write Pulse Settling Time Recovery Time after wake-up reset from clock stable demodulator valid output
Settling1 Settling2 note
DRIVERS (pins TD1, TD2) Output Carrier Frequency Crystal Frequency Ratio FTD/
FXTAL
LOAD 150mA LOAD -150mA
Turn on/off Delay Driver1/2 Side Out. Resistance Driver1/2 High Side Out. Resistance
on/off
Note sensitivity measured following application conditions IANTENNA 50mA peak, peak, 10nF, square wave modulation FMOD=FTD1/32. Note including delay slew rate output. Note Clock stable condition implies VXTAL1 meets specification (see page 15).
Figure Demodulator parameters definition
VSENSE
Demodulator output DOUT)
tDemod
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9141 INTERFACE
VSUP 16V, -40°C +125°C, unless otherwise noted Parameter
Receiver (pins Input Voltage Input High Voltage Input Hysteresis Voltage Biasing Current tdkrx 0.65 0.65
Symbol
Test Conditions Comments
Unit Type
4.31 Input Current delay
Driver (pin Output Falling Edge Slew Rate Output Rising Edge Slew Rate Rise Fall Slew Rates Symmetry Output Voltage Input Current (driver switched off) Current Limitation Threshold Thermal Shutdown Threshold SYMETRY
Pull-up 510, note LOAD 25mA
SDWN
Note Calculated from output swing.
DIGITAL
VSUP 16V, -40°C +125°C, unless otherwise noted Characteristic
INPUT (pins MODE1, MODE2, Input Voltage Input High Voltage Input Hysteresis Voltage
Symbol
Test Condition Comments
Unit Type
OUTPUT (pins DOUT,RX) Output Voltage Output High Voltage Fall/Rise Time LOAD 500uA LOAD -500uA LOAD =10pF, note
Note Calculated from output swing.
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APPLICATION SCHEMES
Figure Standalone configuration with wire
VBAT GATE SOURCE CEXT
10nF
VSUP
100n
XTAL1 XTAL2
8.2pF
8MHz
8.2pF
STARC
MODE1 MODE2 DOUT VSUP
CEXT
VBAT
AGND
external transistor necessary increase voltage regulator current capability, pins GATE SOURCE must left unconnected. this configuration, outputs DOUT force level. required STARC functionality only acts reservoir energy. preserve demodulator sensitivity, CEXT should connected AGND, connected AGND using resistance path.
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MC33690
Figure Standalone configuration with wires
VBAT GATE SOURCE CEXT
10nF
VSUP
XTAL1 XTAL2
8.2pF
100n
8MHz
8.2pF
STARC
MODE1 MODE2 DOUT
VBAT
CEXT
AGND
external transistor necessary increase voltage regulator current capability, pins GATE SOURCE must left unconnected. required STARC functionality only acts reservoir energy. preserve demodulator sensitivity, CEXT should connected AGND, connected AGND using resistance path.
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MC33690
Figure Direct connection microcontroller
VBAT GATE microcontroller power supply SOURCE CEXT
10nF
VSUP
microcontroller port/reset XTAL1 XTAL2
8.2pF
100n
8MHz
8.2pF
STARC
MODE1 MODE2 DOUT microcontroller port VBAT
CEXT
AGND microcontroller port
external transistor necessary increase voltage regulator current capability, pins GATE SOURCE must left unconnected. required STARC functionality only acts reservoir energy. preserve demodulator sensitivity, CEXT should connected AGND, connected AGND using resistance path.
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MC33690
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
reach USA/ EUROPE/ Locations Listed: Motorola Literature Distribution; P.O. 5405, Denver, Colorado 80217. 1-303-675-2140 1-800-441-2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu. Minato-ku, Tokyo 106-8573 Japan. 81-3-3440-3569 ASIA/ PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, King Street, Industrial Estate, N.T., Hong Kong. 852-26668334 Technical Information Center: 1-800-521- Revision 1.5, November 2001
MC33690/D
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