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Intel® Desktop Board D815EEA2 / D815EPEA2

May 2001 Order Number A46399-002

Intel® Desktop Board D815EEA2 / D815EPEA2
Technical Product Specification
May 2001 Order Number A46399-002
The Intel® Desktop Boards D815EEA2 and D815EPEA2 may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata are documented in the Intel Desktop Board D815EEA2 / D815EPEA2 Specification Update.
Revision History
Revision -001 -002 Revision History First release of the Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification Second release of the Intel® Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification Intel® Date February 2001 May 2001
This product specification applies to only standard D815EEA2 and D815EPEA2 boards with BIOS identifier EA81520A.86A. Changes to this specification will be published in the Intel Desktop Board D815EEA2 / D815EPEA2 Specification Update before being incorporated into a revision of this document.
Other names and brands may be claimed as the property of others.
Copyright 2001, Intel Corporation. All rights reserved.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors, power and environmental requirements, and the BIOS for these Intel Desktop Boards: D815EEA2 and D815EPEA2. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the D815EEA2 and D815EPEA2 boards and their components to the vendors, system integrators, and other engineers and technicians who need this level of information. It is specifically not intended for general audiences.
What This Document Contains
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Other Common Notation
# (NxnX) Used after a signal name to identify an active-low signal (such as USBP0#) When used in the description of a component, N indicates component type, xn are the relative coordinates of its location on the D815EEA2 and D815EPEA2 boards, and X is the instance of the particular part at that general location. For example, J5J1 is a connector, located at 5J. It is the first connector in the 5J area. Gigabyte (1, 073, 741, 824 bytes) Kilobyte (1024 bytes) Kilobit (1024 bits) 1000 bits per second Megabyte (1, 048, 576 bytes) Megabytes per second Megabit (1, 048, 576 bits) Megabits per second An address or data value ending with a lowercase h indicates a hexadecimal value. Volts. Voltages are DC unless otherwise specified. This symbol is used to indicate third-party brands and names that are the property of their respective owners.
GB KB Kbit kbits / sec MB MB / sec Mbit Mbit / sec xxh x.x V
Contents
1 Product Description
2 Technical Reference
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
DMA Channels ......................................................60 PCI Configuration Space Map ..........................................60 Interrupts ..........................................................61 PCI Interrupt Routing Map .............................................61 Connectors .........................................................63 2.8.1 Back Panel Connectors........................................64 2.8.2 Internal I / O Connectors ........................................68 2.8.3 External I / O Connectors ........................................78 Jumper Blocks ......................................................82 2.9.1 Front Panel Audio Connector / Jumper Block .........................82 2.9.2 BIOS Setup Configuration Jumper Block...........................83 Mechanical Considerations.............................................84 2.10.1 Form Factor.................................................84 2.10.2 I / O Shields..................................................85 Electrical Considerations ..............................................92 2.11.1 Power Consumption ...........................................92 2.11.2 Add-in Board Considerations....................................94 2.11.3 Standby Current Requirements ..................................94 2.11.4 Fan Connector Current Capability ................................95 2.11.5 Power Supply Considerations ...................................95 Thermal Considerations...............................................96 Reliability ..........................................................97 Environmental.......................................................98 Regulatory Compliance ...............................................99 2.15.1 Safety Regulations ............................................99 2.15.2 EMC Regulations .............................................99 2.15.3 Product Certification Markings (Board Level).......................100
3 Overview of BIOS Features
3.1 3.2 3.3 Introduction........................................................101 BIOS Flash Memory Organization ......................................102 Resource Configuration ..............................................102 3.3.1 PCI Autoconfiguration ........................................102 3.3.2 IDE Support................................................102 3.4 System Management BIOS (SMBIOS) ...................................103 3.5 Legacy USB Support ................................................104 3.6 BIOS Updates......................................................105 3.6.1 Language Support...........................................105 3.6.2 Custom Splash Screen........................................105 3.7 Recovering BIOS Data ...............................................106 3.8 Boot Options.......................................................107 3.8.1 CD-ROM and Network Boot ....................................107 3.8.2 Booting without Attached Devices ...............................107 3.9 Fast Booting Systems with Intel® Rapid BIOS Boot .........................107 3.9.1 Peripheral Selection and Configuration ...........................108 3.9.2 Intel Rapid BIOS Boot ........................................108 3.9.3 Operating System Selection ....................................108 3.10 BIOS Security Features ..............................................109
Contents
4 BIOS Setup Program
5 Error Messages and Beep Codes
Figures
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Tables
Contents
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Hard Disk Drives Submenu............................................132 Removeable Devices Submenu........................................132 ATAPI CDROM Drives Submenu.......................................133 Exit Menu .........................................................133 BIOS Error Messages................................................135 Uncompressed INIT Code Checkpoints..................................137 Boot Block Recovery Code Checkpoints..................................137 Runtime Code Uncompressed in F000 Shadow RAM........................138 Bus Initialization Checkpoints ..........................................141 Upper Nibble High Byte Functions ......................................141 Lower Nibble High Byte Functions ......................................142 Beep Codes.......................................................143 Diagnostic LED Codes...............................................145
1 Product Description
What This Chapter Contains
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.10 1.11 1.12 1.13 1.14 1.15 Board Differences....................................................12 Overview ..........................................................14 Online Support......................................................19 Operating System Support.............................................19 Design Specifications .................................................20 Processor ..........................................................23 System Memory.....................................................24 Chipsets ...........................................................26 I / O Controller .......................................................36 Graphics Subsystems.................................................38 Audio Subsystem....................................................43 LAN Subsystem (Optional) .............................................45 Hardware Management Subsystem......................................46 CNR Connector (Optional).............................................47 Power Management..................................................48
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.1 Board Differences
1.1.1 Feature Level Differences
This TPS describes these Intel® Desktop boards: D815EEA2 and D815EPEA2. Table 1 summarizes the differences between these boards.
Table 1.
D815EEA2
Summary of Board Differences
· Includes the Intel® 815E Chipset, which includes the Intel® 82815 Graphics and Memory Controller Hub (GMCH) · Provides these video features: AGP universal connector and an optional Digital Video Output (DVO) connector
D815EPEA2
· Includes the Intel® 815EP Chipset, which includes the Intel® 82815EP Memory Controller Hub (MCH) · Provides this video feature: AGP universal connector
Product Description
Identifying Universal Boards
The Universal versions of the D815EEA2 and D815EPEA2 can be identified by an uppercase "U" on the silkscreen of the board. Figure 1 shows the location of the Universal board designator.
INTEL DESKTOP BOARD D815EEA2 / D815EPEA2
BATTERY
SIDE UP XBT1061
OM12012
Figure 1. Location of Universal Board Designator
Unless otherwise stated, all information pertaining to standard boards also apply to Universal boards.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.2 Overview
1.2.1 Feature Summary
Feature Summary
ATX (11.55 inches by 8.20 inches) Support for either an Intel® Pentium® III processor in a Flip Chip Pin Grid Array (FC-PGA) package or an Intel® Celeron processor in an FC-PGA package · Three 168-pin SDRAM Dual Inline Memory Module (DIMM) sockets · Support for up to 512 MB system memory · Support for single-sided or double-sided DIMMs Chipsets · The D815EEA2 board includes the Intel 815E Chipset, consisting of: Intel 82815 Graphics and Memory Controller Hub (GMCH) Intel® 82801BA I / O Controller Hub (ICH2) SST 49LF004A 4 Mbit Firmware Hub (FWH) · The D815EPEA2 board includes the Intel 815EP Chipset, consisting of: Intel 82815EP Memory Controller Hub (MCH) Intel 82801BA I / O Controller Hub (ICH2) I / O Control Video
Table 2.
Processor Memory
Form Factor
SST 49LF004A 4 Mbit Firmware Hub (FWH) SMSC LPC47M132 LPC bus I / O controller
· The D815EEA2 board includes: Intel 82815 integrated graphics support AGP universal connector supporting 1x, 2x, and 4x AGP cards or a Graphics Performance Accelerator (GPA) · The D815EPEA2 board includes an AGP universal connector supporting 1x, 2x, and 4x AGP cards · Intel 82801BA ICH2 digital controller (AC link output) · Analog Devices AD1885 Audio Codec · Four Universal Serial Bus (USB) ports · Two serial ports · One parallel port · Two IDE interfaces with Ultra DMA, ATA-66 / 100 support · One diskette drive interface · PS / 2 keyboard and mouse ports
Audio Peripheral Interfaces
Expansion Capabilities BIOS
· Five PCI bus add-in card connectors (SMBus routed to PCI bus connector 2) · One AGP universal connector · Intel / AMI BIOS (stored in an SST 49LF004A 4 Mbit FWH) · Support for Advanced Power Management (APM), Advanced Configuration and Power Interface (ACPI), Plug and Play, and SMBIOS continued
Product Description
Table 2.
Feature Summary (continued)
· Support for PCI Local Bus Specification Revision 2.2 · Suspend to RAM support · Wake on PS / 2 keyboard and USB ports · Voltage sense to detect out of range values · Two fan sense inputs used to monitor fan activity Allows add-in SCSI host bus adapters to use the same LED as the onboard I / O controller Refer to Table 4, page 20
Instantly Available PC
Hardware Monitor Subsystem SCSI LED Connector For information about
Manufacturing Options
Table 3. Manufacturing Options
Connector for an additional chassis fan Detects chassis intrusion One CNR connector (slot shared with PCI bus connector 3)
Chassis fan connector Chassis Intrusion Connector Communication and Networking Riser (CNR) Connector Diagnostic LEDs Front Panel Audio Connector Front Panel USB Connector I / O Control LAN Subsystem Video Wake on LAN Technology Connector
Four dual-color LEDs on the back panel Routes mic in and line out to the front panel Provides access to two additional USB ports, routed through the optional SMSC LPC47M142 I / O controller SMSC LPC47M142 LPC bus I / O controller Intel® 82562ET 10 / 100 Mbit / sec Platform LAN Connect (PLC) device Digital Video Output (DVO) connector Support for system wake up using an add-in network interface card with remote wake up capability
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Board Layout
Figure 2 shows the location of the major components on the D815EEA2 and D815EPEA2 boards.
OM11461
Present only on D815EEA2 boards
Communication and Networking Riser (CNR) connector (optional) AD1885 audio codec AGP universal connector Back panel connectors DVO connector (optional) · Intel 82815 Graphics and Memory Controller Hub (GMCH) (D815EEA2 boards) · Intel 82815EP Memory Controller Hub (MCH) (D815EPEA2 boards) Processor socket DIMM sockets Secondary IDE connector
Primary IDE connector Speaker Power connector Diskette drive connector SMSC LPC47M132 I / O Controller Intel 82801BA I / O Controller Hub (ICH2) Serial port B connector Front panel connectors SST 49LF004A 4 Mbit Firmware Hub (FWH) Battery Front panel USB connector (optional) PCI bus add-in card connectors
Figure 2. Board Components
Product Description
Block Diagrams
Figure 3 is a block diagram of the major functional areas of the D815EEA2 board.
Primary / Secondary IDE
ATA-66 / 100 USB USB Ports 0 and 1 USB Ports 2 and 3
Processor Socket
System Bus
815E Chipset
SDRAM Bus DIMM Banks (3) 82815 Graphics and Memory Controller Hub (GMCH) AHA Bus 82801BA I / O Controller Hub (ICH2) SST 49LF004A Firmware Hub (FWH)
LPC Bus DVO Connector (Optional) Digital Video Output Diskette Drive Connector Serial Port A Serial Port B Parallel Port PS / 2 Mouse PS / 2 Keyboard
Video Bus
AGP Universal Connector
AGP Bus
LPC I / O Controller Onboard Video
PCI Bus
Analog Codec
PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5 Physical Layer Interface Optional AC Link
CD-ROM Line In Line Out Mic In Auxiliary Line In Front Panel Audio (optional)
CNR Connector
Network Hardware Monitor SMBus
LAN Connector
indicates connector or socket
OM11889
Figure 3. Block Diagram for the D815EEA2 Board
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Figure 4 is a block diagram of the major functional areas of the D815EPEA2 board.
Primary / Secondary IDE
ATA-66 / 100 USB USB Ports 0 and 1 USB Ports 2 and 3
Processor Socket
System Bus
815EP Chipset
SDRAM Bus DIMM Banks (3) 82815EP Memory Controller Hub (MCH) AHA Bus 82801BA I / O Controller Hub (ICH2) SST 49LF004A Firmware Hub (FWH)
LPC Bus AGP Universal Connector Diskette Drive Connector Serial Port A Serial Port B Parallel Port PS / 2 Mouse PS / 2 Keyboard
AGP Bus
PCI Bus
LPC I / O Controller
PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5 Analog Codec CD-ROM Line In Line Out Mic In Auxiliary Line In Front Panel Audio (optional)
Optional Hardware Monitor SMBus AC Link CNR Connector
Network
Physical Layer Interface
LAN Connector
indicates connector or socket
OM11890
Figure 4. Block Diagram for the D815EPEA2 Board
Product Description
1.3 Online Support
1.4 Operating System Support
The D815EEA2 and D815EPEA2 boards support drivers for all of the onboard hardware and subsystems under the following operating systems: · Windows 98 / 98SE · Windows ME · Windows NT 4.0 · Windows 2000
For information about Supported drivers Refer to Section 1.3
Third party vendors may offer other drivers.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.5 Design Specifications
Table 4 lists the specifications applicable to the D815EEA2 and D815EPEA2 boards, except for the AIMM and GPA entries, which apply only to the D815EEA2 board.
Table 4.
Specifications
Advanced Configuration and Power Interface Specification
Accelerated Graphics Port Interface Specification AGP Inline Memory Module
http://www.agpforum.org /
AIMM (for Graphics Performance Accelerator cards) AMI BIOS
http://developer.intel.com / technology / memory / aimm / 298177.htm
American Megatrends BIOS Specification Advanced Power Management BIOS Interface Specification Information Technology AT Attachment with Packet Interface - 5 (ATA / ATAPI-5) ATX Specification
AMIBIOS 99, 1999, American Megatrends, Inc. Version 1.2, February 1996, Intel Corporation and Microsoft Corporation. Revision 3, February 29, 2000, Contact: T13 Chair, Seagate Technology. Version 2.03, December 1998, Intel Corporation. Revision 1.1, October 18, 2000, Intel Corporation.
ATA / ATAPI-5
http://www.t13.org
http://www.formfactors.org / developer / specs / atx / atxspecs.htm http://developer.intel.com / technology / cnr / index.htm continued
Communication and Network Riser (CNR) Specification
Product Description
Table 4.
Reference Name DVI
Specifications (continued)
Specification Title Digital Visual Interface DVI Version, Revision Date and Ownership Revision 1.0, April 2, 1999, Intel Corporation, Silicon Image Incorporated, Compaq Computer Corporation, Fujitsu Limited, Hewlett-Packard Company, and NEC Corporation. Version 1.7, 1997, Institute of Electrical and Electronic Engineers. Version 1.0, January 25, 1995, Phoenix Technologies Limited and International Business Machines Corporation. The information is available from.. http://www.ddwg.org / downloads.html
IEEE Std 1284.1-1997 (Enhanced Parallel Port)
El Torito
Bootable CD-ROM Format Specification
GPA (see AIMM) LPC Low Pin Count Interface Specification PCI Local Bus Specification PCI Bus Power Management Interface Specification Plug and Play Plug and Play BIOS Specification Version 1.0, September 29, 1997, Intel Corporation. Version 2.2, December 18, 1998, PCI Special Interest Group. Version 1.1, December 18, 1998, PCI Special Interest Group. Version 1.0a, May 5, 1994, Compaq Computer Corporation, Phoenix Technologies Limited, and Intel Corporation. http://www.intel.com / design / chipsets / industry / lpc.htm http://www.pcisig.com /
http://www.pcisig.com /
http://www.microsoft.com / hwdev / respec / pnpspecs.htm
continued
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Table 4.
Reference Name SDRAM
Specifications (continued)
Specification Title PC SDRAM Unbuffered DIMM Specification PC SDRAM Specification Version, Revision Date and Ownership Revision 1.0, February 1998, Intel Corporation. Revision 1.7, November 1999, Intel Corporation. Revision 1.2B, November 1999, Intel Corporation. Version 2.3.1, March 16, 1999, American Megatrends Incorporated, Award Software International Incorporated, Compaq Computer Corporation, Dell Computer Corporation, Hewlett-Packard Company, Intel Corporation, International Business Machines Corporation, Phoenix Technologies Limited, and SystemSoft Corporation. Revision 1.1, March 1996, Intel Corporation. Version 1.1, September 23, 1998, Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, and NEC Corporation. Version 2.0, December 18, 1998, Intel Corporation. The information is available from.. http://www.intel.com / technology / memory http://www.intel.com / technology / memory http://www.intel.com / technology / memory http://developer.intel.com / ial / wfm / design / smbios
PC Serial Presence Detect (SPD) Specification SMBIOS System Management BIOS
Universal Host Controller Interface Design Guide Universal Serial Bus Specification
http://www.usb.org / developers http://www.usb.org / developers
Wired for Management Baseline
http://developer.intel.com / ial / WfM / wfmspecs.htm
Product Description
1.6 Processor
CAUTION
Use only the processors listed below. Use of unsupported processors can damage the board, the processor, and the power supply. See the Intel Desktop D815EEA2 / D815EPEA2 Specification Update for the most up-to-date list of supported processors for the D815EEA2 and D815EPEA2 boards. The D815EEA2 and D815EPEA2 boards both support a single Pentium III or Celeron processor. The system bus frequency is automatically selected. The D815EEA2 and D815EPEA2 boards support the processors listed in Table 5.
Table 5.
Type Pentium III processor in an FC-PGA package
Supported Processors
Designation 533EB, 600EB, 667, 733, 800B, 866, and 933 MHz 1.0 GHz 500E, 550E, 600E, 650, 700, 750, 800, and 850 MHz 100 MHz 100 MHz 66 MHz 256 KB 128 KB 128 KB System Bus Frequency 133 MHz L2 Cache Size 256 KB
Celeron processor in an FC-PGA package
800 and 850 MHz 533A, 566, 600, 633, 667, 700, 733, and 766 MHz
For information about Product information on supported processors Processor data sheets Refer to Section 1.3, page 19 Section 1.3, page 19
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.7 System Memory
CAUTION
Before installing or removing memory, make sure that AC power is disconnected by unplugging the power cord from the computer. Failure to do so could damage the memory and the board.
Remove the AGP video card before installing or upgrading memory to avoid interference with the memory retention mechanism.
To be fully compliant with all applicable Intel® SDRAM memory specifications, the board should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance. If non-SPD memory is installed, the BIOS will attempt to correctly configure the memory settings, but performance and reliability may be impacted or the DIMMs may not function under the determined frequency. The D815EEA2 and D815EPEA2 boards both have three DIMM sockets and support the following memory features: · 3.3 V (only) 168-pin SDRAM DIMMs with gold-plated contacts · Unbuffered single-sided or double-sided DIMMs · Maximum total system memory: 512 MB minimum total system memory: 64 MB · 133 MHz SDRAM or 100 MHz SDRAM · Serial Presence Detect (SPD) and non-SPD memory · Non-ECC and ECC DIMMs (ECC DIMMs will operate in non-ECC mode only) · Suspend to RAM When installing memory, note the following: · Non-SPD DIMMs will always revert to a 100 MHz with 3-3-3 timing SDRAM bus. · Mixing Non-SPD DIMMs with SPD DIMMs will always revert to a 100 MHz with 3-3-3 timing SDRAM bus. · The BIOS will not initialize installed memory above 512 MB. · Mixed memory speed configurations (133 and 100 MHz) will default to 100 MHz. · 133 MHz SDRAM operation requires a 133 MHz system bus frequency processor. · The board should be populated with no more than four rows of 133 MHz SDRAM (two doublesided or one double-sided plus two single-sided DIMMs). · 100 MHz SDRAM may be populated with six rows of SDRAM (three double-sided DIMMs).
At boot, the BIOS displays a message indicating that any installed memory above 512 MB has not been initialized.
Product Description
If more than four rows of 133 MHz SDRAM are populated, the BIOS will display a message indicating that it will initialize installed memory up to 512 MB at 100 MHz.
For information about Obtaining the PC Serial Presence Detect (SPD) Specification Refer to Table 4, page 19
Table 6 lists the supported DIMM configurations.
Table 6.
DIMM Capacity 32 MB 32 MB 48 MB 64 MB 64 MB 64 MB 96 MB 96 MB 128 MB 128 MB 128 MB 128 MB 192 MB 192 MB 256 MB 256 MB 256 MB 512 MB
Notes: 1. 2. 3. If the number of SDRAM devices is greater than nine, the DIMM will be double sided. Front side population / back side population indicated for SDRAM density and SDRAM organization. In the second column, "DS" refers to double-sided memory modules (containing two rows of SDRAM) and "SS" refers to single-sided memory modules (containing one row of SDRAM).
Supported Memory Configurations
Number of Sides DS SS DS DS SS SS DS DS DS DS SS SS DS DS DS DS SS DS SDRAM Density 16 Mbit 64 Mbit 64 / 16 Mbit 64 Mbit 64 Mbit 128 Mbit 64 Mbit 128 / 64 Mbit 64 Mbit 128 Mbit 128 Mbit 256 Mbit 128 Mbit 128 / 64 Mbit 128 Mbit 256 Mbit 256 Mbit 256 Mbit SDRAM Organization Front-side / Back-side 2 M x 8 / 2 M x 8 4 M x 16 / empty 4 M x 16 / 2 M x 8 4 M x 16 / 4 M x 16 8 M x 8 / empty 8 M x 16 / empty 8 M x 8 / 4 M x 16 8 M x 16 / 4 M x 16 8 M x 8 / 8 M x 8 8 M x 16 / 8 M x 16 16 M x 8 / empty 16 M x 16 / empty 16 M x 8 / 8 M x 16 16 M x 8 / 8 M x 8 16 M x 8 / 16 M x 8 16 M x 16 / 16 M x 16 32 M x 8 / empty 32 M x 8 / 32 M x 8 Number of SDRAM devices 16 (Note 1) 4 12 (Notes 1 and 2) 8 8 4 12 (Notes 1 and 2) 8 (Notes 1 and 2) 16 (Note 1) 8 (Notes 1 and 2) 8 4 12 (Notes 1 and 2) 16 (Notes 1 and 2) 16 (Notes 1 and 2) 8 (Notes 1 and 2) 8 16 (Notes 1 and 2)
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.8 Chipsets
This section describes the chipsets used by the D815EEA2 and D815EPEA2 boards: · The D815EEA2 board uses the Intel 815E Chipset, described below. · The D815EPEA2 board uses the Intel 815EP Chipset, described in Section 1.8.2, beginning on page 31.
Intel® 815E Chipset
ATA-66 / 100 System Bus SDRAM Bus Network USB
815E Chipset
82815 Graphics and Memory Controller Hub (GMCH) AHA Bus 82801BA I / O Controller Hub (ICH2) SST 49LF004A Firmware Hub (FWH)
Digital Video Display AGP Output Interface Bus
LPC Bus SMBus PCI Bus AC Link
OM11891
Figure 5. Intel 815E Chipset Block Diagram
Product Description
Intel® 82815 Graphics and Memory Controller Hub (GMCH)
The GMCH provides the following: · An integrated Synchronous DRAM memory controller with autodetection of SDRAM · An interface for a single AGP device or a Graphics Performance Accelerator (GPA) card · An interface for an optional digital video output (DVO) connector for a flat panel, digital CRT, or TV-out · Support for ACPI Rev. 2.0 and APM Rev. 1.2 compliant power management
Intel® 82801BA I / O Controller Hub (ICH2)
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections, noise, and inductive coupling.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Product Description
Standard Configuration
USB ports 0 and 1 82801BA I / O Controller Hub (ICH2) USB USB ports 2 and 3 Back panel USB connectors Back panel USB connectors
Optional Configuration
USB ports 0 and 2 82801BA I / O Controller Hub (ICH2) USB CNR connector USB USB ports 1 and 3 SMSC LPC47M142 LPC Bus I / O Controller USB USB ports 4 and 5 Front panel USB connector Back panel USB connectors USB port accesible through a USB connector on an optional CNR add-in card Back panel USB connectors
OM11892
Figure 6. USB Port Configurations
Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use shielded cable that meets the requirements for full-speed devices.
For information about The location of the USB connectors on the back panel The signal names of the back panel USB connectors The location of the optional front panel USB connector The signal names of the optional front panel USB connector The USB specification and UHCI Refer to Figure 13, page 64 Table 21, page 65 Figure 16, page 78 Table 45, page 79 Table 4, page 20
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Real-Time Clock, CMOS SRAM, and Battery
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS SRAM at power-on.
SST 49LF004A 4 Mbit Firmware Hub (FWH)
The system BIOS is stored in the FWH.
Product Description
Intel® 815EP Chipset
ATA-66 / 100 System Bus SDRAM Bus Network USB
815EP Chipset
82815EP Memory Controller Hub (MCH) AHA Bus 82801BA I / O Controller Hub (ICH2) SST 49LF004A Firmware Hub (FWH)
LPC Bus AGP Bus SMBus PCI Bus AC Link
OM11318
Figure 7. Intel 815EP Chipset Block Diagram
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Intel® 82815EP Memory Controller Hub (MCH)
The MCH provides the following: · An integrated Synchronous DRAM memory controller with autodetection of SDRAM · An interface for a single AGP device · Support for ACPI Rev. 2.0 and APM Rev. 1.2 compliant power management
Intel 82801BA I / O Controller Hub (ICH2)
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections, noise, and inductive coupling.
Product Description
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Standard Configuration
USB ports 0 and 1 82801BA I / O Controller Hub (ICH2) USB USB ports 2 and 3 Back panel USB connectors Back panel USB connectors
Optional Configuration
USB ports 0 and 2 82801BA I / O Controller Hub (ICH2) USB CNR connector USB USB ports 1 and 3 SMSC LPC47M142 LPC Bus I / O Controller USB USB ports 4 and 5 Front panel USB connector Back panel USB connectors USB port accesible through a USB connector on an optional CNR add-in card Back panel USB connectors
OM11892
Figure 8. USB Port Configurations
Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use shielded cable that meets the requirements for full-speed devices.
For information about The location of the USB connectors on the back panel The signal names of the back panel USB connectors The location of the optional front panel USB connector The signal names of the optional front panel USB connector The USB specification and UHCI Refer to Figure 13, page 64 Table 21, page 65 Figure 16, page 78 Table 45, page 79 Table 4, page 20
Product Description
Real-Time Clock, CMOS SRAM, and Battery
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS SRAM at power-on.
SST 49LF004A 4 Mbit Firmware Hub (FWH)
The system BIOS is stored in the FWH.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.9 I / O Controller
The D815EEA2 and D815EPEA2 boards support either of two I / O controllers: · The standard SMSC LPC47M132 I / O controller or · The optional SMSC LPC47M142 I / O controller Both I / O controllers provide the following features: · Low pin count (LPC) interface · 3.3 V operation · Two serial ports · One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port (EPP) support · Serial IRQ interface compatible with serialized IRQ support for PCI systems · PS / 2-style mouse and keyboard interfaces · Interface for one 1.2 MB, 1.44 MB, or 2.88 MB diskette drive · Intelligent power management, including a programmable wake up event interface · PCI power management support · Fan control One fan control output Two fan tachometer inputs The optional SMSC LPC47M142 I / O controller provides an additional USB hub. The BIOS Setup program provides configuration options for the I / O controller.
For information about The USB hubs on the D815EEA2 board The USB hubs on the D815EPEA2 board SMSC LPC47M132 and LPC47M142 I / O controllers Refer to Section 1.8.1.2.2, page 28 Section 1.8.2.2.2, page 33 http://www.smsc.com
Serial Ports
For information about The location of the serial port A connector The signal names of the serial port A connector The location of the serial port B connector The signal names of the serial port B connector Refer to Figure 13, page 64 Table 24, page 66 Figure 16, page 78 Table 44, page 79
Product Description
Parallel Port
The connector for the parallel port is a 25-pin D-Sub connector located on the back panel. In the BIOS Setup program, the parallel port can be set to the following modes: · Output only (PC-AT-compatible mode) · Bi-directional (PS / 2 compatible) · EPP · ECP
Diskette Drive Controller
The I / O controller supports one diskette drive that is compatible with the 82077 diskette drive controller and supports both PC-AT and PS / 2 modes.
For information about The location of the diskette drive connector The signal names of the diskette drive connector The supported diskette drive capacities and sizes Refer to Figure 15, page 73 Table 42, page 77 Table 72, page 123
Keyboard and Mouse Interface
PS / 2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these connectors are protected with a thermistor, which limits the current to a specified amperage.
For information about The location of the keyboard and mouse connectors The signal names of the keyboard and mouse connectors Overcurrent protection for back panel connectors Refer to Figure 13, page 64 Table 20, page 65 Table 19, page 65
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.10 Graphics Subsystems
This section describes the graphics subsystems used by the D815EEA2 and D815EPEA2 boards: · The D815EEA2 board uses the Intel 815E graphics subsystem, described below. · The D815EPEA2 board uses the Intel 815EP graphics subsystem, described in Section 1.10.2, beginning on page 42.
Intel 815E Graphics Subsystem
The 815E chipset, used on the D815EEA2 board, contains two separate, mutually exclusive graphics options. Either the integrated graphics controller (contained within the 82815 GMCH) is used, or an add-in AGP adapter can be used. The GMCH includes an integrated display cache SDRAM controller that supports a Graphics Performance Accelerator (GPA) card. The GPA card is a 32-bit 133 MHz 4 MB SDRAM array for enhanced integrated 2D and 3D graphics performance. This interface is multiplexed between the display cache interface and the AGP connector. When an AGP card is installed, the integrated graphics controller is disabled and the display cache interface is not used.
For information about GPA support Refer to Section 1.10.1.3.1, page 41
Integrated Graphics Controller
The GMCH features the following: · Integrated graphics controller 3-D Hyperpipelined architecture Full 2-D hardware acceleration Motion video acceleration · 3-D graphics visual and texturing enhancement · Display Integrated 24-bit 230 MHz RAMDAC Display Data Channel Standard, Version 3.0, Level 2B protocols compliant Video Hardware motion compensation for software MPEG2 decode · Software DVD at 30 fps Integrated graphics memory controller
Product Description
Table 7 lists the refresh frequencies supported by the graphics subsystem.
Table 7.
Resolution 320 x 200
Supported Graphics Refresh Frequencies
Color Palette 256 colors 64 K colors 16 M colors 256 colors 64 K colors 16 M colors 256 colors 64 K colors 16 M colors 256 colors 64 K colors 16 M colors 256 colors 64 K colors 16 M colors 256 colors 64 K colors 16 M colors 256 colors 64 K colors 16 M colors Available Refresh Frequencies (Hz) 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 60, 70, 72, 75, 85 60, 75, 85 70, 72 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 75, 85 60, 70, 75 85 60, 70, 75, 85 Notes D D3 D D D3 D D D3 D D D3 D D D3 D D D3 D D D3 D KDO KD3O KDO KDO KDO KD3O KDO KDO KD3O KD3 KD continued
320 x 240
352 x 480
352 x 576
400 x 300
512 x 384
640 x 400
640 x 480
256 colors 64 K colors 64 K colors
640 x 480 800 x 600
16 M colors 256 colors 64 K colors 16 M colors
1024 x 768
256 colors 64 K colors 64 K colors 16 M colors
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Table 7.
Resolution 1152 x 864
Supported Graphics Refresh Frequencies (continued)
Color Palette 256 colors 256 colors 64 K colors 64 K colors 16 M colors 16 M colors Available Refresh Frequencies (Hz) 60, 70, 72, 75 85 60, 70 72, 75, 85 60 75, 85 60 (reduced blanking) 60 (reduced blanking) 60 (reduced blanking) 60 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 75, 85 60, 70, 72, 75 Notes KDO KD KD3O KD3 KDO KD KDOF KD3F KDF KDO KD KD3 KD KD
1280 x 768
256 colors 64 K colors 16 M colors
1280 x 1024
256 colors 256 colors 64 K colors 16 M colors 256 colors
1600 x 1200
Notes:
For information about Obtaining graphics software and utilities
Refer to Section 1.3, page 19
Digital Video Output (DVO) Connector (Optional)
The D815EEA2 board routes the Intel 82815 GMCH DVO port to an optional onboard 40-pin DVO connector. The DVO connector can be cabled to a DVI or TV out card to enable digital displays or TV out functionality. The Digital Visual Interface (DVI) specification provides a high-speed digital connection for visual data types when using the integrated graphics controller. This interface is active only when the integrated graphics controller is enabled. The DVI interface allows interfacing with a discrete Transmission Minimized Differential Signaling (TMDS) transmitter to enable platform support for DVI compliant digital displays or with a discrete TV encoder for TV out functionality.
For information about The location of the DVO connector The signal names of the DVO connector Obtaining the DVI specification Refer to Figure 14, page 69 Table 32, page 71 Table 4, page 20
Product Description
AGP Universal Connector
Install memory in the DIMM sockets prior to installing the AGP video card to avoid interference with the memory retention mechanism. The AGP universal connector supports either: · Graphics Performance Accelerator (GPA) cards with 133 MHz SDRAM display cache · 1x, 2x, or 4x AGP add-in cards with either 3.3 V or 1.5 V I / O
For information about The location of the AGP universal connector The signal names of the AGP universal connector Refer to Figure 15, page 73 Table 41, page 76
Graphics Performance Accelerator (GPA) Support
The Intel 815E GMCH display cache is a single channel 32-bit wide SDRAM interface. The 4 MB display cache resides on a GPA card that plugs into the AGP connector. The BIOS detects a GPA card if present in the AGP port and initializes it as display cache memory. When a GPA card is initialized, the BIOS allocates 1 MB of system memory to support the internal display device operation. 1.10.1.3.2 Dynamic Video Memory Technology (DVMT)
DVMT enables enhanced graphics and memory performance through Direct AGP, and highly efficient memory utilization. DVMT ensures the most efficient use of all available memory for maximum 2D / 3D graphic performance. DVMT is implemented on the D815EEA2 board with a GPA (Graphics Performance Accelerator) card installed in the AGP connector.
In earlier documentation, the GPA card was referred to as the AGP Inline Memory Module (AIMM). DVMT uses 1 MB of system physical memory for compatibility with legacy applications. An example of this would be when using VGA graphics under DOS. Once loaded, the operating system and graphics drivers allocate the buffers needed for performing graphics functions. When the 4 MB GPA card is installed, the Z-buffer and GDI data are managed directly from this dedicated graphics memory thereby avoiding operating system memory manager calls and improving performance. At system BIOS POST, the BIOS displays either the amount of physical memory allocated for display cache or the size of the GPA card (4 MB) if installed. Operating systems such as Windows NT 4.0 and Windows 2000 may display the maximum amount of frame buffer memory possible based on the system memory configuration.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
The use of DVMT requires operating system driver support.
For information about Obtaining the DVMT white paper Obtaining the AIMM specification Refer to http://developer.intel.com / design / chipsets / 815e / Table 4, page 20
AGP Add-in Card Support
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications. While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of the PCI bus related to handling large amounts of graphics data with the following features: · Pipelined memory read and write operations that hide memory access latency · Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Obtaining the Accelerated Graphics Port Interface Specification Refer to Table 4, page 20
Intel 815EP Graphics Subsystem
Install memory in the DIMM sockets prior to installing the AGP video card to avoid interference with the memory retention mechanism. The Intel 815EP chipset, used on the D815EPEA2 board, provides an AGP universal connector which supports a 1x, 2x, or 4x AGP add-in card with either 3.3 V or 1.5 V I / O. AGP is a high-performance interface for graphics-intensive applications, such as 3D applications. While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of the PCI bus related to handling large amounts of graphics data with the following features: · Pipelined memory read and write operations that hide memory access latency · Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about The location of the AGP universal connector The signal names of the AGP universal connector Obtaining the Accelerated Graphics Port Interface Specification Refer to Figure 15, page 73 Table 41, page 76 Table 4, page 20
Product Description
1.11 Audio Subsystem
AD1885 Audio Codec
82801BA I / O Controller Hub (ICH2)
Analog Devices AD1885 Analog Codec
CD-ROM Line In Audio In Mic In Front Panel Audio (optional) Line Out
OM11888
Figure 9. Block Diagram of Audio Subsystem
Audio Connectors
The audio connectors include the following: · Front panel audio (optional): Mic in Line out ATAPI-style connectors: CD-ROM Auxiliary line in
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Back panel audio connectors: Line in Line out Mic in
For information about The back panel audio connectors
Refer to Section 2.8.1, page 64
Front Panel Audio Connector (Optional)
Refer to Figure 14, page 69 Table 30, page 70
A 2 x 5-pin connector for routing mic in and line out to the front panel.
For information about The location of the optional front panel audio connector The signal names of the optional front panel audio connector
The front panel audio connector is alternately used as a jumper block for routing audio signals. Refer to Section 2.9.1 on page 82 for more information.
ATAPI CD-ROM Connector
Refer to Figure 14, page 69 Table 31, page 70
A 1 x 4-pin ATAPI-style connector connects an internal ATAPI CD-ROM drive to the audio mixer.
For information about The location of the ATAPI CD-ROM connector The signal names of the ATAPI CD-ROM connector
Auxiliary Line In Connector
A 1 x 4-pin ATAPI-style connector connects the left and right channel signals of an internal audio device to the audio subsystem.
For information about The location of the auxiliary line in connector The signal names of the auxiliary line in connector Refer to Figure 14, page 69 Table 29, page 70
Product Description
1.12 LAN Subsystem (Optional)
The network interface controller subsystem consists of the ICH2, with integrated LAN Media Access Controller (MAC), and a physical layer interface device. Features of the LAN subsystem include: · PCI Bus Master Interface · CSMA / CD Protocol Engine · Serial CSMA / CD unit interface that supports the following physical layer interface devices: 82562ET onboard LAN 82562ET / MT (10 / 100 Mbit / sec Ethernet) on the optional CNR 82562EH (1 Mbit / sec HomePNA) on the optional CNR PCI Power Management Supports APM Supports ACPI technology Supports Wake up from suspend state (optional Wake on LAN technology)
For information about Obtaining LAN software and drivers Refer to Section 1.3, page 19
Intel® 82562ET Platform LAN Connect Device
The Intel 82562ET component provides an interface to the back panel RJ-45 connector with integrated LEDs. This physical interface may alternately be provided through the CNR connector. The Intel 82562ET provides the following functions: · Basic 10 / 100 Ethernet LAN Connectivity · Supports RJ-45 connector with status indicator LEDs · Full driver compatibility · Advanced Power Management support · Programmable transit threshold · Configuration EEPROM that contains the MAC address
RJ-45 LAN Connector LEDs
Two LEDs are built into the RJ-45 LAN connector. Table 8 describes the LED states when the board is powered up and the LAN subsystem is operating.
Table 8.
LED Color Green Yellow
LAN Connector LED States
LED State Off On Off On (steady state) On (brighter and pulsing) Condition 10 Mbit / sec data rate is selected. 100 Mbit / sec date rate is selected. LAN link is not established. LAN link is established. The computer is communicating with another computer on the LAN.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.13 Hardware Management Subsystem
The hardware management features enable the board to be compatible with the Wired for Management (WfM) specification. The board has several hardware management features, including the following: · Hardware monitoring · Chassis intrusion detect connector (optional) · Fan control and monitoring (implemented on both the SMSC LPC47M132 and optional SMSC LPC47M142 I / O controllers)
For information about The WfM specification Fan control functions of the SMSC LPC47M132 and optional SMSC LPC47M142 I / O controllers Refer to Table 4, page 19 Section 1.13.2, page 46
Hardware Monitor Component
The hardware monitor component provides low-cost instrumentation capabilities. The features of the component include: · Internal ambient temperature sensing · Remote thermal diode sensing for direct monitoring of processor temperature (if supported in the processor) · Power supply monitoring (+12 V, +5 V, +3.3 V, +2.5 V, 3.3 VSB, and VCCP) to detect levels above or below acceptable values · SMBus interface
Chassis Intrusion Detect Connector (Optional)
For information about The location of the optional chassis intrusion detect connector The signal names of the optional chassis intrusion detect connector Refer to Figure 14, page 69 Table 37, page 72
Product Description
Fan Control and Monitoring
The SMSC LPC47M132 I / O controller and the optional SMSC LPC47M142 I / O controller both provide fan tachometer input for the processor fan (fan 1) and system fan (fan 2) and fan control output for the system fan (fan 2) and the chassis fan (fan 3). Monitoring and control can be implemented using third-party software.
For information about The functions of the fan connectors The location of the fan connectors The signal names of the fan connectors Refer to Section 1.15.2.2, page 53 Figure 14, page 69 Section 2.8.2.2, page 69
1.14 CNR Connector (Optional)
The CNR connector supports the audio, modem, USB, and LAN interfaces of the Intel 815E and Intel 815EP chipsets. Figure 10 shows the signal interface between the riser and the ICH2.
CNR Connector
OM11484
Figure 10. ICH2 and CNR Signal Interface
To learn more about the CNR, refer to the CNR specification.
For information about Obtaining the CNR specification Refer to Table 4, page 20
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
1.15 Power Management
Power management is implemented at several levels, including: · Software support: Advanced Power Management (APM) Advanced Configuration and Power Interface (ACPI) Hardware support: Power connector Fan connectors Wake on LAN technology Instantly Available technology Resume on Ring Wake from USB Wake on Keyboard Wake on PME# Wake on RTC (real-time clock) alarm
Software Support
The software support for power management includes: · APM · ACPI If the D815EEA2 or D815EPEA2 board is used with an ACPI-aware operating system, the BIOS can provide ACPI support. Otherwise, it defaults to APM support.
APM makes it possible for the computer to enter an energy-saving standby mode. The standby mode can be initiated in the following ways: · Time-out period specified in the BIOS Setup program · From the operating system, such as the standby menu item in Windows 98 In standby mode, the D815EEA2 and D815EPEA2 boards can reduce power consumption by spinning down hard drives, and reducing power to, or turning off of, VESA DPMS-compliant monitors. Power management mode can be enabled or disabled in the BIOS Setup program. While in standby mode, the system retains the ability to respond to external interrupts and service requests, such as incoming faxes or network messages. Any keyboard or mouse activity brings the system out of standby mode and immediately restores power to the monitor.
Product Description
The BIOS enables APM by default but the operating system must support an APM driver for the power management features to work. For example, Windows 98 supports the power management features upon detecting that APM is enabled in the BIOS.
ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer. The use of ACPI with the D815EEA2 or D815EPEA2 board requires an operating system that provides full ACPI support. ACPI features include: · Plug and Play (including bus and device enumeration) and APM support normally contained in the BIOS · Power management control of individual devices, add-in boards (some add-in boards may require an ACPI-aware driver), video displays, and hard disk drives · Methods for achieving less than 15-watt system operation in the power-on / standby sleeping state · A soft-off feature that enables the operating system to power-off the computer · Support for multiple wake up events (see Table 11 on page 51) · Support for a front panel power and sleep mode switch. Table 9 lists the system states based on how long the power switch is pressed, depending on how ACPI is configured with an ACPI-aware operating system.
Table 9. Effects of Pressing the Power Switch
..and the power switch is pressed for Less than seven seconds Less than seven seconds More than seven seconds Less than seven seconds More than seven seconds ..the system enters this state Power-on (ACPI G0 - working state) Soft-off / Standby (ACPI G1 - sleeping state) Fail safe power-off (ACPI G2 / G5 - soft-off) Wake up (ACPI G0 - working state) Power-off (ACPI G2 / G5 - soft-off)
If the system is in this state.. Off (ACPI G2 / G5 - soft-off) On (ACPI G0 - working state) On (ACPI G0 - working state) Sleep (ACPI G1 - sleeping state) Sleep (ACPI G1 - sleeping state)
Refer to Table 4, page 20
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
System States and Power States
Under ACPI, the operating system directs all system and device power state transitions. The operating system puts devices in and out of low-power states based on user preferences and knowledge of how devices are being used by applications. Devices that are not being used can be turned off. The operating system uses information from applications and user settings to put the system as a whole into a low-power state. Table 10 lists the power states supported by the D815EEA2 and D815EPEA2 boards along with the associated system power targets. See the ACPI specification for a complete description of the various system and power states.
Table 10. Power States and Targeted System Power
Targeted System Power Global States G0 - working state G1 - sleeping state Sleeping States S0 - working S1 - CPU stopped CPU States C0 - working C1 - stop grant Device States D0 - working state D1, D2, D3 - device specification specific. D3 - no power except for wake up logic. D3 - no power except for wake up logic. D3 - no power for wake up logic, except when provided by battery or external source.
(Note 1)
G1 - sleeping state G2 / S5
S3 - suspend to RAM. Context saved to RAM. S5 - soft-off. Context not saved. Cold boot is required. No power to the system.
No power
(Note 2)
No power
(Note 2)
G3 - mechanical off AC power is disconnected from the computer.
Notes: 1. 2.
No power
No power to the system so that service can be performed.
Product Description
Wake Up Devices and Events
Table 11 lists the devices or specific events that can wake the computer from specific states.
Table 11. Wake Up Devices and Events
..from this state S1, S3, S5 S1, S3, S5 (Note 1) S1, S3, S5 (Notes 1 and 2) S1, S3, S5 (Notes 1 and 2) S1, S3 (Note 3) S1, S3 S1, S3
These devices / events can wake up the computer.. Power switch RTC alarm Wake on LAN technology connector (optional) PME# Modem (back panel serial port A) USB PS / 2 keyboard
Notes: 1. 2. 3. S5 events are supported only on PCI bus connector 2.
For the Wake on LAN technology connector and PME#, S5 is disabled by default in the BIOS Setup program. Setting these options to Power On will enable a wake-up event from LAN in the S5 state. Wake from CNR modem is not supported on the D815EEA2 and D815EPEA2 boards.
The use of these wake up events from an ACPI state requires an operating system that provides full ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake events.
Wake up from PS / 2 mouse is peripheral, operating system, and driver dependent it is not a boardlevel feature.
Plug and Play
In addition to power management, ACPI provides controls and information so that the operating system can facilitate Plug and Play device enumeration and configuration. ACPI is used only to enumerate and configure D815EEA2 and D815EPEA2 board devices that do not have other hardware standards for enumeration and configuration. PCI devices on the D815EEA2 and D815EPEA2 boards, for example, are not enumerated by ACPI.
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Hardware Support
CAUTION
If the Wake on LAN and Instantly Available technology features are used, ensure that the power supply provides adequate +5 V standby current. Failure to do so can damage the power supply. The total amount of standby current required depends on the wake devices supported and manufacturing options. Refer to Section 2.11.3 on page 94 for additional information. The boards provides several hardware features that support power management, including: · Power connector · Fan connectors · Wake on LAN technology connector (optional) · Instantly Available technology · Resume on Ring · Wake from USB · Wake from PS / 2 keyboard · PME# wakeup support Wake on LAN technology and Instantly Available technology require power from the +5 V standby line. The sections discussing these features describe the incremental standby power requirements for each. Resume on Ring enables telephony devices to access the computer when it is in a power-managed state. The method used depends on the type of telephony device (external or internal) and the power management mode being used (APM or ACPI).
The use of Resume on Ring and Wake from USB technologies from an ACPI state requires an operating system that provides full ACPI support.
Power Connector
Product Description
Fan Connectors
The D815EEA2 and D815EPEA2 boards both have two standard fan connectors and one optional fan connector. The functions of these connectors are described in Table 12.
Table 12.
Connector Processor fan
Fan Connector Descriptions
Silkscreen Label Fan 1 Reference Designator J1B1 Function Provides +12 V DC for a processor fan or active fan heatsink. A tachometer feedback connection is also provided. Provides +12 V DC for a system or chassis fan. The fan voltage can be switched on or off, depending on the power management state of the computer. A tachometer feedback connection is also provided. Provides +12 V DC for a system or chassis. The fan voltage can be switched on or off, depending on the power management state of the computer.
System fan
Chassis fan (optional)
For information about The location of the fan connectors The signal names of the fan connectors
Refer to Figure 14, page 69 Section 2.8.2.2, page 69
Wake on LAN Technology
CAUTION
For Wake on LAN technology, the +5 V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing Wake on LAN technology can damage the power supply. Refer to Section 2.11.3 on page 94 for additional information.
The optional Wake on LAN technology connector is present only on boards that do not have the Intel 82562ET PLC device, which is part of the optional onboard LAN subsystem. Wake on LAN technology enables remote wakeup of the computer through a network. The LAN subsystem PCI bus network adapter monitors network traffic at the Media Independent Interface. Upon detecting a Magic Packet frame, the LAN subsystem asserts a wakeup signal that powers up the computer. Depending on the LAN implementation, the D815EEA2 and D815EPEA2 boards support Wake on LAN technology in the following ways: · Through the optional Wake on LAN technology connector (APM only) · Through the PCI bus PME# signal for PCI 2.2 compliant LAN designs (ACPI only) · Through the onboard LAN subsystem when enabled in Setup (ACPI only)
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
The Wake on LAN technology connector can be used with PCI bus network adapters that have a remote wake up connector, as shown in Figure 11. Network adapters that are PCI 2.2 compliant assert the wakeup signal through the PCI bus signal PME# (pin A19 on the PCI bus connectors).
Network Interface Card
Remote Wake up connector
PCI Slot
Wake on LAN technology connector Desktop Board
OM09129
Figure 11. Using the Wake on LAN Technology Connector
For information about The location of the optional Wake on LAN technology connector The signal names of the optional Wake on LAN technology connector Refer to Figure 14, page 69 Table 38, page 72
Instantly Available Technology
CAUTION
For Instantly Available technology, the 5 V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing Instantly Available technology can damage the power supply. Refer to Section 2.11.3 on page 94 for additional information. Instantly Available technology enables the D815EEA2 and D815EPEA2 boards to enter the ACPI S3 (suspend-to-RAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the power supply is off, the fans are off, and the front panel LED is amber if dual-color, or off if single-color.) When signaled by a wake-up device or event, the system quickly returns to its last known wake state. The D815EEA2 and D815EPEA2 boards support the PCI Bus Power Management Interface Specification. Add-in boards that also support this specification can participate in power management and can be used to wake the computer. The use of Instantly Available technology requires operating system support and PCI 2.2 compliant add-in cards and drivers. The standby power indicator LED (at location CR6E1) shows that power is still present at the DIMM and PCI bus connectors, even when the computer appears to be off. Figure 12 shows the location of the standby power indicator LED on the D815EEA2 and D815EPEA2 boards.
Product Description
CR6E1
Present only on D815EEA2 boards
OM11462
Figure 12. Location of Standby Power Indicator LED
For information about The devices and events that can wake the computer from the S3 state The PCI Bus Power Management Interface Specification Refer to Table 11, page 51 Table 4, page 20
Intel Desktop Board D815EEA2 / D815EPEA2 Technical Product Specification
Resume on Ring
The operation of Resume on Ring can be summarized as follows: · Resumes operation from either the APM sleep mode or the ACPI S1 state · Requires only one call to access the computer · Detects incoming call similarly for external and internal modems · Requires modem interrupt be unmasked for correct operation
Wake from USB
USB bus activity wakes the computer from an ACPI S1 or S3 state.
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
Wake from PS / 2 Keyboard
PS / 2 keyboard activity wakes the computer from an ACPI S1 or S3 state.
PME# Wakeup Support
When the PME# signal on the PCI bus is asserted, the computer wakes from an ACPI S1, S3, or S5 state.
Wake from RTC Alarm
An RTC alarm wakes the computer from an ACPI S1, S3, or S5 state.
2 Technical Reference
What This Chapter Contains
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 2.14 2.15 Introduction.........................................................57 Memory Map .......................................................57 I / O Map............................................................58 DMA Channels ......................................................60 PCI Configuration Space Map ..........................................60 Interrupts ..........................................................61 PCI Interrupt Routing Map .............................................61 Connectors .........................................................63 Jumper Blocks ......................................................82 Mechanical Considerations.............................................84 Electrical Considerations ..............................................92 Thermal Considerations...............................................96 Reliability ..........................................................97 Environmental.......................................................98 Regulatory Compliance ...............................................99
2.1 Introduction
Sections 2.2 - 2.6 contain several standalone tables. Table 13 describes the system memory map, Table 14 shows the I / O map, Table 15 lists the DMA channels, Table 16 defines the PCI configuration space map, and Table 17 describes the interrupts. The remaining sections in this chapter are introduced by text found with their respective section headings.
2.2 Memory Map
Table 13. System Memory Map
Address Range (hex) 100000 - 1FFFFFFF F0000 - FFFFF E0000 - EFFFF C8000 - DFFFF A0000 - C7FFF 9FC00 - 9FFFF 80000 - 9FBFF 00000 - 7FFFF Size 511 MB 64 KB 64 KB 96 KB 160 KB 1 KB 127 KB 512 K Description Extended memory Runtime BIOS Reserved Available high DOS memory (open to the PCI bus) Video memory and BIOS Extended BIOS data (movable by memory manager software) Extended conventional memory Conventional memory Address Range (decimal) 1024 K - 524288 K 960 K - 1024 K 896 K - 960 K 800 K - 896 K 640 K - 800 K 639