Embedded Microcontroller Thermal Electrical Specification SH

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Embedded Microcontroller Thermal Electrical Specification SH

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LH77790B
Embedded Microcontroller
Thermal Electrical Specification
SHARP reserves right make changes specifications described herein time without notice order improve design reliability. SHARP does assume responsibility circuitry described; circuit patent licenses implied. SHARP assumes responsibility damage caused misuse improper devices.
LIFE SUPPORT POLICY
SHARP components should used medical devices with life support functions, safety equipment similar applications where component failure would result loss life physical harm), aerospace equipment, telecommunication equipment (trunk lines) nuclear power control equipment. Contact SHARP representative sales office before using SHARP devices applications other than those recommended SHARP.
LIMITED WARRANTY
Sharp warrants Customer that Products will free from defects material workmanship under normal service period year from date invoice. Customer's exclusive remedy breach this warranty that Sharp will either repair replace, option, Product which fails during warranty period because such defect Customer promptly reported failure Sharp writing) (ii) Sharp unable repair replace, refund purchase price Product upon return Sharp. This warranty does apply Product which been subjected misuse, abnormal service handling, which been altered modified design construction, which been serviced repaired anyone other than Sharp. warranties forth herein lieu exclusive other warranties, express implied. EXPRESS IMPLIED WARRANTIES, INCLUDING WARRANTIES MERCHANTABILITY, FITNESS FITNESS PARTICULAR PURPOSE, SPECIFICALLY EXCLUDED. event will Sharp liable, responsible, incidental consequential economic property damage. above warranty also extended Customers Sharp authorized distributors with following exception: reports failures Products during warranty period return Products that were purchased from authorized distributor must made through distributor. case Sharp unable repair replace such Products, refunds will issued distributor amount distributor cost. Trademark Advanced RISC Machines, United Kingdom. LH77790B Embedded Microcontroller Preliminary User's Guide Version 1999 Copyright SHARP Microelectronics Americas. Printed Bound USA.
Reference SMA99104
Thermal Electrical Specification
Overview
Portable devices becoming more more prevalent daily life. They used personal information managers, communication devices, digital cameras, handheld games, bar-code scanners, medical equipment, electronic instrumentation, navigation systems. There significant design challenges portable devices. cost priority high volume products. power must long battery life. High performance critical computationally-intensive applications such PDAs, GPS, scanners. Communication capabilities effective user interface integral parts portable device. Last, least, superior product development support tools crucial reducing time-to-market. Sytem Chip team SHARP designed LH77790B Embedded Microcontroller (a.k.a. 790B) meet above challenges portable design. LH77790B, powered ARM7DITM, complete system chip with high level integration satisfy wide range customer requirements expectations. 790B combines 32-bit ARM7DI RISC engine, number essential peripherals (UARTs, Counter/Timers, PIOs, PWMs, etc.), controller, cache, on-chip SRAM. This high level integration lowers overall system cost, reduces development cycle time accelerates product introduction. 790B's fully static design, power management unit, dual voltage operation (3.3 fast interrupt response time, on-chip cache SRAM, powerful instruction set, very power RISC core provide high performance current draw. on-chip controller, UARTs, IrDA/DASK, programmable peripheral interface (PPI) well suited wireless, cable, visual communication requirements. Other features like, watchdog timer, programmable memory interface, onchip SRAM/DRAM controllers debug support provides high level flexibility. Please check website www.sharpsma.com with your local SHARP sales office latest Thermal Electrical Specifications and/or errata sheets. These documents will contain latest parameters LH77790B.
Thermal Electrical Specification
LH77790B
Features
Highly Integrated Single Chip 32-Bit ARM7DI RISC Core Built-In Debug Support Fast Interrupt Response Powerful Instruction 26-bit External Address 512MB Addressable Space 16-bit External Data Data/Instruction Cache Associative Write Back Policy Flexible Modes Operation Static Expandable without Cache Power High Performance Programmable Clock Power Management Programmable Monochrome Controller 1024 2048 Four Gray Shades Frame buffer Main Memory On-Chip Interrupt Controller External Interrupts Seven Internal Interrupts ARM7DI Wake-Up Three UARTs 16C450-class Full Modem Support UART0 Partial Modem Support UART1 IrDA-1.0/DASK Support UART2 IrDA/DASK Interface IrDA-1.0 (2.4 kbps 115.2 kbps) DASK (2.4 kbps 57.6 kbps) Three Pulse Width Modulator Channels PWM0 PWM1 have 8-Bit Resolution PWM2 16-Bit Resolution
Thermal Electrical Specification
LH77790B Flexible Memory Interface Multiplexeled Chip Enables/CAS pins pins Fully Programmable SRAM Banks (64MB each) DRAM Banks (128MB each) Access Privileges (System/User) On-Chip DRAM Controller Fast Page Mode Normal Mode before Refresh Programmable Peripheral Interface (PPI) Programmable Signals Three Modes Operation Three 16-Bit Counter/Timer Channels Modes Operation Binary Counting Hardware Watchdog Timer Eight Time-out Intervals Protection Mechanism Three Time-out Actions Little Endian JTAG Interface Dual Supply Voltage LVTTL 16.7
Development Environment
790B Evaluation Board (part number LU7790AH2A) Software Development ToolKit (part number LU7V211H1) give users full access power features 790B provide complete integrated environment development. Users will able develop, benchmark, profile both hardware software easily quickly.
Thermal Electrical Specification
LH77790B
Block Diagram
CLOCK(S) JTAG INTERRUPTS RESET DISPLAY
CLOCK/POWER MANAGEMENT
ARM7DI CONTROLLER
INT/RESET CONTROLLER
CONTROLLER
ARM7DI CACHE 32-BIT INTERNAL
BYTES SCRATCH SRAM EXTERNAL MEMORY INTERFACE
CONTROLLER
82C55 PROGRAMMABLE PERIPHERAL INTERFACE
16C450 UARTS
82C54 COUNTER/ TIMERS
WATCH TIMER
IrDA/ DASK
CHANNELS
BITS
0/CH
ARM-8
Figure LH77790B Block Diagram
Thermal Electrical Specification
LH77790B
Description
Table Descriptions
PINS NAME DIRECTION EXTERNAL INTERFACE A[25:0] D[15:0] External Address bus. 790B will provide 26-bit address external memories peripherals. External 16-Bit data bus. Output Enable external memory peripherals. allows external memory peripherals drive data asserted during read access HIGH during write access. Write Enable external memory peripherals. During write access, this driven LOW. During read access, this driven HIGH. These pins provide Chip Enable/Column Address Select signals allowing direct connection standard external memory/peripheral devices. pins when interfacing DRAMs otherwise. They fully programmable system designer support byte enables. Address Select pins DRAM Bank Bank External Memory Wait. Allows slow memories. 790B generates external WAIT cycles (EWC) response activating WAIT. WAIT sampled HIGH transition XCLK. EWC, WAIT must active prior sampling last cycle (beginning last cycle) memory transfer. WAIT continues active (when sampled) subsequent cycles, more will added. Once WAIT deactivated, 790B will complete memory transfer. Byte Wide Access. when ARM7DI executes store/ load byte instruction. HIGH when ARM7DI Core executes store/load word instruction instruction fetch. does depend size external memory/peripheral device. valid during external memory access. used external address decoder generate extra chip/byte enables. don't care during DRAM refresh. Byte Boot selects between boot memory. 790B samples captures state rising edge RESETI allowing change state after Reset. 790B will boot from memory. HIGH, 790B will boot from memory. This normally tied boot memory HIGH boot memory. Counter/Timer control gate input signals. Counter/Timer output signals. INTERRUPT INTERFACE INT[5:0] External interrupt input signals. DESCRIPTION
CE[5:0]/ CAS[5:0]
RAS[1:0]
WAIT
COUNTERS/TIMERS INTERFACE 123, 121, 124, 122, CTGATE[2:0] CTOUT[2:0]
Thermal Electrical Specification
LH77790B Table Descriptions
PINS NAME DIRECTION CONTROLLER INTERFACE MCLK LCDCNTL VD[7:0] Shift/Pixel Clock. Line Pulse/HSYNC. Modulation Signal. Frame Pulse/VSYNC. Control Signal. Video Data. Parallel ports signals. Signals have programmable access function Input, Output Controls (port only). PB[7:2] PC[2:0] multiplexed with UARTs modem signals. INTERFACE PWM[2:0] Pulse Width Modulator output signals. UARTs INTERFACE 114, 112, 115, 113, 150, 145, 142, RxD[2:0] TxD[2:0] RTS[1:0] CTS[1:0] RI[1:0] DTR0 DSR0 DCD0 UART serial data input signals. RxD2 also doubles digital input interface. UART serial data output signals. TxD2 also doubles digital output interface. Request Send UART0 UART1. Multiplexed with respectively. Clear Send UART0 UART1. Multiplexed with respectively. Ring Indicator UART0 UART1. Multiplexed with respectively. Data Terminal Ready UART0 only. Multiplexed with PC2. Data Ready UART0 only. Multiplexed with PB7. Data Carrier Detect UART0 only. Multiplexed with PB6. Chip JTAG Controller Reset Input. RESETI built-in glitch detector. RESETO will driven after valid reset detected long RESETI driven LOW. JTAG reset, TRST, internally connected RESETI. Chip Reset Output. will driven during: Chip Reset Timeout Reset Software Controlled Reset 790B External Clock Input pin. Duty cycle 50%. XCLKDIS active HIGH output that used disable external clock circuitry will result reducing current consumption micro-amperes. XCLKDIS HIGH Sleep Stop modes. Connecting this external clock circuitry, allows 790B into Stop mode disabling external clock. UART/DASK Demodulator External clock input signal. Duty cycle 50%. Counter/Timer External clock input signal. Duty cycle 50%. DESCRIPTION
PROGRAMMABLE PERIPHERAL INTERFACE 135, 145, 155, PA[7:0] PB[7:0] PC[7:0]
RESET EXTERNAL CLOCKS
RESETI**
RESETO
XCLK
XCLKDIS
UCLK CTCLK
Thermal Electrical Specification
LH77790B Table Descriptions
PINS NAME DIRECTION JTAG INTERFACE* JTAG Test/EmbeddedICEclock input signal. Must pulled-up normal operation recommended compatibility with ARM's EmbeddedICE) JTAG Test/EmbeddedICE mode select input signal. Must pulled-up normal operation recommended compatibility with ARM's EmbeddedICE) JTAG Test/EmbeddedICE data input signal. Must pulled-up normal operation recommended compatibility with ARM's EmbeddedICE) JTAG Test/EmbeddedICE data output signal. RESERVED INTERFACE 109, 129, 143, 153, 163, 100, 110, 120, 130, 144, 154, 164, 131, 132, 133, 134, 175, ADBE TEST0 TEST1 TEST2 TEST3 Reserved. Must tied HIGH normal operation. Reserved. Must tied normal operation. Reserved. Connect. Reserved. Must tied normal operation Reserved. Connect POWER SIGNALS Power. LH77790B V/3.3 DESCRIPTION
Ground. ground pins must used.
CONNECT
connection.
NOTE: *JTAG Reset, TRST, internally connected RESETI. IEEE 1149.1 1990 Standard requires JTAG Inputs pulled good logic level achieve normal operations.
Thermal Electrical Specification
LH77790B Table Pinout
SIGNAL XCLK SIGNAL RAS0 RAS1 CE0/CAS0 CE1/CAS1 CE2/CAS2 CE3/CAS3 CE4/CAS4 CE5/CAS5 WAIT SIGNAL MCLK LCDCNTL PWM0 PWM1 PWM2 RESETI INT0 INT1 INT2 INT3 INT4 INT5 RxD0 TxD0 RxD1 TxD1 RxD2 TxD2 UCLK CTGATE0 CTOUT0 RESETO CTGATE1 CTOUT1 CTGATE2 CTOUT2 CTCLK SIGNAL PB2/RI1 PB3/CTS1 PB4/CTS0 PB5/RI0 PB6/DCD0 PB7/DSR0 PC0/RTS1 PC1/RTS0 PC2/DTR0 XCLKDIS TEST0 TEST1 ADBE TEST2 TEST3
Thermal Electrical Specification
LH77790B
Absolute Maximum Ratings
Table Absolute Maximum Ratings
PARAMETER Supply Voltage Input Voltage Output Voltage Storage Temperature Power Dissipation (Package Limit) SYMBOL VOUT TSTG PDPKG RATING -0.3 -0.3 -0.3 +125 UNIT
NOTE: These stress ratings transient conditions only. Operation beyond absolute maximum rating conditions affect reliability cause permanent damage device.
Recommended Operating Conditions
Table LH77790B Operation) Recommended Operating Conditions
PARAMETER Supply Voltage Supply Voltage Clock Frequency Operating Temperature SYMBOL FXCLK TOPR MIN. TYP. MAX. UNIT
NOTE: Unused input pins should pulled HIGH their inactive state.
Table LH77790B (3.3 Operation) Recommended Operating Conditions
PARAMETER Supply Voltage Supply Voltage Clock Frequency Operating Temperature SYMBOL FXCLK TOPR MIN. TYP. MAX. 16.7 UNIT
NOTE: Unused input pins should pulled HIGH their inactive state.
Thermal Electrical Specification
LH77790B
Specifications
Over recommended operating voltage temperature conditions, unless otherwise specified. Table LH77790B Specifications
PARAMETER Input Voltage Input HIGH Voltage Input Voltage Input HIGH Voltage Output Voltage Output HIGH Voltage Output Voltage Output HIGH Voltage Input Leakage Current HIGH Impedance (OFF-State) Output Leakage Current Operating Current (Active Mode) Operating Current (Standby Mode) Operating Current (Sleep Mode) Operating Current (Stop Mode) SYMBOL ICCAT VOLTAGE RANGE ICCSB ICCSL ICCST Operating temperature 50°C -100 -200 VCCMAX VCCMAX TEST CONDITION MIN. MAX. UNIT NOTES
NOTES: CMOS Condition CMOS input levels (Note recommended operating conditions Table XCLK Frequency (3.3 Condition Same Condition with core peripherals halted. DRAM Refresh active. Condition Same Condition with DRAM Refresh disabled. Condition Same Condition with XCLK stopped.
Thermal Electrical Specification
LH77790B
Test Conditions
Table Test Conditions1
PARAMETER Input Pulse Levels Input Rise Fall Times Input Output Timing Reference Levels Output Load NOTE: Applies LH77790B (3.3 ranges). Includes scope capacitance. RATING UNIT NOTE
Capacitance
Table Capacitance1
PARAMETER Input Capacitance Output Capacitance Capacitance SYMBOL COUT MAX. UNIT NOTE
NOTE: Applies LH77790B (3.3 ranges). Measurement Condition: pins except measured pin.
Specifications
Over Recommended operating voltage, temperature test conditions.
External Clocks
tXCLK tXCLKL tXCLKH
ARM2-99
Figure System Clock Timing
Thermal Electrical Specification
LH77790B
tCTCLK tCTCLKH tCTCLKL
ARM2-100
Figure External Counters/Timers Clocks Timing
tUCLK tUCLKH tUCLKL
ARM2-101
Figure External UARTs/DASK Clock Timing Table External Clocks Specifications
PARAMETER tXCLK tXCLKH tXCLKL tCTCLK tCTCLKH tCTCLKL tUCLK* tUCLKH* tUCLKL* DESCRIPTION XCLK (System Clock) Period XCLK HIGH Time XCLK Time CTCLK (Counters/Timers External Clock) Period CTCLK HIGH Time CTCLK Time UCLK (UARTs/DASK External Clock) Period UCLK HIGH Time UCLK Time RANGE MIN. MAX. RANGE MIN. MAX. UNIT tXCLK tXCLK tXCLK tXCLK tXCLK tXCLK tXCLK tXCLK
NOTE: *When UCLK used DASK Demodulator Clock, 14.318 Oscillator (50% Duty).
Thermal Electrical Specification
CYCLE CYCLE CYCLE
Thermal Electrical Specification
tXAH
XCLK
VALID VALID VALID
SRAM/DRAM Interface
tXCE
VALID
VALID tXCEH
tXOE tXOEH
tXBW
tXBWH
Figure SRAM Read Access Timing
tWTS1 tWTH1
WAIT
NOTES: WAIT 790B will extend memory access adding extra wait cycle. WAIT 790B will extend memory access. Memory access will complete shown. 790B inserts address setup cycle beginning every non-sequential access (CYCLE1). Sequential accesses have address setup cycle. Memory access starts with CYCLE2. Sequential accesses only.
LH77790B
ARM2-102
CYCLE CYCLE CYCLE
tXAH
LH77790B
XCLK
VALID
VALID
VALID
tACEH tDCEH
VALID
tXCE
VALID
tXDH tXCEH
tXWE tXWEH tDWEH
tAWEH tXBW
Figure SRAM Write Access Timing
tWTS1 tWTH1
tXBWH
WAIT
NOTES: WAIT 790B will extend memory access adding extra wait cycle. WAIT 790B will extend memory access. Memory access will complete shown. 790B inserts address setup cycle beginning every non-sequential access (CYCLE1). Sequential accesses have address setup cycle. Memory access starts with CYCLE2. Sequential accesses only.
ARM2-103
Thermal Electrical Specification
CYCLE CYCLE CYCLE
CYCLE
XCLK
tXAH
Thermal Electrical Specification
DRAM COLUMN
tXRAS
VALID
tXRASH
tASR tXCAS tXCASH
tASC tXOE tXOEH
Figure DRAM Read Access Timing
tXBW
tXBWH
WAIT NOTES: WAIT 790B will extend memory access adding extra wait cycle. WAIT 790B will extend memory access. Memory access will complete shown. 790B inserts address setup cycle beginning every non-sequential access (CYCLE1). Sequential accesses have address setup cycle. Memory access starts with CYCLE2.
tWTS1 tWTH1
LH77790B
ARM2-104
CYCLE CYCLE CYCLE CYCLE
LH77790B
XCLK
tXAH
DRAM
COLUMN
tXDH
VALID VALID
tXRAS
tXRASH
tASR tXCAS tDSC tXCASH
tXWE tASC tXWEH
Figure DRAM Write Access Timing
tXBW
tXBWH
WAIT
tWTS1 tWTH1
Thermal Electrical Specification
NOTES: WAIT 790B will extend memory access adding extra wait cycle. WAIT 790B will extend memory access. Memory access will complete shown. 790B inserts address setup cycle beginning every non-sequential access (CYCLE1). Sequential accesses have address setup cycle. Memory access starts with CYCLE2. Only Burst cycles page mode (not shown).
ARM2-105
LH77790B Table SRAM/DRAM Specifications
PARAMETER tXAH tXCE tXCEH tXWE (SRAM) tXWE (DRAM) tXWEH tWTS tWTH tXDH tXOE tXOEH tXBW tXBWH tAWEH tDWEH tACEH tDCEH tXRAS tXRASH tXCAS tXCASH tASR tASC tDSC DESCRIPTION XCLK Address Valid Address Hold relative XCLK XCLK Active Hold relative XCLK XCLK Active (SRAM) XCLK Active (DRAM) Hold relative XCLK WAIT Setup relative XCLK WAIT Hold relative XCLK XCLK Write Data Valid Write Data Hold relative XCLK XCLK Active Hold relative XCLK Read Data Setup relative XCLK Read Data Hold relative XCLK XCLK Valid Hold relative XCLK Address Hold relative Inactive Data Hold relative Inactive Address Hold relative Inactive Data Hold relative Inactive XCLK Valid Hold relative XCLK XCLK Valid Hold relative XCLK DRAM Address Setup relative DRAM Column Address Setup relative DRAM Write Data Setup relative RANGE MIN. MAX. RANGE MIN. MAX. UNIT NOTE
NOTES: Measures hold time data until data changes. change could either state change HIGH Impedance change. This parameter setup time when both data become valid same cycle (Burst cycles Page Mode). Minimum Data Hold Time with respect address invalid (SRAM). Minimum Data Hold Time with respect invalid (DRAM).
Thermal Electrical Specification
LH77790B
Programmable Peripheral Interface,
three different modes operation shown Figure through Figure Modes assign alias names port when used control signals depending mode operation. Table shows cross reference between alias names which used timing diagrams modes 790B external names.
ARM2-108
tXAH
INTERNAL ADDRESS REFLECTED 790B EXTERNAL ADDRESS
tXPO
VALID DATA FROM
Port
XCLK
Figure Programmable Peripheral Interface (MODE Output) Timing
Thermal Electrical Specification
NOTE:
790B Internal signals shown reference (790B Internal Peripheral Write Enable)
Thermal Electrical Specification
XCLK
tXAH
INTERNAL ADDRESS REFLECTED 790B EXTERNAL ADDRESS
PORT INPUT SAMPLED
tP0IS
tP0IH
Figure Programmable Peripheral Interface (MODE Input) Timing
PORT
VALID DATA FROM PERIPHERAL
NOTE:
LH77790B
790B Internal signals shown reference (790B Internal Peripheral Output Enable)
ARM2-109
tXAH
INTERNAL ADDRESS REFLECTED 790B EXTERNAL
LH77790B
XCLK
tSTB
READS CAPTURED DATA
tSTIB tXIBF
tSTIN tXINT1
INTR
tPIS tPIH
Figure Programmable Peripheral Interface (Mode Input) Timing
VALID DATA FROM PERIPHERAL
PORT
Thermal Electrical Specification
NOTES: Internal signal shown reference (790B Internal Peripheral Output Enable) Asynchronous signals
ARM2-110
XCLK
tXAH
Thermal Electrical Specification
INTERNAL ADDRESS REFLECTED 790B EXTERNAL ADDRESS
tXOBF
tACOB tACK
tXINT2
INTR
tXPO tACIN
Figure Programmable Peripheral Interface (Mode Output) Timing
VALID DATA FROM 790B
PORT
LH77790B
ARM2-111
NOTES: 790B Internal signal shown reference (790 Internal Peripheral Write Enable) Asynchronous signals
tXAH
INTERNAL ADDRESS REFLECTED 790B EXTERNAL ADDRESS
LH77790B
XCLK
INTERNAL ADDRESS REFLECTED 790B EXTERNAL ADDRESS
tXOBF tACOB
tACK
tXNT2
tSTIN
INTR
tSTIB tXIBF
tSTB
tPIS tPIH tACD tACDH
Figure Programmable Peripheral Interface (Mode Bi-directional) Timing
VALID DATA FROM PERIPHERAL VALID DATA FROM 790B
PORT ONLY)
Thermal Electrical Specification
NOTES: 790B Internal signals shown reference Asynchronous signals
ARM2-112
LH77790B Table Cross Reference
ALIAS INTR MODE (INPUT) PORT PORT MODE (OUTPUT) Port Port MODE (BI-DIRECTIONAL) Port
Table Specification
PARAMETER tXPO tP0IS tSTIB tPIS tP0IH tPIH tSTIN tXINT1 tXIBF tSTB tXINT2 (Bit tXOBF tACK tACIN tACOB tACD tACDH DESCRIPTION XCLK Data Valid Port Input Setup relative XCLK (MODE Port Input Setup relative (MODES Port Input Hold relative XCLK (MODE Port Input Hold relative (MODES INTR XCLK INTR (MODE Input) XCLK Pulse Width XCLK INTR (MODE Output MODE XCLK Pulse Width INTR Data Valid Data Hold relative RANGE MIN. MAX. RANGE MIN. MAX. UNIT
tXINT2 (Port XCLK INTR (MODE Output MODE
Thermal Electrical Specification
LH77790B
External Reset
XCLK
tRSTIW
RESETI*
tRSTOV tRSTOH
RESETO
NOTE: RESETI asynchronous input, sampled rising edge XCLK clock.
ARM2-120
Figure LH77790B External Reset Timing Table External Reset Specifications
PARAMETER tRSTIW tRSTOV tRSTOH DESCRIPTION RESETI Pulse Width (Once Sampled Low) RESETO Valid (Once RESETI Sampled Low) RESETO Hold (Once RESETI Sampled High) (3.3 RANGE) MIN. TYP. MAX. (5.0 RANGE) MIN. TYP. MAX. UNIT XCLK XCLK XCLK
Thermal Electrical Specification
LH77790B
Controller
controller signals (VD[7:0], CP1, CP2, MCLK, LCDCNTL) fully programmable drive most common passive panels. `Basic Timing' section Chapter LH77790B User Guide, best describes relationship between output signals control registers controller. following tables equations repeated here convenience. Table Controller Parameter Description
PARAMETER DUTY CP1W CLKDIV tLCD_in_CLK tLCDCLK tCP1 tCP2 tPXFR tCP1W t12F DESCRIPTION Number Pulses Frame (LCD_DUTY) Number Memory Bytes Horizontal Line (LCD_BC) Line Pulse High Width (LCD_CP1W) Clock Frequency Divider (LCD_CLKDIV) Input Clock from Power Management Unit Reference Clock (Output Clock Divider) Frame Pulse Period Line Pulse Period Shift Clock Period Pixels Transfer Time Line Line Pulse High Width Time Current Frame Current Frame Current Frame next frame Data Setup time Data Hold time signal Setup time signal Hold time MCLK Inverting NOTE
NOTE: Decimal `equivalent' values, defined corresponding parameters tables, must used timing equations.
following equations (see above note) parameters describe relationship between input Clock, CP1, CP2, MCLK.
tLCDCLK CLKDIV tLCD_in_CLK (tLCD_in_CLK XCLK period) tCP1 DUTY tCP1 tPXFR tCP1W tPXFR, tCP1W, tCP2 vary from display mode another. Their typical values shown Table
Thermal Electrical Specification
LH77790B Table Typical Timing Controller (3.3 Ranges)
DISPLAY MODE (4-bit) (8-bit) (4-bit) (8-bit) tPXFR tCP2 tCP2 tCP2 tCP2 tCP2 tCP2 tCP2 tCP2 tCP1W (CP1W+1/2) tCP2 (CP1W+1/2) tCP2 (CP1W+1/2) tCP2 (CP1W-1/2) tCP2 (CP1W) tCP2 (CP1W+1/2) tCP2 (CP1W-1/2) tCP2 (CP1W+1/2) tCP2 tCP2 tlcdclk tlcdclk tlcdclk tlcdclk tlcdclk tlcdclk tlcdclk tlcdclk
Other timing parameters shown Table Table Other Typical Timing Parameters (3.3 Ranges)
VARIABLE t12F VALUE tCP1 tCP1 tCP1 Variable tCP1 tCP1 tPXFR tCP1W NOTES
NOTES: Since this delay happens once frame, effect frame rate small, will used timing equations. MCLK clock changes falling edge clock programmed LCD_MCLKW register. Actual timing vary from those calculated depending current instruction executed, memory speed, DRAM Refresh Rate, etc.
Thermal Electrical Specification
LAST
INVALID DATA DATA DATA DATA INVALID DATA DATA DATA
VD[7:0] tPXFR
DATA
Thermal Electrical Specification
tCP1W t12F tCP2 MCLK VD[7:0]
INVALID DATA INVALID DATA INVALID DATA
LAST
INVALID DATA
INVALID DATA
Figure Controller Timing
tCP1
FRAME
FRAME
MCLK
LH77790B
ARM2-86
LH77790B
Package Specifications
TEST3 TEST2 ADBE TEST1 TEST0 XCLKDIS PC2/DTR0 PC1/RTS0 PC0/RTS1 PB7/DSR0 PB6/DCD0 PB5/RI0 PB4/CTS0 PB3/CTS1 PB2/RI1
176-PIN TQFP
VIEW
XCLK
LH77790B Embedded Microcontroller
CTCLK CTOUT2 CTGATE2 CTOUT1 CTGATE1 RESETO CTOUT0 CTGATE0 UCLK TxD2 RxD2 TxD1 RxD1 TxD0 RxD0 INT5 INT4 INT3 INT2 INT1 INT0 RESETI PWM2 PWM1 PWM0 LCDCNTL MCLK
RAS0 RAS1 CE0/CAS0 CE1/CAS1 CE2/CAS2 CE3/CAS3 CE4/CAS4 CE5/CAS5 WAIT
77790-3
Figure LH77790B 176-Pin TQFP (Thin Quad Flat Pack) Assignment
Thermal Electrical Specification
LH77790B
176TQFP (TQFP-176-P-2424)
26.30 25.70 24.20 23.80 0.10 1.00 REF. 1.00 REF.
24.20 23.80 26.30 25.70
25.2 24.8
0.175 0.075 1.70 MAX.
DETAIL
0.50 TYP.
0.28 0.12
0.65 0.35
0.20 0.00 DIMENSIONS
176TQFP
Figure LH77790B Package Specification
Thermal Electrical Specification
NORTH AMERICA
EUROPE
ASIA
SHARP Microelectronics Americas 5700 Pacific Blvd. Camas, 98607, U.S.A. Phone: (360) 834-2500 Facsimile: (360) 834-8903 http://www.sharpsma.com
SHARP Electronics (Europe) GmbH Microelectronics Division 20097 Hamburg, Germany Phone: (49) 2376-2286 Facsimile: (49) 2376-2232 http://www.sharpmed.com
SHARP Corporation Integrated Circuits Group 2613-1 Ichinomoto-Cho Tenri-City, Nara, 632, Japan Phone: (07436) 5-1321 Facsimile: (07436) 5-1532 http://www.sharp.co.jp

Embedded Microcontroller Thermal Electrical Specification SH

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