64M-BIT Mask (8/16 Output) TSOP Packages organization (byte mode)

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64M-BIT Mask (8/16 Output) TSOP Packages organization (byte mode)

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MX23C6410
64M-BIT Mask (8/16 Output) TSOP Packages
organization (byte mode) (word mode) Fast access time Random access: 90ns (max.) 100ns (max.) Current Operating: 70mA Standby: 100uA (max.) Supply voltage 5V±10% Package (500 mil) TSOP (12mm 20mm)
ORDER INFORMATION
Part Access Time MX23C6410MC-90 90ns MX23C6410MC-10 100ns MX23C6410MC-12 120ns MX23C6410MC-15 150ns MX23C6410TC-10 100ns MX23C6410TC-12 120ns MX23C6410TC-15 150ns MX23C6410RC-10 100ns MX23C6410RC-12 MX23C6410RC-15 120ns 150ns Package TSOP TSOP TSOP TSOP (Reverse type) TSOP (Reverse type) TSOP (Reverse type)
CONFIGURATION
BYTE D15/A-1
TSOP (NORMAL TYPE)
BYTE D15/A-1
MX23C6410
TSOP (REVERSE TYPE)
D15/A-1 BYTE
MX23C6410 (Normal Type)
MX23C6410 (Reverse Type)
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
DESCRIPTION
Symbol A0~A21 D0~D14 D15/A-1 Byte Function Address Inputs Data Outputs (Word Mode) Address (Byte Mode) Chip Enable Input Output Enable Input Word Byte Mode Selection Power Supply Ground Connection
MODE SELECTION Byte D15/A-1 Output Input D0~D7 High High D0~D7 D0~D7 D8~D15 High High D8~D15 High Mode Word Byte Power Stand-by Active Active Active
BLOCK DIAGRAM
A0/(A-1) BYTE
Address Buffer
Memory Array
Page Buffer
Word/ Byte
Output Buffer
D15/(D7)
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
ABSOLUTE MAXIMUM RATINGS
Item Supply Voltage Relative Voltage Relative Ambient Operating Temperature Storage Temperature Symbol Topr Tstg Ratings -0.5V 6.5V -0.8V VCC+2.0V -65° 125°
CHARACTERISTICS 70°C, 5V±10%)
Item Output High Voltage Output Voltage Input High Voltage Input Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current (TTL) Standby Current (cmos) Input Capacitance Output Capacitance Symbol ICC1 ISTB1 ISTB2 COUT MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.8V 70mA 100uA 10pF 10pF Conditions -1.0mA 2.1mA
f=5MHz, output open CE>VCC-0.2V 1MHZ 1MHZ
CHARACTERISTICS 70°C, 5V±10%)
Item Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Time Output Hold After Address Output High Delay Symbol tACE 23C6410-90 MIN. MAX. 90ns 90ns 90ns 45ns 20ns 23C6410-10 MIN. MAX. 100ns 100ns 100ns 50ns 20ns 23C6410-12 MIN. MAX. 120ns 120ns 120ns 60ns 20ns 23C6410-15 MIN. MAX. 150ns 150ns 150ns 70ns 20ns
Note: Output high-impedance delay (tHZ) measured from going high, this parameter guaranteed design over full voltage temperature operating range tested. 90ns speed grade's range
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
Test Conditions
Input Pulse Levels Input Rise Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.4V 0.8V 2.0V Figure
(load)=-1mA DOUT (load)=2.1mA
C<100pF
Note:No output loading present tester load board. Active loading used under software programming control. Output loading capacitance includes load board's stray capacitance.
TIMING DIAGRAM
RANDOM READ
tACE
DATA
VALID
VALID
VALID
Note:CE, enable
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
PACKAGE INFORMATION 44-PIN PLASTIC
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
48-PIN PLASTIC TSOP
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
48-PIN PLASTIC TSOP (Reverse Type)
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
REVISION HISTORY
Revision Description Characteristics: 10ns Order Information-Note:MX23C6410PC-10 only applys supply voltage 5V±5% Modify Package Information Modify Operating Current:100mA->70mA Modify Package Information Added 44-pin TSOP package Move 42-pin PDIP Package another data sheet Removed 44-pin TSOP Package supply voltage relative access time:90ns 48-TSOP reverse type package information Page P5,6,7 P1,3 P5~7 P1,8 P1,5 P1,7 P1,3 Date FEB/01/1999 OCT/02/2000 OCT/09/2000 JAN/15/2001 JUL/17/2001 JUL/20/2001 JAN/15/2002 JUL/25/2002 AUG/09/2002 AUG/21/2002
P/N:PM0406
REV. 3.0, AUG. 2002
MX23C6410
MACRONIX INTERNATIONAL CO., LTD.
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http //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves right change product specifications without notice.

64M-BIT Mask (8/16 Output) TSOP Packages organization (byte mode)

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