16-BIT LATCHUP PROTECTED 7805ALPRP AGND1 AGND2 (MSB) DGND

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

16-BIT LATCHUP PROTECTED 7805ALPRP AGND1 AGND2 (MSB) DGND

Datasheet Thumbnail

Top Searches for this datasheet

SPACE PRODUCTS
16-BIT LATCHUP PROTECTED
7805ALPRP
AGND1 AGND2 (MSB) DGND
DECPLNG BUSY STATUS
Clock Successive Approximation Register Control Logic
STATUS BUSY
CDAC
7805ALPRP
(LSB)
Buffer +2.5V ±10V Input Comparator Output Latches Three State Drivers Three State Parallel Data
Memory
FEATURES:
16-bit organization Latchup Protection Package: RAD-PAK® flat pack RAD-PAK® sampling rate Standard input range Advance CMOS technology SINAD with input Single supply operation Utilizes internal external reference Full parallel data output Power dissipation:
DESCRIPTION:
Space Electronics' 7805ALPRP RAD-PAK®) high-speed analog-todigital converter features typical kilorad (Si) total dose tolerance; dependent upon orbit. Using SEi's radiation-hardened RAD-PAK® packaging technology, 7805ALPRP incorporates commercial 7805 from Burr Brown. This device latchup protected Space Electronics' LPTtechnology. 28-pin, 16-bit sampling using state-of-theart CMOS structure. device contains complete 16-bit capacitorbased with S/H, reference, clock, interface microprocessor use, three-state output drivers. 7805ALPRP specified sampling rate, guaranteed over full temperature range. Laser-trimmed scaling resistors provide industry-standard input range, while innovative design allows operation from single supply, with power dissipation under patented radiation-hardened RAD-PAK® technology incorporates radiation shielding microcircuit package. Capable surviving space environments, 7805ALPRP ideal satellite, spacecraft, space probe missions. 7805ALPRP available with packaging screening Class
0414.00Rev5
data sheets subject change without notice
(858) 452-4167 Fax: (858) 452-5499 www.spaceelectronics.com
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
NUMBER NAME AGND1 AGND2 (MSB) DGND (LSB) STATUS* BUSY DECPLNG DIGITAL DESCRIPTION Analog input.
16-BIT LATCHUP PROTECTED
TABLE 7805ALPRP PINOUT DESCRIPTION
Analog ground. Used internally ground reference point. Reference input/output. tantalum capacitor ground Reference buffer capacitor. tantalum capacitor ground. Analog ground. Data Most Significant (MSB) conversion results. When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Digital Ground Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data When STATUS HIGH*, must driven high. Data Least Significat (LSB) conversion results. When STATUS HIGH*, must driven high. STATUS when HIGH indicates latchup protection active output data invalid. Capacitive loading should exceed 1000 With BUSY HIGH, falling edge initiates conversion. When STATUS HIGH*, must driven high. Internally OR'd with R/C. LOW, falling edge initiates conversion. When STATUS HIGH*, must driven high. start conversion, BUSY goes stays until conversion completed digital outputs have been updated. Supply voltage high speed decoupling pin. Decouple ground with ceramic capacitor. Supply input. Nominally Decouple ground with tantalum capacitor.
Memory
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
PARAMETER Analog Inputs SYMBOL DGND AGND1 AGND2 -0.3 -0.3 -0.3 -0.3
16-BIT LATCHUP PROTECTED
TABLE 7805ALPRP ABSOLUTE MAXIMUM RATINGS
AGND2 -0.3 UNIT
Ground Voltage Difference
Supply Input Digital Inputs Internal Power Dissipation Maximum Junction Temperature
TABLE 7805ALPRP ACCURACY SPECIFICATIONS
PARAMETER Integral Linearity Error Differential Linearity Error Missing Codes Transition Noise Full Scale Error Full Scale Error Drift Bipolar Zero Error Bipolar Zero Error Drift Power Supply Sensitivity tested. Typical noise worst case transitions temperatures. Measured with various fixed resistors. Full scale error worst case Full Scale +Full Scale untrimmed deviation from ideal first last code transitions, divided transition voltage (not divided full-scale range) included effect offset error. 4.8V 5.25V CONDITIONS -TYP -1.3 -MAX -±0.5 -±10 UNIR Bits ppm/oC ppm/oC
Memory
TABLE 7805ALPRP DIGITAL INPUTS
PARAMETER IIL, -0.3 -TYP -MAX UNIT
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
PARAMETER Voltage Ranges Impedance Capacitance Tested application signal.
16-BIT LATCHUP PROTECTED
TABLE 7805ALPRP ANALOG INPUTS
-UNIT
TABLE 7805ALPRP THROUGHPUT SPEED
PARAMETER Conversion Time Complete Cycle (Acquire Convert) Throughput Rate tested. -100 -MAX -UNIT
Memory
TABLE 7805ALPRP ACCURACY SPECIFICATIONS
PARAMETER Spurious-Free Dynamic Range Total Harmonic Distortion Signal-to-(Noise Distortion) Signal-to-Noise Full-Power Bandwidth specifications referred full-scale input. Guaranteed design. Full-power bandwidth defined full-scale input frequency which signal-to-(noise distortion) degrades bits accuracy. TEST CONDITIONS -60dB Input -TYP -250 UNIT
TABLE 7805ALPRP SAMPLING DYNAMICS
PARAMETER Aperture Delay Transient Response Overvoltage Recovery Recovers specified performance after input overvoltage. Step TEST CONDITIONS -TYP -UNIT
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
PARAMETER Internal Reference Voltage Internal Reference Source Current (Must external buffer) Internal Reference Drift External Reference Voltage Range Specified Linearity External Reference Current Drain Tested application signal. tested. 2.48
16-BIT LATCHUP PROTECTED
TABLE 7805ALPRP REFERENCE
-MAX 2.52 -100 UNIT ppm/oC
TABLE 7805ALPRP DIGITAL OUTPUTS
PARAMETER Data Formating Data Coding Leakage Current Output Capacitance (ISINK 1.6mA)4.0 (ISOURCE -400uA) High-Z State, VOUT High-Z State -4.0 -TEST CONDITIONS UNIT (Parallel 16-bits Binary Two's Complement) Binary Two's Complement
Memory
TABLE 7805ALPRP POWER SUPPLIES
PARAMETER Power Dissipation TEST CONDITIONS -TYP 20.3 5.25 -UNIT
TABLE 7805ALPRP DIGITAL TIMING
PARAMETER Access Time Relinquish Time -TYP -MAX UNIT
TABLE 7805ALPRP TEMPERATURE
PARAMETER Specified Performance
0414.00Rev5
UNIT
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
PARAMETER Derated Performance Storage Tested application signal.
16-BIT LATCHUP PROTECTED
TABLE 7805ALPRP TEMPERATURE
-MAX UNIT
TABLE 7805ALPRP CONVERSION TIMING1
DESCRIPTION Convert pulse width Data valid delay after BUSY delay from BUSY BUSY delay after end-of-conversion Aperture time Conversion time Acquisition time relinquish time BUSY delay after data valid Previous data valid delay after Throughput time setup time Time between conversions access time Tested application signal. SYMBOL -220 -MAX 7000 UNIT
Memory
TABLE 7805ALPRP CONTROL LINE FUNCTION READ CONVERT
BUSY OPERATION None. Databus Hi-Z state. Initiates converstion "n". Databus remains Hi-Z state. Initiates conversion "n". Databus enters Hi-Z state" Conversion completed. Valid data from conversion databus. Enables databus with valid data from conversion "n". Enables databus with valid data from conversion "n-1". Conversion progress. Enables databus with valid data from conversion "n-1". Conversion progress." conversion initiated without acquisition signal. Data will invalid. and/or must HIGH when BUSY goes HIGH.
data sheets subject change without notice
0414.00Rev5
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
BUSY OPERATION
16-BIT LATCHUP PROTECTED
TABLE 7805ALPRP CONTROL LINE FUNCTION READ CONVERT
convert commands ignored. Conversion progress.
FIGURE CONVERSION TIMING WITH OUTPUTS ENABLED AFTER CONVERSION TIED LOW)
Memory
FIGURE USING CONTROL CONVERSION READ TIMING
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
16-BIT LATCHUP PROTECTED
LPTOperation Latchup Protection Technology (LPTTM) automatically detects increase supply current 7805ALPRP converter single event effect internally cycles power converter off, then which restores steady state operation device. simplified block diagram 7805ALPRP circuitry shown Figure circuitry consists protected device, ADS7805 die, current sensor, power switch, status output driver.
CURRENT SENSOR
POWER SWITCH
STATUS OUTPUT STATUS DRIVER
VDIG VANA PROTECTED DEVICE
DECPLNG
I/Os
Memory
ADS7805 BYTE AGND1 AGND2 DGND 7805ALPRP
Differences Between the7805ALPRP ADS7805 Because 7805ALPRP uses ADS7805 perform analog digital conversion function operation performance very similar ADS7805 packaged part from Burr-Brown. general operation application will same both parts. There primary differences: operation supply pins operation BYTE STATUS pins. ADS7805 provides separate analog digital supply pins. 7805ALPRP provides single supply input place VDIG which powers both analog digital circuitry through LPTcurrent sensor power switch. power supply should treated analog supply isolated from noise system digital power supply. side power switch connects ADS7805 power pads package DECPLNG which replaces VANA pin. DECPLNG allows ceramic capacitors directly decouple ADS7805 die. CAUTION: DECPLNG must connected power supply since this will defeat LPTpower switch could result latchup device during operation radiation environment. Electrolytic capacitors should connected DECPLNG because large capacitance will increase recovery time 7805ALPRP. primary functional difference between ADS7805 7805ALPRP that BYTE signal ADS7805 internally grounded function replaced STATUS output. Grounding BYTE signal permanently assigns data output signal bits 15:0 shown 7805ALPRP pinout diagram where bit15 LSB. level STATUS signal indicates that single event induced latchup current detected LPTcircuitry causing power removed from protected device. CAUTION: During time that power removed from protected device, critical that external circuitry driving device pins does backdrive device supply. Backdriving supply could contribute extended even permanent latchup condition. order prevent backdriving supply, STATUS signal should used system tri-state gate external drive circuits state. Similarly, data outputs connected with other driver circuits, external data drivers must tri-stated individual pull
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
16-BIT LATCHUP PROTECTED
resistors supply voltage used data bus) must less than KOhms typical assure proper single event effect recovery. Tri-stating inputs should occur within nsec after rise status pin. BYTE signal made available place STATUS signal customer request. STATUS also used generate input system data processor indicating that LPTcycle occurred, protected device output accuracy until after respective recovery time event. STATUS signal generated from advanced CMOS logic gate output. This output exhibit monotonic falltime even oscillate briefly while power being restored protected device decoupling capacitance charged. Loading STATUS output should minimized because this signal used internally 7805ALPRP. recommended that load current exceed load capacitance kept well below 1000 summary differences between ADS7805 7805ALPRP provided below.
DIFFERENCES
NUMBER ADS7805 BYTE 7805ALPRP STATUS DIFFERENCE DESCRIPTION high level STATUS signal indicates that power removed from ADS7805 die. pins must driven high while this signal active. BYTE signal ADS7805 internally grounded also made available place STATUS customer request. ADS7805 VANA VDIG pads connected together available DECPLNG pin. This allows external ceramic capacitors directly decouple power inputs ADS7805 die-to-analog ground. Decoupling capacitance should exceed typical. This must connected power supply directly since this will defeat latchup protection circuitry. Electrolytic filter capacitors should connected this should connected between ground. This power supply input circuitry protected ADS7805 die. This supply should treated analog supply with filtering and/or isolation from noisy system digital power supply. latchup current sense power switch circuitry located between this DECPLNG pin.
VANA
DECPLNG
Memory
VDIG
Example Circuits Using 7805ALPRP Figure shows typical application circuit using 7805ALPRP input digital data processor. This circuit shows STATUS tri-state control inputs when latchup protection circuit cycles power protected ADS7805 die. Figure shows typical application circuit connecting 7805ALPRP 16-bit data with multiple drivers bus. Tri-state buffers used isolate 7805ALPRP data outputs from data bus. Figure shows typical application circuit connecting 7805ALPRP 8-bit data bus.
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
16-BIT LATCHUP PROTECTED
FIGURE TYPICAL 7805ALPRP APPLICATION CIRCUIT
Memory
FIGURE TYPICAL 7805ALPRP CIRCUIT WITH 16-BIT INTERFACE
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
16-BIT LATCHUP PROTECTED
FIGURE TYPICAL 7805ALPRP CIRCUIT WITH 8-BIT INTERFACE
Memory
Testing 7805ALPRP Latchup Protection Circuitry DECPLNG provides direct access 7805ALPRP converter supply pins attaching external decoupling capacitor(s) ground. This also used test LPToperation sinking pulsed current load ground shown test circuit Figure described Operating Characteristics Table (Table Timing diagram (Figure This test approximates operation 7805ALPRP response single event latchup recovery. During time that power cycled, output signals data from 7805ALPRP invalid. STATUS signal HIGH indicates that power removed from ADS7805 die. input pins must driven tri-stated. When this signal low, power applied ADS7805 die. STATUS signal used measure supply recovery time. status signal exhibit multiple transitions when power re-applied decoupling capacitors charged. duration number transitions dependent amount capacitance used. supply recovery time interval starts when supply current rises (causing STATUS high) ends when STATUS signal stabilizes again. Within functional recovery time interval (typically usec after circuit reapplies power), normal functional operation converter restored with less than full scale error. Additional settling time then required return full accurate operation. Defined recovery time intervals indicate that time recover first within 8-bit accuracy, then within accuracy, finally full 16-bit accuracy. These recovery times primarily single event power cycling effects reference circuits settling times their respective filter capacitors.
LPTOPERATING CHARACTERISTICS
PARAMETER Supply threshold current ITHR Protection time Peak .2A) Input tri-state time TIOFF Status instability time TINST Supply recovery time Peak .2A)
0414.00Rev5
-100
UNITS µsec µsec µsec µsec
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
PARAMETER Functional recovery time Peak .2A) 8-Bit accuracy recovery time Peak .2A) 12-Bit accuracy recovery time Peak .2A) T12R Full accuracy recovery time Peak .2A) TFAR
16-BIT LATCHUP PROTECTED
LPTOPERATING CHARACTERISTICS
-UNITS µsec msec msec msec
FIGURE LPTTEST CIRCUIT
Memory
FIGURE
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
16-BIT LATCHUP PROTECTED
Memory
RAD-PAK® FLAT PACKAGE
SYMBOL 0.390 0.028 0.000 0.177 0.015 0.004 -0.400 -0.295 0.000 DIMENSION 0.192 0.017 0.005 0.800 0.410 -0.300 0.055 0.050 0.400 0.032 0.067 0.410 0.036 -MAX 0.207 0.022 0.009 0.808 0.420 0.440
F28-09 Note: dimensions inches
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
16-BIT LATCHUP PROTECTED
Memory
28-PIN RAD-PAK® DUAL LINE PACKAGE
SYMBOL eA/2 0.165 0.015 0.005 0.005 -0.014 0.045 0.008 -0.585 DIMENION 0.185 0.018 0.050 0.010 1.600 0.595 0.600 0.300 0.100 0.175 0.030 0.125 0.185 0.060 -MAX 0.225 0.026 0.065 0.018 1.616 0.605
D28-08 Note: dimensions inches
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.
7805ALPRP
Important Notice:
16-BIT LATCHUP PROTECTED
These data sheets created using chip manufacturers published specifications. Space Electronics verifies functionality testing parameters either 100% testing, sample testing characterization. specifications presented within these data sheets represent latest most accurate information available date. However, these specifications subject change without notice Space Electronics assumes responsibility this information. Space Electronics' products authorized critical components life support devices systems without express written approval from Space Electronics. claim against Space Electronics Inc. must made within days from date shipment from Space Electronics. Space Electronics' liability shall limited replacement defective parts.
Memory
0414.00Rev5
data sheets subject change without notice
©1999 Space Electronics Inc. rights reserved.

16-BIT LATCHUP PROTECTED 7805ALPRP AGND1 AGND2 (MSB) DGND

Top Searches for this datasheet

Other recent searches