P-Series Linear Photodiode Array Imagers 14µm, single output, 512
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P-Series Linear Photodiode Array Imagers
14µm, single output, 512, 1024, 2048 elements
Description
P-series linear imager, PerkinElmer combined best features high-sensitivity photodiode array detection high-speed chargecoupled scanning offer uncompromising solution increasing demands advanced imaging applications These high performance imagers feature noise, high sensitivity, impressive charge storage capacity, lag-free dynamic imaging convenient single-output architecture. 14µm square contiguous pixels these imagers reproduce images with minimum information loss artifact generation, while their unique photodiode structure provides excellent blue response extending below 250nm into ultraviolet. two-phase readout register requires only volts clocking achieves excellent charge transfer efficiency. Additional electrodes provide independent control exposure antiblooming. Finally, high-sensitivity readout amplifier provides large output signal relax noise requirements camera electronics that follow. Available standard array lengths 512, 1024, 2048 elements with either glass UV-enhanced fused silica windows, these versatile imagers widely used high-speed document reading, inspection, mail sorting, production measurement gauging, position sensing, spectroscopy, other industrial scientific applications requiring peak imager performance.
Features
Extended spectral range-200 1000 pixel readout rate with line rates >2500:1 dynamic range
5-volt clocking
14µm square pixels with 100% fill factor
Ultra image Electronic exposure antiblooming controls
Note: While P-Series imagers have been designed resist electrostatic discharge (ESD), they damaged from such discharges. Always observe proper precautions when handling storing this imager.
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DSP-101 8/2004W Page
Linear Photodiode Array Imagers
Description (cont.)
P-series imagers combine high-performance photodiodes with high speed readout registers high-sensitivity readout amplifier. Refer Figure construction details.
Figure Spectral Sensitivity Curve
Light Detection Area
light detection area P-series imagers linear array contiguous pinned photodiodes centers. These photodiodes constructed using PerkinElmer's advanced photodiode design that extends short-wavelength sensitivity into deep below while preserving 100% fill factor delivering extremely image lag. This unique design also avoids polysilicon layers light detection area that reduces quantum efficiency most imagers. Pseries imagers supplied with glass windows general visible use, fused silica windows below 250nm. custom basis, P-series imagers supplied without affixed window. Figures sensitivity window transmission curves. lowest lag, P-series imagers feature pinned photodiodes. Pinning, which requires special semiconductor process step, provides uniform internal voltage reference charge stored every photodiode. This stable reference assures that every photodiode fully discharges after every scan. Photodiodes covered with light sheilds included both ends imager provide dark current reference clamping. These separated from active photodiodes unshielded transition pixels that assure uniform response last active photodiode.
Responsivity (V/m J/cm
(right scale)
1050
Responsivity (Left Scale)
Wavelength (nm)
Figure Window Transmission Curve
Fused Silica
Transmission
1050 Glass
Wavelength (nm)
Figure Imager Functional Diagram
RL0512 1024 RL1024P 2048 RL2048P
Antiblooming/Exposure Control Gate
Isolation stages Dark pixels (D1.D10) Transition pixels (T1, .D10 (Light shield ends between Active Pixels (1.N) Transition pixels (T3, (Light shield ends between D11) Dark pixels (D11.D20) (not used RL0512) Transfer Gate
.D20
Output 2-Phase Buried Channel Shift Register
Isolation Stages
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Linear Photodiode Array Imagers
Light Detection Area (cont)
potential light leakage, dark pixels nearest transition pixels should used dark reference.
Figure Transfer Timing Diagram
Horizontal Shift Registers
Charge packets collected photodiodes light received converted serialized output stream through buried channel, twophase shift register that provides high charge transfer efficiency shift frequencies MHz. PerkinElmer 5-volt process used this design enables low-power, high-speed operation with inexpensive, readilyavailable driver devices. transfer gate controls movement charge packets from photodiodes shift register. During charge integration, voltage controlling held state isolate photodiodes from shift register. When transfer charge shift register desired, switched high state create transfer channel between photodiodes shift register. charge transfer sequence, detailed Figure proceeds follows: After readout particular image line (n), shift register empty charge ready accept charge packets from photodiode representing image line n+1. begin transfer sequence, horizontal clock pulses stopped with held high state, state. then switched high start transfer charge shift register. Once reaches high state, photo gate voltage high complete transfer. recommended that photo gate voltage held high state least ensure complete transfer. After this interval, photo gate voltage returned state, when this completed, transfer gate also returned state. details transfer timing shown Figure with ranges tolerances Table After transfer, charge transported along shift register alternate action horizontal phase voltages While two-phase shift register architecture allows relaxed timing tolerances over those required three four-phase, optimum charge transfer efficiency (CTE) lowest power dissipation obtained when overlap two-phase clocks occurs around transition level. Additionally, phase difference between signals should maintained near 180o duty cycle should near prevent loss full well charge storage capacity charge transfer efficiency.
VOut Note Note
Notes: Transition dark pixels Active Pixels
Table Transfer Timing Requirements
Item Delay falling edge from falling edge Delay rising edge from clocks Delay rising edge from falling edge pulse width pulse width Rise/fall time Integration time pulse width
Note 750ns typical time fully reset photodiode
Figure Readout Timing Waveforms
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Linear Photodiode Array Imagers
Horizontal Shift Registers (cont.)
Readout timing details shown Figure with ranges tolerances Table
Table Readout Timing Requirements
Item clock period rise/fall time rise/fall time clock high duration Delay high -low transition from
Timing Requirements
high-speed applications, fast waveform transitions allow maximum settling time output signal. However, generally advisable slowest rise fall times consistent with required video performance because fast edges tend introduce more transition noise into video waveform. When highest speeds required, careful smoothing waveform transitions improve balance between speed video quality.
Note: cross over point clock transitions should occur within level clock amplitude.
Table Imager Performance (typical)
Pixel count elements (RL0512P) 1024 elements (RL1024P) 2048 elements (RL2048P) Pixel size Exposure control Horizontal clocking Number outputs Dynamic range amplifier reset transistor total noise without Saturation exposure Amplifier sensitivity Saturation output voltage Saturation charge capacity Charge Transfer Efficiency Peak responsivity PRNU Dead pixels Spectral Response Range Data Range
Notes: Defined Qsat/rms noise (total) illumination
Output Amplifier
Charge emerging from last stage shift register converted voltage signal charge integrator video amplifier. integrator, capacitor created floating diffusion, initially reference voltage (VRD) setting reset transistor voltage high state. read charge, pulsed turning reset transistor isolating integrator from VRD. next time goes low, charge packet transferred integrator, where generates voltage proportional packet size. reset transistor voltage, must reach state prior high-to-low transition apparent clipping video signal will result this condition satisfied. Figure details clock waveform requirements overlap tolerances. video amplifier buffers signal from integrator output from imager. Care must taken keep load this amplifier within ability drive highly reactive impedance loads. half power bandwidth into external load MHz. recommended that output video signal buffered with wide bandwidth follower other appropriate amplifier provide large output amplifier. Keep external amplifier close output pins minimize stray inductive capacitive coupling output signal that harm signal quality.
clock amplitude) >2500:1 electrons electrons electrons nJ/cm2 pJ/cm2 µV/electron 1100 167,000 electrons >0.99995 41V/µJ/cm2 1.5% 1000
Readout noise (rms)
Noise equivalent exposure
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Linear Photodiode Diode Arrays
Exposure Control Antiblooming
Table Operating Voltages
exposure control feature P-series imagers supports variable charge accumulation time photodiode. When antiblooming gate voltage high state, charge drained from pixel storage gate exposure control drain. During normal charge collection photodiode, state. timing requirements exposure control mode, charge always accumulated period just before charge transferred readout register. Figure includes timing requirements exposure control with antiblooming gate. exposure control timing shown will charge packets that emerge video data next readout cycle.
Signal
Function
Horizontal Clocks
Transfer Gate Photo Gate Antiblooming Gate Output Gate Reset Gate Amplifier Voltage Supply Amplifier Reset Drain Amplifier Return/Light Shield
State High High High High
Voltage
Tolerance ±10% ±10%
High
Imager Performance
P-series imagers each element performs function admirably while integrating smoothly with other elements team. photodiodes efficiently transform light charge, readout registers accurately transport charge amplifier, amplifier delivers clean, robust signal image processing electronics. While actual performance these imagers depends strongly details electronics timing camera provides, their straight-forward implementation requirements facilitate optimum designs.
Table Absolute Maximum Ratings (Above Which Useful Life Impaired)
Temperature Storage Operating Voltage (with respect GND) Pins Pins Pins Pins -0.3 -0.3 -0.3 -4.3 Unit
Operating Conditions
optimum performance longest life, carefully follow operational requirements these imagers. Provide stable voltage sources free noise variation, clean waveforms with controlled edges. Protect imager from electrostatic discharge (ESD) excessive voltages temperatures. violate limits output register speed reduce timing margins below minimums.
Precautionary Note: output (pin must never shorted either while power applied device. Catastrophic device failure will result!
Imager Configuration
P-series imagers constructed using ceramic packages optically-flat windows. Imager secured precision lead frames thermal silver-filled epoxy. Packages baked before sealing eliminate moisture, tested seal integrity.
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DSP-101 8/2004W Page
Linear Photodiode Array Imagers
Table Pinout Description Capacitance Values
Capacitance (pF) (typ)
VOut
Function Amplifier return Signal output horizontal phase horizontal phase connection connection connection connection connection Amplifier drain supply Light shield connection connection connection Antiblooming gate Photo gate Transfer gate Output gate Reset gate Reset drain
Pixels
2048
1024
Figure Pinout Configuration
VOut
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Linear Photodiode Array Imagers
Figure Outline Drawings
Pixel
Measurements inches (millimeters) Maximum angular error milliradians
0.205 0.0075 (5.21 0.19)
Sensing Area
0.395 0.008 (10.03 0.20) 0.020 0.002 (0.508 0.05) 0.020 0.002 (0.508 0.05) 0.080 0.009 (2.032 0.23)
0.450 0.0075 (11.43 0.19)
0.020 0.002 (0.50 0.05)
0.300 0.018 0.002 (7.62) (0.46 0.05) 0.100 0.005 (2.54 0.13) 0.900 0.005 (22.86 0.13)
0.170 (4.32)
0.400 0.010 (10.16 0.25)
stand off)
Ordering Information
RL0512P, RL1024P, RL2048P available with either glass fused silica windows. special orders, PerkinElmer supply anti-reflectance coated windows windowless packages. Imagers packed electrostaticresistant bozes identified numbers tracking.
Table Package Dimensions Tolerances
Device RL0512P RL1024P RL2048P Inches 0.284 0.566 1.131 7.224 14.392 28.728 Inches 1.500 ±0.15 1.500 ±0.15 1.500 ±0.15 38.1± 0.381 38.1± 0.381 38.1± 0.381
Notes: Includes active transition pixels
Table Stock Part Numbers
Active Pixels Window Glass Fused Silica RL0512PAG-021 RL0512PAQ-021 1024 RL1024PAG-021 RL1024PAQ-021 2048 RL2048PAG-021 RL2048PAQ-021
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DSP-101 8/2004W Page
Linear Photodiode Arrays Imagers
Table Sales Offices
United States PerkinElmer Optoelectronics 2175 Mission College Blvd Santa Clara, 95054 Toll Free: 800-775-OPTO (6786) Phone: +1-408-565-0830 Fax: +1-408-565-0703 PerkinElmer Optoelectronics GmbH Wenzel-Jaksch-Str. D65199 Wiesbaden, Germany Phone: +49-611-492-570 Fax: +49-611-492-165 PerkinElmer Japan Ltd. Yokohama Nishiguti Bldg. 2-8-4 Kitasaiwai, Nishi-ku Yokohoama-shi, 220-0004 Japan Phone: +81-45-314-9022 Fax: +81-45-314-9023
Europe
more information, email ccd@perkinelmer.com, visit website www.perkinelmer.com/ccd values nominal; specifications subject change without notice.
Japan
Singapore
Ayer Rajah Crescent #06-12 Singapore 139947 Phone: +65-770-4925 Fax: +65-777-1008
2004. PerkinElmer Inc. rights reserved.
PerkinElmer, PerkinElmer logo stylied trademarks PerkinElmer Inc.
DSP-101.01I- 8/2004W
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