Data Sheet October 2004 FN2925.9 Dual Quad, 8MHz, Noise Operation
|
|
|
Top Searches for this datasheet
HA-5102, HA-5104
Data Sheet October 2004 FN2925.9
Dual Quad, 8MHz, Noise Operational Amplifiers
noise high performance words describing HA-5102 HA-5104. These general purpose amplifiers offer array dynamic specifications including 3V/µs slew rate 8MHz bandwidth. Complementing these outstanding parameters very noise specification 4.3nV/Hz 1kHz. Fabricated using Intersil high frequency process, these operational amplifiers also offer excellent input specifications such 0.5mV offset voltage 30nA offset current. Complementing these specifications 108dB open loop gain 60dB channel separation. Consuming very modest amount power (90mW/ package duals 150mW/package quads), HA-5102/04 also provide 15mA output current. This impressive combination features make this series amplifiers ideally suited designs ranging from audio amplifiers active filters most demanding signal conditioning instrumentation circuits. These operational amplifiers available dual quad form with industry standard pinouts allowing immediate interchangeability with most other dual quad operational amplifiers. HA-5102 Dual, Comp. HA-5104 Quad, Comp. Refer /883 data sheet military product.
Features
Noise 4.3nV/Hz Bandwidth 8MHz (Compensated) Slew Rate 3V/µs (Compensated) Offset Voltage 0.5mV Available Duals Quads
Applications
High Active Filters Audio Amplifiers Instrumentation Amplifiers Integrators Signal Generators Further Design Ideas, Application Note AN554
Pinouts
HA-5102 (CERDIP) VIEW
OUT1 -IN1 +IN1 OUT2 -IN2 +IN2
HA-5104 (CERDIP) VIEW
OUT1 OUT4 -IN4 +IN4
Ordering Information
TEMP. RANGE PART NUMBER (oC) HA7-5102-2 HA1-5104-2 HA9P5104-9 PACKAGE CERDIP CERDIP SOIC PKG. DWG. F8.3A F14.3 M16.3
-IN1 +IN1 +IN2 -IN2 OUT2
+IN3 -IN3 OUT3
HA5104 (SOIC) VIEW
OUT1 -IN1 +IN1 +IN2 -IN2 OUT2
OUT4 -IN4 +IN4
+IN3 -IN3 OUT3
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2004. Rights Reserved other trademarks mentioned property their respective owners.
HA-5102, HA-5104
Absolute Maximum Ratings
Supply Voltage Between Terminals. Differential Input Voltage Input Voltage ±VSUPPLY Output Short Circuit Duration (Note Indefinite
Thermal Information
Thermal Resistance (Typical, Note (oC/W) (oC/W) Lead CERDIP Package. Lead CERDIP Package. SOIC Package Maximum Junction Temperature (Note Hermetic Package) .175oC Maximum Junction Temperature (Plastic Package) .150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (SOIC Lead Tips Only)
Operating Conditions
Temperature Range HA-510X-2 -55oC 125oC HA-5104-9 -40oC 85oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: Maximum power dissipation, including output load, must designed maintain maximum junction temperature below 175oC hermetic packages, below 150oC plastic packages. measured with component mounted effective thermal conductivity test board free air. Tech Brief TB379 details. amplifier shorted ground indefinitely.
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS Offset Voltage
VSUPPLY ±15V, Unless Otherwise Specified TEMP. (oC) HA-5102-2 HA-5104-2 HA-5104-9 UNITS
Full
µV/oC
Offset Voltage Average Drift Bias Current
Full Full
Offset Current
Full
Input Resistance Common Mode Range TRANSFER CHARACTERISTICS Large Signal Voltage Gain, (VOUT ±5V, Common Mode Rejection Ratio (VCM ±5.0V) Small Signal Bandwidth, Channel Separation (Note OUTPUT CHARACTERISTICS Output Voltage Swing 10k) Output Current, (VOUT ±5V) Full Power Bandwidth (Note Output Resistance STABILITY Minimum Stable Closed Loop Gain TRANSIENT RESPONSE (Note
Full
Full Full
kV/V kV/V
Full Full Full
Full
FN2925.9
HA-5102, HA-5104
Electrical Specifications
PARAMETER Rise Time Overshoot Slew Rate Settling Time (Note NOISE CHARACTERISTICS (Note Input Noise Voltage 10Hz 1kHz Input Noise Current 10Hz 1kHz Broadband Noise Voltage 30kHz 0.57 0.57 0.57 nV/Hz nV/Hz pA/Hz pA/Hz nVRMS VSUPPLY ±15V, Unless Otherwise Specified (Continued) TEMP. (oC) HA-5102-2 HA-5104-2 HA-5104-9 UNITS V/µs
POWER SUPPLY CHARACTERISTICS Supply Current (All Amps) Power Supply Rejection Ratio, ±5V) NOTES: Channel separation value referred input amplifier. Input test conditions are: 10kHz; 100mVPEAK; Slew Rate Full power bandwidth guaranteed equation: Full power bandwidth PEAK Refer Test Circuits section data sheet. Settling time measured 0.1% final value input step, limits these parameters guaranteed based characterization, reflect lot-to-lot variation. Full
FN2925.9
HA-5102, HA-5104 Test Circuits Waveforms
50pF
50pF
OUTPUT INPUT 200mV INPUT
OUTPUT
Vertical 5V/Div., Horizontal 5µs/Div. FIGURE LARGE SIGNAL RESPONSE CIRCUIT
Vertical 40mV/Div., Horizontal 50ns/Div. FIGURE SMALL SIGNAL RESPONSE CIRCUIT
+15V 2N4416 (NOTE +15V VOUT (NOTE OSCILLOSCOPE
-15V 50pF
NOTES: Feedback summing resistors should 0.1% matched. Clipping diodes optional, HP5082-2810 recommended. FIGURE SETTLING TIME CIRCUIT
FN2925.9
HA-5102, HA-5104 Simplified Schematic
OUTPUT
V+INPUT -INPUT
Typical Performance Curves
±15V, 25oC HIGH TYPICAL NOISE CURRENT (pA/Hz) ±15V, 25oC
NOISE VOLTAGE (nV/Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE INPUT NOISE VOLTAGE DENSITY
FIGURE INPUT NOISE CURRENT DENSITY
FN2925.9
HA-5102, HA-5104 Typical Performance Curves
(Continued)
±15V, 25oC, 50µV/Div., 1s/Div., 1000V/V Input Noise 0.232µVP-P FIGURE 0.1Hz 10Hz NOISE
±15V INPUT OFFSET VOLTAGE (mV) OFFSET VOLTAGE (mV)
±15V, 25oC, 500µV/Div., 1s/Div., 1000V/V Total Output Noise 2.075µVP-P FIGURE 0.1Hz 1MHz NOISE
25oC
TEMPERATURE (oC) SUPPLY VOLTAGE (±V)
FIGURE TEMPERATURE
FIGURE
±15V
INPUT BIAS CURRENT (nA)
±15V
INPUT OFFSET CURRENT (nA)
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE TEMPERATURE
FIGURE IBIAS TEMPERATURE
FN2925.9
HA-5102, HA-5104 Typical Performance Curves
TOTAL SUPPLY CURRENT (mA) ±15V, IOUT TOTAL SUPPLY CURRENT (mA)
(Continued)
25oC, IOUT
TEMPERATURE (oC)
SUPPLY VOLTAGE (±V)
FIGURE TEMPERATURE (HA-5104)
FIGURE (HA-5102)
OPEN LOOP VOLTAGE GAIN (105V/V)
OPEN LOOP VOLTAGE GAIN (105V/V)
±15V, ±10V,
±10V, ±15V 125oC
25oC
-55oC
TEMPERATURE (oC)
LOAD RESISTANCE
FIGURE AVOL TEMPERATURE
FIGURE AVOL LOAD RESISTANCE
25oC, OUTPUT SWING (±V)
25oC,
OPEN LOOP GAIN (kV/V)
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
FIGURE AVOL
FIGURE VOUT
FN2925.9
HA-5102, HA-5104 Typical Performance Curves
±15V, 25oC
(Continued)
OUTPUT CURRENT (mA)
CMRR (dB)
VOUT -15V
VOUT +15V
TIME (SECONDS)
-100
100K
FREQUENCY (Hz)
FIGURE OUTPUT SHORT CIRCUIT CURRENT TIME
FIGURE CMRR FREQUENCY
POWER SUPPLY REJECTION (dB)
±15V, 50pF
-55oC GAIN
+PSRR -PSRR
125oC GAIN
125oC PHASE -55oC PHASE -135
-100
100K
100K
FREQUENCY (Hz)
-225
FREQUENCY (Hz)
FIGURE PSRR FREQUENCY
FIGURE UNITY GAIN FREQUENCY RESPONSE
VOLTAGE GAIN (dB) OVERSHOOT PHASE 100K 100M GAIN ±15V, 25oC, 50pF
±15V, 25oC,
PHASE SHIFT (DEGREES)
LOAD CAPACITANCE (pF)
FREQUENCY (Hz)
FIGURE OPEN LOOP GAIN FREQUENCY
FIGURE SMALL SIGNAL OVERSHOOT CLOAD
FN2925.9
PHASE SHIFT (DEGREES)
VOLTAGE GAIN (dB)
HA-5102, HA-5104 Typical Performance Curves
50pF, ±15V RISE TIME (NORMALIZED)
(Continued)
50pF, ±15V
SLEW RATE (NORMALIZED)
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE SLEW RATE TEMPERATURE
FIGURE RISE TIME TEMPERATURE
Characteristics
DIMENSIONS: 98.4 mils 67.3 mils mils 2500µm 1710µm 483µm METALLIZATION: Type: Thickness:
PASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, Phos.) Silox Thickness: Nitride Thickness: SUBSTRATE POTENTIAL (POWERED UP): Unbiased TRANSISTOR COUNT: PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5102
V+IN1 -IN1 OUT1
+IN2
-IN2
OUT2
FN2925.9
HA-5102, HA-5104 Characteristics
DIMENSIONS: mils mils mils 2420µm 2530µm 483µm METALLIZATION: Type: Thickness: PASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, Phos.) Silox Thickness: Nitride Thickness: SUBSTRATE POTENTIAL (POWERED UP): Unbiased TRANSISTOR COUNT: PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5104
+IN2 +IN1
-IN2
-IN1
OUT2 OUT3
OUT1 OUT4
-IN3
-IN4
+IN3
+IN4
FN2925.9
HA-5102, HA-5104 Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
-A-DBASE METAL -Bbbb BASE PLANE SEATING PLANE SECTION LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION
LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL 0.014 0.014 0.045 0.023 0.008 0.008 0.220 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.405 0.310 MILLIMETERS 0.36 0.36 1.14 0.58 0.20 0.20 5.59 5.08 0.66 0.58 1.65 1.14 0.46 0.38 10.29 7.87 NOTES Rev. 4/94
eA/2
eA/2
0.100 0.300 0.150 0.125 0.015 0.005 0.200 0.060 105o 0.015 0.030 0.010 0.0015
2.54 7.62 3.81 3.18 0.38 0.13 5.08 1.52 105o 0.38 0.76 0.25 0.038
NOTES: Index area: notch identification mark shall located adjacent shall located within shaded area shown. manufacturer's identification shall used identification mark. maximum limits lead dimensions shall measured centroid finished lead surfaces, when solder plate lead finish applied. Dimensions apply lead base metal only. Dimension applies lead plating finish thickness. Corner leads N/2, N/2+1) configured with partial lead paddle. this configuration dimension replaces dimension This dimension allows off-center lid, meniscus, glass overrun. Dimension shall measured from seating plane base plane. Measure dimension four corners. maximum number terminal positions. Dimensioning tolerancing ANSI Y14.5M 1982. Controlling dimension: INCH
FN2925.9
HA-5102, HA-5104 Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
-A-DBASE METAL -Bbbb BASE PLANE SEATING PLANE SECTION LEAD FINISH
F14.3 MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
INCHES SYMBOL 0.014 0.014 0.045 0.023 0.008 0.008 0.220 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.785 0.310 MILLIMETERS 0.36 0.36 1.14 0.58 0.20 0.20 5.59 5.08 0.66 0.58 1.65 1.14 0.46 0.38 19.94 7.87 NOTES Rev. 4/94
eA/2
eA/2
0.100 0.300 0.150 0.125 0.015 0.005 0.200 0.060 105o 0.015 0.030 0.010 0.0015
2.54 7.62 3.81 3.18 0.38 0.13 5.08 1.52 105o 0.38 0.76 0.25 0.038
NOTES: Index area: notch identification mark shall located adjacent shall located within shaded area shown. manufacturer's identification shall used identification mark. maximum limits lead dimensions shall measured centroid finished lead surfaces, when solder plate lead finish applied. Dimensions apply lead base metal only. Dimension applies lead plating finish thickness. Corner leads N/2, N/2+1) configured with partial lead paddle. this configuration dimension replaces dimension This dimension allows off-center lid, meniscus, glass overrun. Dimension shall measured from seating plane base plane. Measure dimension four corners. maximum number terminal positions. Dimensioning tolerancing ANSI Y14.5M 1982. Controlling dimension: INCH.
FN2925.9
HA-5102, HA-5104 Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M16.3 (JEDEC MS-013-AA ISSUE
LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 2.35 0.10 0.33 0.23 10.10 7.40 2.65 0.30 0.51 0.32 10.50 7.60 NOTES Rev. 12/93
0.0926 0.0040 0.013 0.0091 0.3977 0.2914
0.1043 0.0118 0.0200 0.0125 0.4133 0.2992
0.10(0.004)
0.050 0.394 0.010 0.016 0.419 0.029 0.050
1.27 10.00 0.25 0.40 10.65 0.75 1.27
0.25(0.010)
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch) Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, www.intersil.com
FN2925.9
Other recent searches
STM4639 - STM4639 STM4639 Datasheet
SGSF324 - SGSF324 SGSF324 Datasheet
C10442 - C10442 C10442 Datasheet
C10443 - C10443 C10443 Datasheet
BAV18 - BAV18 BAV18 Datasheet
BAV21 - BAV21 BAV21 Datasheet
AT04-2P - AT04-2P AT04-2P Datasheet
2SC4057 - 2SC4057 2SC4057 Datasheet
2N6768 - 2N6768 2N6768 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
