ADC-208A 8-Bit, 20MSPS CMOS Flash (ADC-208 Compatible) FEATU
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ADC-208A
8-Bit, 20MSPS CMOS Flash (ADC-208 Compatible)
FEATURES
8-bit flash converter 20MHz sampling rate 10MHz full-power bandwidth Sample-hold required power CMOS +5Vdc operation Micron CMOS 8-Bit latched outputs Surface-mount version missing codes
INPUT/OUTPUT CONNECTIONS
FUNCTION
CLOCK INPUT -REFERENCE ANA/DIG (VSS) ANALOG INPUT MIDPOINT ANALOG INPUT ANA/DIG (VSS) +REFERENCE N.C. N.C.
FUNCTION
(LSB) (MSB) N.C.
GENERAL DESCRIPTION
ADC-208A utilizes advanced VLSI micron CMOS providing 20MHz sampling rates 8-bits. flexibility design architecture process delivers latch-up free operation without external components operation over full military range. ADC-208A mechanically electrically equivalent ADC-208 Series, with exception OVERFLOW (pin ENABLE (pins functions. These functions offered ADC-208A.
ANALOG INPUT
CLOCK GENERATOR
CLOCK
+REFERENCE
ENCODER
REFERENCE
MIDPOINT REFERENCE
REFERENCE
REFERENCE
DIGITAL
PINS
+VDD
PINS ANALOG
(LSB)
Figure ADC-208A Block Diagram
DATEL, Inc., Mansfield, 02048 (USA) Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 E-mail: sales@datel.com Internet: www.datel.com
ADC-208A
ABSOLUTE MAXIMUM RATINGS
PARAMETERS Power Supply Voltage (VDD Digital Inputs Analog Input Reference Inputs Digital Outputs (short circuit protected ground) Lead Temperature sec. max.) Storage Temperature FUNCTIONAL SPECIFICATIONS (Typical power, +25°C, 20MHz clock, +REFERENCE +5V, -REFERENCE ground, unless noted) ANALOG INPUT Single-Ended, Non-Isolated Input Range 20MHz Analog Input Capacitance (static (dynamic Reference Ladder Resistance Reference Input (Note DIGITAL INPUTS Logic Levels Logic Logic Logic Loading Logic Loading Logic Loading Clock Pulse Width DIGITAL OUTPUTS Logic Levels Logic Logic Logic Loading Logic Loading Logic Loading Output Data Valid Delay From Rising Clock Edge probability 100% probability +25°C -55°C +125°C Data Output Resolution Data Coding PERFORMANCE Sampling Rate Full Power Bandwidth Diff. Linearity +25°C (See tech note Code Transitions Center Codes Diff. Linearity Over Temp. Code Transitions Center Codes Int. Linearity +25°C (See tech note 4)(ref. adjusted) End-point Best-fit Line Int. Linearity Over Temp. (ref. adjusted) Best-fit Line Int. Linearity +25°C (ref. unadjusted) End-point Best-fit Line ±0.5 ±0.25 ±0.5 ±0.25 ±1/2 ±1.6 ±1.0 ±1.0 ±1/2 ±1/2 ±2.6 ±1.9 MSPS Volts Volts nSec nSec nSec Bits Footnotes: Maximum input impedance function clock frequency. full-power input. 10-step, NTSC ramp test. Volts Volts nSec MIN. -0.5 TYP. MAX. +5.0 +0.5 UNITS Volts Ohms Volts LIMITS -0.5 -0.5 +5.5 -0.5 (+VDD +0.5) -0.5 (+VDD +0.5) -0.5 +5.5 +300 max. +150 UNITS Volts Volts Volts Volts Volts PERFORMANCE Int. Linearity Over Temp. (ref. unadjusted) End-point Best-fit Line Zero-Scale Offset (Code transition) Gain Error Differential Gain Differential Phase Aperture Delay Aperture Jitter Harmonic Distortion (8MHz second order harm.) Ref. bandwidth (See tech note Power Supply Rejection Missing Codes POWER REQUIREMENTS Power Supply Range (+VDD) Power Supply Current +25°C +125°C -55°C Power Dissipation +25°C +125°C -55°C PHYSICAL ENVIRONMENTAL Operating Temp. Range, Case: MC/LM Versions MM/LM/QL Versions Storage Temp. Range Package Type +125 +150 +3.0 +5.0 +5.5 Volts MIN. TYP. MAX. UNITS
±2.3 ±1.8 ±1.5
±2.6 ±2.0
degrees
±0.02 ±0.05 %FSR/%Vs Over operating temperature range
24-pin ceramic 24-pin ceramic
Straight binary
TECHNICAL NOTES
Reference ladder floating with respect referenced anywhere within specified limits. modulation reference voltage also utilized; contact DATEL further information. Clock Pulse Width improve performance when input signals exceed Nyquist bandwidths, clock duty cycle adjusted that portion (sample mode) clock pulse 15nSec wide. Reducing sampling time period minimizes amount input voltage slews prevents comparators from saturating. full-scale input produces data outputs.
DATEL uses conservative definitions when specifying Intergal Linearity (end-point) Differential Linearity (code transition). specifications using less conservative definition have also been provided comparative specification products specified this way.
DATEL, Inc., Mansfield, 02048 (USA) Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 E-mail: sales@datel.com Internet: www.datel.com
ADC-208A
process that used fabricate ADC-208A eliminates latchup phenomena that plagued CMOS devices past. These converters require external protection diodes. clock rates less than 100kHz, there some degradation offset differential nonlinearity. Performance improved increasing clock duty cycle (decreasing time spent sample mode). Connect converter appropriately; typical connection circuit shown Figure Then apply appropriate clock input.The reference input should held ±0.1% accuracy better. power supply reference without precision regulation high-frequency decoupling capacitors. Zero Adjustment Adjusting voltage -REFERENCE (pin adjusts offset zero device. tied GROUND operation without adjustments Full Scale Adjustment Adjusting voltage +REFERENCE (pin adjusts gain device. tied directly reference operation without adjustment.
Table ADC-208A Output Code ANALOG INPUT 0.00V +0.02V +1.28V +2.54V +2.56V +2.58V +3.84V +5.10V CODE Zero 0000 FS-ILSB FS+ILSB DATA 1234 0000 0000 0100 0111 1000 1000 1100 1111 DATA 5678 0000 0001 0000 1111 0000 0001 0000 1111 DECIMAL
Note: Values shown here +5.12Vdc reference. Scale other refereces proportionally. (+REF=+5.12V, -REF=GND, References FS=No Connection)
10.Integral Nonlinearity Adjustments Provision made optional adjustment Integral Nonlinearity through access reference's full scale points. example, REF. MIDPOINT (pin tied precision voltage halfway between +REFERENCE -REFERENCE. Pins should bypassed GROUND through 0.1µF capacitors operation without adjustments
4.7µF
0.01µF 1,10,19 0.1µF 4.7µF
(LSB) (MSB)
HA-5033
20MHz CLOCK
CLOCK
REF-3
+15V LM324 REF. 4.7µF +15V
REF+9
4.7µF 0.1µF
HP2811
0.1µF
LM324 4.7µF 0.1µF
0.1µF 1.5k 0.1µF 1.5k 0.1µF 4.7µF LM324 0.1µF LM324 4.7µF 0.1µF
Figure ADC-208A Typical Connection Diagram
DATEL, Inc., Mansfield, 02048 (USA) Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 E-mail: sales@datel.com Internet: www.datel.com
ADC-208A
MECHNICAL DIMENSIONS
ADC-208A
1.250 (31.7) 0.050 (1.27)
ADC-208A
0.250 ±0.005 (6.35)
DATEL
ADC-208A
0.500 (12.7)
0.610 (15.5)
0.400 +0.010, -0.005 (10.16)
IDENTIFIER
0.020 ±0.005 (0.50) 0.090 Max. (2.28) 0.38 (9.7)
0.190 (4.9)
0.190 (4.9) 0.050 (1.3)
0.020 (0.5)
0.100 (2.5)
AUTO ZERO
SAMPLE
AUTO ZERO
SAMPLE
AUTO ZERO
SAMPLE
ORDERING INFORMATION
MODEL ADC-208AMC TEMP. RANGE +70°C -55°C +125°C +70°C -55°C +125°C PACKAGE 24-pin 24-pin 24-pin 24-pin
DATA
DATA
ADC-208AMM ADC-208ALC
40nSec max.
40nSec max.
ADC-208ALM
Figure Timing Diagram
ADC-208AMM-QL replaces ADC-208MM-QL includes DATEL High-Reliability Screening. ADC-208ALM-QL replaces ADC-208LM-QL.
DS-0500C
01/03
DATEL, Inc. Cabot Boulevard, Mansfield, 02048-1151 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 Internet: www.datel.com Email: sales@datel.com
DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 DATEL S.A.R.L. Montigny Bretonneux, France Tel: 01-34-60-01-01 DATEL GmbH Germany Tel: 89-544334-0 DATEL Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025
DATEL makes representation that products circuits described herein, other technical information contained herein, will infringe upon existing future patent rights. descriptions contained herein imply granting licenses make, use, sell equipment constructed accordance therewith. Specifications subject change without notice. DATEL logo registered DATEL, Inc. trademark.
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