(256K Pseudo Static Wide voltage range: 2.70V-3.30V Access Time:

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

(256K Pseudo Static Wide voltage range: 2.70V-3.30V Access Time:

Datasheet Thumbnail

Top Searches for this datasheet

WCMC4016V7X CG6257AM
(256K Pseudo Static
Wide voltage range: 2.70V-3.30V Access Time: 70ns Ultra-low active power Typical active current: 2.0mA Typical active current: 13mA fmax Ultra standby power Automatic power-down when deselected CMOS optimum speed/power Offered Ball Package when deselected HIGH both HIGH). input/output pins (I/O0 through I/O15) placed high-impedance state when: deselected HIGH outputs disabled HIGH), both Byte High Enable Byte Enable disabled (BHE, HIGH), during write operation LOW). addresses must toggled once read started device. Writing device accomplished taking Chip Enables Write Enable (WE) input LOW. Byte Enable (BLE) LOW, then data from pins (I/O0 through I/O7), written into location specified address pins through A17). Byte High Enable (BHE) LOW, then data from pins (I/O8 through I/O15) written into location specified address pins through A17). Reading from device accomplished taking Chip Enables LOW) Output Enable (OE) while forcing Write Enable (WE) HIGH. Byte Enable (BLE) LOW, then data from memory location specified address pins will appear I/O0 I/O7. Byte High Enable (BHE) LOW, then data from memory will appear I/O8 I/O15. truth table back this datasheet complete description read write modes
Functional Description[1]
CG6257AM high-performance CMOS Pseudo static organized 256K words bits that supports asynchronous memory interface. This device features advanced circuit design provide ultra-low active current. This ideal providing More Battery Life® (MoBL) portable applications such cellular telephones. device into standby mode reducing power consumption more than device also into standby mode
Logic Block Diagram
DATA DRIVERS DECODER
256K Array
SENSE AMPS
I/O0 I/O7 I/O8 I/O15
COLUMN DECODER
Power- Down Circuit
Note: best-practice recommendations, please refer Cypress application note "System Design Guidelines" http://www.cypress.com.
Weida Semiconductor, Inc. 38-XXXXX
Revised August 2003
Configuration[2,
FBGA
View I/O8 I/O9 I/O14 I/O15 I/O10 I/O11
WCMC4016V7X CG6257AM
I/O1 I/O3 I/O4 I/O5
I/O0 I/O2 I/O6 I/O7
I/O12 I/O13
Note: pins have left floating. Ball ball FBGA package used upgrade density respectively. connect" connected internally die.
38-XXXXX
Page
Maximum Ratings
(Above which useful life impaired. user guidelines, tested.) Storage Temperature .-65°C 150°C Ambient Temperature with Power Applied. -55°C 125°C Supply Voltage Ground Potential. -0.4V 4.6V
WCMC4016V7X CG6257AM
Voltage Applied Outputs High State[5, .-0.4V 3.3V Input Voltage[5, 7].-0.4V 3.3V Output Current into Outputs (LOW). Static Discharge Voltage >2001V (per MIL-STD-883, Method 3015) Latch-Up Current .>200
Operating Range[9]
Device CG6257AM Range Industrial Ambient Temperature -25°C +85°C 2.70V 3.30V
Product Portfolio
Power Dissipation Product Min. CG6257AM 2.70 Range Typ.[8] Max. 3.30 Speed (ns) Typ.[8] Operating ICC(mA) 1MHz Max. fmax Typ.[8] Max. Standby ISB2(µA) Typ.[8] Max.
Notes: VIL(MIN) -0.5V pulse durations less than 20ns. VIH(Max) 0.5V pulse durations less than 20ns. Overshoot undershoot specifications characterized 100% tested. Typical values included reference only guaranteed tested. Typical values measured VCC(typ.), 25°C. must minimal operational levels before inputs turned
38-XXXXX
Page
Electrical Characteristics Over Operating Range
WCMC4016V7X CG6257AM
CG6257AM-70 Parameter Description Supplay Voltage Output HIGH Voltage -1.0 Output Voltage 2.0mA Input HIGH Voltage Input Voltage Input Leakage Current Output Leakage Current Operating Supply Current Automatic Power-Down Current CMOS Inputs VCC= 2.7V 3.3V VCC= 2.7V 3.3V(F VCC, Output Disabled fMAX 1/tRC VCCmax IOUT CMOS levels 2.70V 2.70V 0.8*Vcc -0.3 Test Conditions Min. +0.3V Typ.[8] Max. Unit
ISB1
3.3V VCC-0.2V VIN>VCC-0.2V, VIN<0.2V) fMAX (Address Data Only), (OE, BLE), VCC=3.30V 3.3V 0.2V 0.2V 0.2V, 3.30V
ISB2
Automatic Power-Down Current CMOS Inputs
Capacitance[10]
Parameter COUT Description Input Capacitance Output Capacitance Test Conditions 25°C, MHz, VCC(typ) Max. Unit
Thermal Resistance[10]
Description Thermal Resistance (Junction Ambient) Thermal Resistance (Junction Case)
Note: Tested initially after design process changes that affect these parameters.
Test Conditions Still Air, soldered inch, two-layer printed circuit board
Symbol
Unit °C/W °C/W
38-XXXXX
Page
Test Loads Waveforms
OUTPUT Rise Time V/ns
WCMC4016V7X CG6257AM
INPUT PULSES Fall Time V/ns
INCLUDING SCOPE
Equivalent
VENINEQUIVALENT OUTPUT Unit
Parameters
3.0V 1179 1941 1.87
38-XXXXX
Page
Switching Characteristics Over Operating Range[11]
WCMC4016V7X CG6257AM
Parameter READ CYCLE tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tDBE tLZBE tHZBE WRITE CYCLE tSCE tPWE tHZWE tLZWE
[13]
Description Read Cycle Time Address Data Valid Data Hold from Address Change Data Valid Data Valid HIGH High
[12,
Min.
Max.
Unit
HIGH High Z[12,
[12,
Z[12,
Data Valid Z[12, HIGH HIGH Address Skew Write Cycle Time Write Address Set-Up Write Address Hold from Write Address Set-Up Write Start Pulse Width Write Data Set-Up Write Data Hold from Write HIGH High-Z[12, Low-Z[12, Z[12,
Notes: Test conditions parameters other than tri-state parameters assume signal transition time 1ns/V, timing reference levels VCC(typ)/2, input pulse levels VCC(typ.), output loading specified IOL/IOH shown Test Loads Waveforms" section. tHZOE, tHZCE, tHZBE, tHZWE transitions measured when outputs enter high impedence state. internal Write time memory defined overlap VIL, and/or VIL. signals must ACTIVE initiate write these signals terminate write going INACTIVE. data input set-up hold timing should referenced edge signal that terminates write High-Z Low-Z parameters characterized 100% tested.
38-XXXXX
Page
Switching Waveforms
Read Cycle (Address Transition Controlled)[15, ADDRESS
WCMC4016V7X CG6257AM
tOHA
DATA VALID
DATA
PREVIOUS DATA VALID
Read Cycle Controlled) [15,
ADDRESS
tHZCE
tACE
BHE/BLE
tLZBE
tDBE
tHZBE tHZOE HIGH IMPEDANCE
DATA SUPPLY CURRENT
tLZOE HIGH IMPEDANCE tLZCE
tDOE DATA VALID
Note: HIGH Read Cycle. Addresses should toggled after start read cycle
38-XXXXX
Page
Switching Waveforms (continued)
Write Cycle Controlled) [13,
WCMC4016V7X CG6257AM
ADDRESS tSCE
tPWE
BHE/BLE
DATAI/O
DON'T CARE
VALID DATA tHZOE
Write Cycle Controlled)
[13,
ADDRESS tSCE tPWE
BHE/BLE
DATAI/O
DON'T CARE
VALID DATA tHZOE
Notes: Data high impedance VIH. Chip Enable goes INACTIVE with VIH, output remains high-impedance state. During DON'T CARE period DATA waveform, I/Os output state input signals should applied.
38-XXXXX
Page
Switching Waveforms (continued)
Write Cycle Controlled, LOW)
[18,
WCMC4016V7X CG6257AM
ADDRESS tSCE
BHE/BLE
tPWE
DATA
DON'T CARE
tLZWE
VALID DATA tHZWE
Write Cycle (BHE/BLE Controlled, LOW)
[18,
ADDRESS tSCE BHE/BLE
tPWE
DATA
DON'T CARE
VALID DATA
38-XXXXX
Page
Truth Table[20]
Inputs/Outputs High High Data (I/O0 I/O15) Data (I/O0 I/O7); High (I/O8 I/O15) High (I/O0 I/O7); Data (I/O8 I/O15) High High High Data (I/O0 I/O15) Data (I/O0 I/O7); High (I/O8 I/O15) High (I/O0 I/O7); Data (I/O8 I/O15)
WCMC4016V7X CG6257AM
Mode Deselect/Power-Down Deselect/Power-Down Read Read Read Output Disabled Output Disabled Output Disabled Write Write Write Power Standby (ISB) Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC)
Note: VIH, VIL, Don't Care
Ordering Information
Speed (ns) Ordering Code CG6257AM Package Name BA48K Package Type 48-ball Fine Pitch Operating Range Industrial
38-XXXXX
Page
Package
WCMC4016V7X CG6257AM
48-Ball FBGA BA48K
VIEW BOTTOM VIEW
CORNER
CORNER
0.75 8.00±0.10 8.00±0.10 5.25
2.625
0.53±0.05 6.00±0.10
1.875 0.75 3.75
0.25
0.21±0.05
0.15 0.15(4X)
6.00±0.10
REFERENCE JEDEC MO-207
SEATING PLANE 0.36 1.20
51-85193-*A
MoBL More Battery Life trademarks Cypress Semiconductor Corporation. product company names mentioned this document trademarks their respective holders
38-XXXXX
Page
Weida Semiconductor, Inc., 2002. information contained herein subject change without notice. Weida Semiconductor assumes responsibility circuitry other than circuitry embodied Weida Semiconductor product. does convey imply license under patent other rights. Weida Semiconductor does authorize products critical components life-support systems where malfunction failure reasonably expected result significant injury user. inclusion Weida Semiconductor products life-support systems application implies that manufacturer assumes risk such doing indemnifies Weida Semiconductor against charges.
WCMC4016V7X CG6257AM
Document Title: CG6257AM MoBL3® (256K Pseudo Static Document Number: 38-XXXXX REV. Issue Date 10/21/03 Orig. Change Description Change Datasheet; WCMC4016V7X Weida part.
38-XXXXX
Page

(256K Pseudo Static Wide voltage range: 2.70V-3.30V Access Time:

Top Searches for this datasheet

Other recent searches