GaAs Amplifier Description AMMC-5040 high gain broadband amplifie
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AMMC-5040
GaAs Amplifier
Description AMMC-5040 high gain broadband amplifier designed both military applications commercial communication systems. This four-stage amplifier input output matching circuitry environments. fabricated using PHEMT integrated circuit structures that provide exceptional broadband performance. backside this chip both ground. This simplifies assembly process reduces assembly related performance variations costs. improved reliability moisture protection, passivated active areas. This MMIC cost effective alternative hybrid (discrete-FET) amplifiers that require complex tuning assembly process. Features Frequency range: High gain: Gain flatness: ±1.5 Return loss: Input: Output: Output power: P-1dB P-3dB 22.5 Applications Broadband gain block Broadband driver amplifier Point-to-point radio LMDS Instrumentation Frequency Multiplier
Chip Size: Chip Size Tolerance: Chip Thickness: Dimensions:
1720 (67.7 29.9 mils) (±0.4 mils) mils) mils)
Absolute Maximum Ratings
Symbol
VD1,2-3-4 VG1,2-3-4 Tstg Tmax
Parameters/Conditions
Drain Voltage Gate Voltage Total Drain Current Input Power Operating Channel Temperature Operating Backside Temperature Storage Temperature Max. Assembly Temp max)
Units
Min.
Max.
-3.0
+160
+165 +300
Notes: Operation excess these conditions result permanent damage this device.
AMMC-5040 Specifications/Physical Properties[1]
Symbol
VD1,2-3-4 ID2-3-4 VG1,2-3-4 ch-b
Parameters Test Conditions
Drain Supply Operating Voltage First Stage Drain Supply Current (VDD -0.5 Total Drain Supply Current Stages (VDD VGG= -0.5 Gate Supply Operating Voltages (IDD Pinch-off Voltage (VDD Thermal Resistance[2] (Backside Temp. 25°C)
Units
°C/W
Min.
Typ.
-0.45 -1.5
Max.
Notes: Measured wafer form with Tchuck 25°C (except ch-bs.) Channel-to-backside Thermal Resistance ch-b) 58°C/W Tchannel (Tc) 150°C measured using liquid crystal method. Thermal Resistance backside temperature (Tb) 25°C calculated from measured data.
Specifications[3,4] (VDD 4.5V, Units Symbol
|S21|2 |S21| RLin RLout P-1dB P-3dB OIP3 |S12|2
Parameters Test Conditions
Small-signal Gain Small-signal Gain Flatness Input Return Loss Output Return Loss Output Power Gain Compression Output Power Gain Compression, Output Order Intercept Point, MHz, dBm, Isolation
Broadband Min. Typ.
±1.5 19.5
Narrow Band Typical Performance Typical
25.5 ±0.2 21.6 ±0.4 22.5 23.5 22.4 ±0.2 22.5 21.3 ±1.2 21.5
Notes: Data measured wafer form, Tchuck 25°C. 100% on-wafer test done frequency GHz, except noted.
AMMC-5040 Typical Performance (Tchuck 25°C)
RETURN LOSS (dB)
S11(dB) S22(dB)
GAIN (dB)
GAIN (dB)
3.5V 4.5V
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Gain, =4.5 =300
Figure Gain Drain Voltage, =300
GAIN (dB)
Figure Input Output Return Loss, =4.5V, =300
3.5V 4.5V
GAIN (dB)
150mA 200mA 250mA 300mA 350mA 400mA
3.5V 4.5V
INPUT RETURN LOSS (dB)
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Gain Drain Voltage, =350
Figure Gain Drain Voltage, =4.5V.
Figure Input Return Loss Drain Voltage, =350
AMMC-5040 Typical Performance (Tchuck 25°C)
3.5V 4.5V
OUTPUT RETURN LOSS (dB)
P1dB P3dB (dBm)
100mA 200mA 300mA 350mA
P1dB (dBm)
P-1dB P-3dB
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Output Return Loss Drain Voltage, =350
Figure Output Power (P-1dB) Drain Current, =4.5V.
Figure Output Power P-1dB P-3dB, =4.5V, =300
(dB)
(dBm)
3.5V 4.5V
P1dB (dBm)
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Noise Figure, =4.5V, =300
Figure Output Power (P-1dB) Drain Voltage, =300
Figure Output Order Intercept Point, =4.5V, =300
AMMC-5040 Performance Frequency Multiplier Applications
Typical Performance Frequency Multiplier, Input Power Optimized Conversion Gain
Input Frequency (GHz) Input Power (dBm) Output Frequency (GHz) Output Power (dBm) 18.2 18.9 20.5 20.8 20.0 19.6 18.0 16.0 11.7 10.7 11.3 11.7 Conversion Gain (dB) 12.2 12.9 14.0 14.3 12.4 12.1 10.5
Typical Performance Frequency Multiplier, Input Power Optimized Output Power
Input Frequency (GHz) Input Power (dBm) Output Frequency (GHz) Output Power (dBm) 20.2 20.9 22.0 22.2 20.8 20.6 19.0 Conversion Gain (dB) 10.2 10.9 12.0 12.7 11.3 11.1
Typical Performance Frequency Multiplier
Input Frequency (GHz) Input Power (dBm) 14.3 14.2 15.1 15.9 15.8 15.8 15.7 15.6 Output Frequency (GHz) Output Power (dBm) 19.6 20.6 20.0 18.6 16.0 14.7 12.9 10.0 Conversion Gain (dB) -1.0 -2.7 -5.5
Note: 25°C. Refer "Multiplier Biasing Operation" section bias conditions operation multiplier.
AMMC-5040 Typical Scattering Parameters[1] (Tchuck 25°C, 4.5V,
Freq.
2.045 3.045 4.045 5.045 6.045 7.045 8.045 9.045 10.045 11.045 12.045 13.045 14.045 15.045 16.045 17.045 18.045 19.045 20.045 21.045 22.045 23.045 24.045 25.045 26.045 27.045 28.045 29.045 30.045 31.045 32.045 33.045 34.045 35.045 36.045 37.045 38.045 39.045 40.045 41.045 42.045 43.045 44.045 45.045 46.045 47.045 48.045 49.045 50.000
-15.17 -15.12 -16.33 -15.91 -15.32 -15.04 -15.02 -15.06 -15.13 -15.19 -15.24 -15.31 -15.36 -15.47 -15.59 -15.74 -15.93 -16.31 -16.82 -17.28 -18.39 -19.92 -20.37 -20.61 -20.03 -18.87 -17.38 -17.55 -18.15 -18.91 -20.15 -21.06 -22.94 -24.74 -27.27 -24.62 -22.97 -22.55 -22.63 -24.00 -25.45 -27.06 -25.94 -22.48 -20.26 -15.70 -11.42 -7.83 -4.72
0.174 0.175 0.153 0.160 0.171 0.177 0.177 0.177 0.175 0.174 0.173 0.172 0.171 0.168 0.166 0.163 0.160 0.153 0.141 0.137 0.120 0.101 0.096 0.093 0.100 0.114 0.135 0.133 0.124 0.113 0.098 0.088 0.071 0.058 0.043 0.059 0.071 0.075 0.074 0.063 0.053 0.044 0.050 0.075 0.097 0.164 0.269 0.406 0.581
-103 -111 -120 -129 -138 -149 -156 -159 -160 -160 -160 -156 -168 -171 -139 -123 -112 -103 -106 -113 -124
-24.59 -12.70 -7.42 -23.80 -20.96 -22.62 -32.63 -37.54 -40.69 -34.93 -21.52 -12.30 -4.87 1.65 7.60 13.18 18.42 22.92 25.67 26.62 26.58 26.44 26.48 26.46 26.43 25.97 25.38 24.53 23.74 23.17 22.75 22.45 22.15 22.16 22.51 22.99 23.23 22.94 22.33 21.78 21.48 21.17 20.75 20.32 19.51 19.00 18.44 17.70 16.85
0.059 0.232 0.425 0.065 0.090 0.074 0.023 0.013 0.009 0.018 0.084 0.243 0.571 1.209 2.399 4.562 8.337 14.001 19.201 21.432 21.318 20.994 21.078 21.031 20.964 19.873 18.579 16.837 15.384 14.407 13.721 13.260 12.814 12.819 13.343 14.110 14.505 14.022 13.075 12.275 11.861 11.442 10.907 10.371 9.453 8.917 8.355 7.677 6.955
-146 -113 -154 -101 -153 -124 -148 -174 -107 -136 -166
0.00 -119.33 -79.88 -79.88 -80.00 -80.00 -80.00 -79.72 -70.46 -70.46 -68.05 -67.96 -63.04 -60.92 -60.05 -60.80 -59.94 -59.17 -58.42 -56.52 -56.43 -54.46 -54.90 -54.81 -55.44 -54.43 -56.89 -59.51 -66.02 -63.24 -62.96 -58.42 -62.23 -56.92 -54.15 -56.75 -54.49 -53.44 -51.15 -52.29 -51.10 -51.37 -51.37 -51.99 -49.59 -50.75 -53.08 -54.51 -54.43
0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.000 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.002 0.002 0.002 0.002 0.002 0.002 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.002 0.001 0.002 0.002 0.003 0.002 0.003 0.003 0.003 0.003 0.003 0.003 0.002 0.002 0.002
-156 -109 -127 -148 -139 -147
-0.77 -1.30 -2.55 -2.26 -2.66 -2.93 -2.91 -3.10 -3.31 -3.56 -3.79 -3.97 -4.27 -4.55 -4.80 -5.01 -5.25 -5.87 -7.80 -10.92 -13.81 -16.17 -18.24 -20.03 -20.25 -17.79 -15.30 -13.65 -12.32 -11.70 -11.40 -11.95 -12.75 -13.59 -13.86 -13.87 -14.15 -15.02 -15.50 -15.82 -14.49 -12.76 -11.21 -9.70 -8.14 -7.25 -6.43 -5.73 -5.20
0.915 0.861 0.746 0.771 0.736 0.714 0.715 0.700 0.683 0.664 0.647 0.633 0.612 0.592 0.575 0.562 0.546 0.509 0.407 0.284 0.204 0.155 0.122 0.100 0.097 0.129 0.172 0.208 0.242 0.260 0.269 0.253 0.231 0.209 0.203 0.203 0.196 0.177 0.168 0.162 0.189 0.230 0.275 0.327 0.392 0.434 0.477 0.517 0.550
-102 -112 -123 -135 -148 -162 -178 -113 -127 -144 -155 -163 -170
Note: Data obtained from on-wafer measurements.
AMMC-5040 Typical Scattering Parameters[1] (Tchuck 25°C, 4.5V,
Freq.
17.045 18.045 19.045 20.045 21.045 22.045 23.045 24.045 25.045 26.045 27.045 28.045 29.045 30.045 31.045 32.045 33.045 34.045 35.045 36.045 37.045 38.045 39.045 40.045 41.045 42.045 43.045 44.045 45.045 46.045 47.045 48.045 49.045 50.000
-15.90 -16.10 -16.50 -17.08 -17.41 -18.78 -20.82 -21.45 -21.92 -21.45 -20.21 -18.06 -17.86 -18.39 -19.04 -20.32 -21.10 -23.60 -25.31 -30.41 -27.92 -25.80 -24.94 -25.03 -26.05 -27.13 -29.59 -29.99 -26.40 -24.89 -18.50 -13.21 -9.10 -5.48
0.160 0.157 0.150 0.140 0.135 0.115 0.091 0.085 0.080 0.085 0.098 0.125 0.128 0.120 0.112 0.096 0.088 0.066 0.054 0.030 0.040 0.051 0.057 0.056 0.050 0.044 0.033 0.032 0.048 0.057 0.119 0.219 0.351 0.532
-111 -120 -129 -138 -149 -156 -159 -160 -160 -160 -156 -168 -171 -139 -123 -112 -103 -106 -113 -124
13.73 19.07 23.92 27.37 28.96 29.01 28.73 28.65 28.56 28.55 28.13 27.69 26.95 26.21 25.65 25.17 24.88 24.53 24.49 24.81 25.38 25.75 25.56 25.03 24.59 24.45 24.29 24.07 23.89 23.32 23.14 22.81 22.15 21.30
4.857 8.981 15.696 23.362 28.054 28.221 27.316 27.069 26.789 26.759 25.497 24.224 22.266 20.450 19.164 18.142 17.541 16.846 16.767 17.394 18.567 19.376 18.956 17.850 16.970 16.696 16.386 15.984 15.652 14.648 14.361 13.814 12.804 11.608
-101 -153 -124 -148 -174 -107 -136 -166
-61.03 -59.90 -59.17 -59.17 -57.08 -56.48 -54.47 -54.94 -54.94 -55.35 -54.46 -57.03 -58.31 -67.65 -63.27 -63.18 -59.22 -62.19 -57.76 -54.43 -57.60 -55.00 -54.00 -51.42 -52.75 -51.37 -51.37 -51.39 -52.38 -49.39 -50.47 -52.77 -53.15 -55.92
0.001 0.001 0.001 0.001 0.001 0.002 0.002 0.002 0.002 0.002 0.002 0.001 0.001 0.000 0.001 0.001 0.001 0.001 0.001 0.002 0.001 0.002 0.002 0.003 0.002 0.003 0.003 0.003 0.002 0.003 0.003 0.002 0.002 0.002
-4.89 -4.99 -5.06 -6.08 -8.51 -11.29 -13.84 -16.02 -18.15 -19.22 -17.68 -15.15 -13.32 -11.78 -11.03 -10.68 -11.06 -11.85 -12.74 -13.14 -13.17 -13.64 -14.93 -15.86 -16.32 -14.81 -13.01 -11.47 -9.86 -7.99 -7.07 -6.17 -5.41 -4.88
0.569 0.565 0.558 0.496 0.375 0.273 0.203 0.158 0.124 0.109 0.131 0.175 0.216 0.258 0.281 0.293 0.280 0.256 0.231 0.220 0.220 0.208 0.179 0.161 0.153 0.182 0.224 0.267 0.322 0.398 0.443 0.492 0.537 0.570
-113 -127 -144 -155 -163 -170
Note: Data obtained from on-wafer measurements.
Biasing Operation recommended bias condition AMMC5040 with four drains connected single 4.5V supply four gates connected adjustable negative voltage supply shown Figure gate voltage adjusted total drain supply current typically Figures 1-12 used help estimate minimum drain voltage current necessary given gain output power. shown Figure second, third, fourth stage drain bias lines connected internally therefore require only single bond wire. additional bond wire needed first stage drain bias, Vd1. Only third fourth stage gate bias lines connected internally. total three gate bond wires required: Vg1, Vg2, Vg3/Vg4 connection. internal matching circuitry input creates 50-ohm path ground. blocking capacitor should used input. voltage applied input must maintained below output coupled. ground bond wires needed since ground connection made means plated through holes backside chip. Frequency Multiplier Biasing Operation AMMC-5040 also used frequency doubler, tripler quadrupler. frequency doubler, AMMC-5040 provides conversion gain input signals 10-23 frequency range output frequencies 20-46 GHz. Similarly, signals quadrupled 20-40 with some conversion loss. Optimum conversion efficiency doubler obtained with input power level dBm. frequency tripler, input power level 14-16 recommended. Frequency multiplication achieved reducing bias first stage efficiently generate harmonics. remaining three stages then used provide amplification.
While many bias schemes used generate amplify desired harmonics within AMMC5040, following information suggested starting point multiplier applications. Frequency doubling quadrupling (generation even harmonics) accomplished biasing first stage pinch-off setting -1.1 volts. remaining three stages biased normal amplification, e.g., adjusted such that drain voltage, Vdd, four stages should volts. assembly diagram shown Figure used guideline. operate AMMC-5040 frequency tripler (odd harmonic), device biased shown Figure drain voltage first stage biased separately with reduced volts. drain voltage remaining three stages, Vd2, Vd3, Vd4, should volts. four gate voltages, Vgg, approximately -0.6 volts. desired, adjusted minimize second harmonics. Improved multiplier performance obtained biasing both gate drain voltages first stage separately from stages 2-4. cases, assure stability. Assembly Techniques chip should attached directly ground plane using either fluxless AuSn solder preform electrically conductive epoxy[1]. conductive epoxy, amount should just enough provide thin fillet around bottom perimeter die. ground plane should free residue that jeopardize electrical mechanical attachment. Caution should taken exceed Absolute Maximum Rating assembly temperature time. Thermosonic wedge bonding preferred method wire attachment bond pads. connections should kept short possible minimize inductance. Gold mesh[2] double-bonding with gold wire recommended.
Mesh attached using round tracking tool tool force approximately grams with ultrasonic power roughly duration guided wedge ultrasonic power level used wire. recommended wire bond stage temperature 2°C. chip thick should handled with care. This MMIC exposed bridges surface. Handle edges with custom collet pick with vacuum center.)
This MMIC also static sensitive handling precautions should taken. more information, Avago Application Note "GaAs MMIC ESD, Attach Bonding Guidelines." Notes: Ablebond 84-1 silver epoxy recommended. Buckbee-Mears Corporation, Paul, 800-2623824
Matching Matching Matching Matching
Matching
Figure AMMC-5040 Simplified Schematic Diagram.
1174.5 54.0 426.5
80.5
80.5
278.5
1342
Figure AMMC-5040 Bonding Locations (dimensions microns).
Figure AMMC-5040 assembly normal amplifier applications with single drain single gate supply connections.
Figure Separate first-stage gate bias using AMMC-5040 frequency doubler quadrupler. This diagram also shows option jumper bonding scheme used Figure
301.5
1720
Figure Separate first-stage gate drain bias using AMMC-5040 frequency tripler.
Ordering Information AMMC-5040-W10 devices tray AMMC-5040-W50 devices tray
product information complete list distributors, please site:
www.avagotech.com
Avago, Avago Technologies, logo trademarks Avago Technologies, Limited United States other countries. Data subject change. Copyright 2006 Avago Technologies, Limited. rights reserved. Obsoletes 5989-3215EN 5989-4041EN 2006
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