Amplifier Avago Technologies' AMMC-5618 6-20 MMIC efficient two-s

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Amplifier Avago Technologies' AMMC-5618 6-20 MMIC efficient two-s

Datasheet Thumbnail

Top Searches for this datasheet

AMMC 5618
Amplifier
Avago Technologies' AMMC-5618 6-20 MMIC efficient two-stage amplifier designed used cascadable intermediate gain block applications. communication systems, used buffer, transmit driver amplifier. fabricated using PHEMT integrated circuit structure that provides exceptional efficiency flat gain performance. During typical operation with single supply, each gain stage biased Class-A operation optimal power output with minimal distortion. input output have matching circuitry 50-W environments. backside chip both ground. This helps simplify assembly process reduces assembly related performance variations costs. improved reliability moisture protection, passivated active areas. MMIC cost effective alternative hybrid (discrete FET) amplifiers that require complex tuning assembly processes. AMMC-5618 Absolute Maximum Ratings Symbol Parameters/ Conditions Units Min. Max. VD1, Drain Supply Voltage Tstg Tmax Optional Gate Voltage Optional Gate Voltage Drain Supply Current Drain Supply Current Input Power Channel Temp. Operating Backside Temp. Storage Temp. Maximum Assembly Temp. max) +165 +300 +150
Chip Size: (36.2 36.2 mils) Chip Size Tolerance: 10µm (±0.4 mils) Chip Thickness: 10µm mils) Dimensions: (3.1 mils larger)
Features
Frequency Range: High Gain: 14.5 Typical Output Power: 19.5 Typical Input Output Return Loss: Flat Gain Response: Typical Single Supply Bias:
Applications
Driver/Buffer microwave communication systems Cascadable gain stage systems Phased array radar transmit amplifiers
Note: Operation excess these conditions result permanent damage this device.
Note: These devices sensitive. following precautions strongly recommended: Ensure that approved carrier used when dice transported from destination another. Personal grounding worn times when handling these devices.
AMMC-5618 Specifications Physical Properties Symbol VD1,VD2 ch-b Parameters Test Conditions Recommended Drain Supply Voltage First stage Drain Supply Current Open Ground) Second stage Drain Supply Current Open Ground) Total Drain Supply Current (VG1 Open Ground, VD1= Thermal Resistance (Backside temperature (Tb) 25°C Unit °C/W Min. Typical Max.
Notes: Backside temperature 25°C unless otherwise noted Channel-to-backside Thermal Resistance (ch-b) 32°C/W Tchannel (Tc) 150°C measured using infrared microscopy. Thermal Resistance backside temperature (Tb) 25°C calculated from measured data.
AMMC-5618 Specifications 25°C, VDD= Symbol |S21|2 D|S21| RLin RLout |S12| Psat OIP3 DS21
Parameters Test Conditions Small-signal Gain Small-signal Gain Flatness Input Return Loss Output Return Loss Isolation Output Power Gain Compression Saturated Output Power (3dB Gain Compression) Output Order Intercept Point Temperature Coefficient Gain Noise Figure
Unit dB/°C
Min. 12.5 17.5
Typical Max. 14.5 19.5 20.5 -0.023
P-1dB
Notes: 100% on-wafer test done frequency GHz, except noted. Temperature Coefficient Gain based sample test
AMMC-5618 Typical Performance (Tchuck=25°C, VDD=5V, Zo=50)
ISOLATION (dB) GAIN (dB) INPUT (dB)
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Gain
Figure Isolation
Figure Input Return Loss
OUTPUT (dB) (dB)
P1dB (dBm)
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Output Return Loss
Figure Noise Figure
Figure output Power Gain Compression
AMMC-5618 Typical Performance Supply Voltage (Tb=25°C, Zo=50)
ISOLATION (dB) GAIN (dB)
Vdd=4V Vdd=5V Vdd=6V
Vdd=4V Vdd=5V Vdd=6V
INPUT (dB)
Vdd=4V Vdd=5V Vdd=6V
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Gain Voltage
Figure Isolation Voltage
Figure Input Return Loss Voltage
AMMC-5618 Typical Performance Supply Voltage (cont.) (Tb=25°C, Zo=50)
OUTPUT (dB) P1dB (dBm)
Vdd=4V Vdd=5V Vdd=6V
Vdd=4V Vdd=5V Vdd=6V
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Output Return Loss Voltage
Figure Output Power Voltage
AMMC-5618 Typical Performance Temperature (VDD=5V, Zo=50)
ISOLATION (dB) GAIN (dB)
INPUT (dB)
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Gain Temperature
Figure Isolation Temperature
Figure Input Return Loss Temperature
NOISE FIGURE (dB) P1dB (dBm)
OUTPUT (dB)
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure Output Return Loss Temperature
Figure Noise Figure Temperature
Figure Output Power Temperature
AMMC-5618 Typical Scattering Parameters[1] (Tb=25°C, VDD=
Freq 2.00 2.50 3.00 3.50 4.00 4.50 5.00 5.50 6.00 6.50 7.00 7.50 8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00 12.50 13.00 13.50 14.00 14.50 15.00 15.50 16.00 16.50 17.00 17.50 18.00 18.50 19.00 19.50 20.00 20.50 21.00 21.50 22.00 -2.4 -2.9 -3.2 -3.6 -4.0 -4.9 -7.3 -12.7 -19.8 -23.6 -24.7 -26.4 -28.2 -26.3 -22.8 -19.9 -17.7 -16.1 -14.8 -13.9 -13.2 -12.6 -12.2 -11.9 -11.6 -11.5 -11.4 -11.4 -11.5 -11.7 -11.9 -12.2 -12.4 -12.4 -12.2 -11.5 -10.5 -9.2 -7.9 -6.7 -5.7 0.76 0.72 0.69 0.66 0.63 0.57 0.43 0.23 0.07 0.06 0.05 0.04 0.05 0.07 0.13 0.16 0.18 0.22 0.23 0.25 0.26 0.26 0.27 0.27 0.27 0.27 0.26 0.25 0.25 0.24 0.24 0.25 0.27 0.35 0.46 0.52 Phase -125 -147 -166 -100 -110 -120 -128 -136 -143 -151 -159 -166 -174 -52.0 -35.4 -19.0 -7.4 12.5 14.7 15.1 15.1 15.0 15.0 14.9 14.9 14.9 14.8 14.8 14.7 14.7 14.7 14.6 14.6 14.6 14.6 14.7 14.7 14.7 14.8 14.9 14.9 15.0 15.1 15.1 15.2 15.2 15.2 15.0 14.8 14.5 14.1 13.5 0.02 0.11 0.43 1.09 2.43 5.41 5.69 5.69 5.64 5.61 5.59 5.57 5.55 5.52 5.49 5.45 5.43 5.41 5.38 5.37 5.37 5.38 5.42 5.46 5.49 5.54 5.58 5.63 5.66 5.71 5.75 5.75 5.73 5.65 5.51 5.31 5.05 4.72 Phase -119 -102 -120 -147 -101 -113 -124 -134 -145 -155 -166 -176 -80.0 -74.0 -69.1 -59.1 -57.7 -51.8 -48.8 -45.7 -44.5 -44.6 -44.3 -44.0 -43.9 -43.6 -43.3 -43.2 -43.1 -42.9 -42.8 -42.5 -42.5 -42.3 -42.1 -41.9 -41.7 -41.6 -41.4 -41.3 -41.1 -40.8 -40.8 -40.8 -40.5 -40.4 -40.3 -40.1 -39.9 -39.9 -40.0 -39.8 -40.3 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 Phase -134 -104 -113 -142 -170 -0.4 -0.9 -1.6 -2.6 -3.8 -5.3 -6.9 -8.6 -10.1 -11.3 -12.6 -13.9 -15.3 -16.7 -18.2 -19.7 -21.4 -22.8 -24.3 -25.1 -25.1 -24.5 -23.3 -22.2 -21.3 -20.7 -19.8 -19.1 -18.4 -17.7 -17.2 -16.7 -16.2 -15.8 -15.4 -14.9 -14.6 -14.0 -13.8 -13.5 -13.1 0.95 0.91 0.84 0.75 0.64 0.55 0.45 0.37 0.31 0.27 0.23 0.17 0.15 0.12 0.09 0.07 0.06 0.06 0.06 0.06 0.07 0.08 0.09 0.09 0.11 0.12 0.13 0.14 0.15 0.16 0.16 0.17 0.18 0.19 0.21 0.22 Phase -118 -138 -156 -173 -105 -113 -121 -126 -132 -138 -143 -148 -154 -158 -163 -166 -172 -176
Note: Data obtained from on-wafer measurements
Biasing Operation
AMMC-5618 normally biased with single positive drain supply connected both bond pads shown Figure 19(a). recommended supply voltage ground wires required because ground connections made with plated through-holes backside device. Gate bias pads (VG1 VG2) also provided allow adjustments gain, output power, power dissipation, necessary. connection gate needed single drain-bias operation. However, custom applications, current flowing through input and/or output gain stage adjusted applying voltage gate bias pad(s) shown Figure 19(b). negative gate-pad voltage will decrease drain current. gate-pad voltage approximately zero volt during operation with gate supply. Refer Absolute Maximum Ratings table allowed thermal conditions.
Assembly Techniques
backside AMMC-5618 chip ground. microstripline applications, chip should attached directly ground plane (e.g., circuit carrier heatsink) using electrically conductive epoxy[1]. best performance, topside MMIC should brought same height circuit surrounding This accomplished mounting gold plated metal shim (same length width MMIC) under chip, which correct thickness make chip adjacent circuit coplanar. amount epoxy used chip shim attachment should just enough provide thin fillet around bottom perimeter chip shim. ground plane should free residue that jeopardize electrical mechanical attachment. location bond pads shown Figure Note that input output ports Ground-Signal-Ground configuration. connections should kept short reasonable minimize performance degradation undesirable series inductance. single bond wire sufficient signal connections, however double-bonding with gold wire gold mesh[2] recommended best performance, especially near high frequency range. Thermosonic wedge bonding preferred method wire attachment bond pads. Gold mesh attached using round tracking tool tool force approximately grams with ultrasonic power roughly 55dB duration guided wedge ultrasonic power level used wire. recommended wire bond stage temperature Caution should taken exceed Absolute Maximum Rating assembly temperature time. chip thick should handled with care. This MMIC exposed bridges surface should handled edges with custom collet pick with vacuum center.) This MMIC also static sensitive handling precautions should taken.
Notes: Ablebond 84-1 silver epoxy recommended. Buckbee-Mears Corporation, Paul, 800-262-3824
Feedback Network Matching Matching Matching
Output
Input
Figure AMMC 5618 Schematic
power supply chip capacitor
power supply chip capacitor
gold plated shim
gold plated shim
Input
Output
Input
Output
Bonding island small chip-capacitor
power supply
power supply
Figure AMMC 5618 Assembly Diagram
Figure AMMC 5618 Bond locations (dimensions microns)
Ordering Information: AMMC-5618-W10 devices tray AMMC-5618-W50 devices tray
product information complete list distributors, please site: www.avagotech.com Avago, Avago Technologies, logo trademarks Avago Technologies, Pte. United States other countries. Data subject change. Copyright 2006 Avago Technologies Pte. rights reserved. 5989-3927EN April 2006

Amplifier Avago Technologies' AMMC-5618 6-20 MMIC efficient two-s

Top Searches for this datasheet

Other recent searches