Data Sheet June 2006 FN3393.8 Dual 125MHz Video Current Feedback

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Data Sheet June 2006 FN3393.8 Dual 125MHz Video Current Feedback

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HA5023
Data Sheet June 2006 FN3393.8
Dual 125MHz Video Current Feedback Amplifier
HA5023 wide bandwidth high slew rate dual amplifier optimized video applications gains between current feedback amplifier thus yields less bandwidth degradation high closed loop gains than voltage feedback amplifiers. differential gain phase, 0.1dB gain flatness, ability drive back terminated cables, make this amplifier ideal demanding video applications. current feedback design allows user take advantage amplifier's bandwidth dependency feedback resistor. reducing bandwidth increased compensate decreases higher closed loop gains heavy output loads. performance HA5023 very similar popular Intersil HA-5020.
Features
Wide Unity Gain Bandwidth 125MHz Slew Rate. 475V/µs Input Offset Voltage 800µV Differential Gain 0.03% Differential Phase 0.03° Supply Current (per Amplifier) 7.5mA Protection. 4000V Guaranteed Specifications Supplies Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Video Gain Block Video Distribution Amplifier/RGB Amplifier Flash Driver
Ordering Information
PART NUMBER HA5023IP HA5023IPZ (Note) HA5023IB HA5023IB96 HA5023IBZ (Note) PART TEMP. MARKING RANGE (°C) HA5023IP HA5023IPZ 5023I 5023I 5023IBZ PACKAGE PDIP PDIP* (Pb-free) SOIC PKG. DWG. E8.3 E8.3 M8.15
Current Voltage Converter Medical Imaging Radar Imaging Systems Video Switching Routing
Pinout
HA5023 (PDIP, SOIC) VIEW
OUT1 -IN1 +IN1 OUT2 -IN2 +IN2
SOIC M8.15 Tape Reel SOIC (Pb-free) M8.15
HA5023IBZ96 5023IBZ (Note) HA5023EVAL
M8.15 SOIC Tape Reel (Pb-free)
High Speed Evaluation Board
*Pb-free PDIPs used through hole wave solder processing only. They intended Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pb-free peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020.
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 1998, 2005-2006. Rights Reserved other trademarks mentioned property their respective owners.
HA5023
Absolute Maximum Ratings
Voltage Between Terminals. .36V Input Voltage (Note ±VSUPPLY Differential Input Voltage .10V Output Current (Note Short Circuit Protected Rating (Note Human Body Model (Per MIL-STD-883 Method 3015.7). 2000V Operating Conditions Temperature Range .-40°C 85°C Supply Voltage Range (Typical). ±4.5V ±15V
Thermal Information
Thermal Resistance (Typical, Note
(°C/W)
PDIP Package* SOIC Package Maximum Junction Temperature (Note 175°C Maximum Junction Temperature (Plastic Package, Note 150°C Maximum Storage Temperature Range -65°C 150°C Maximum Lead Temperature (Soldering 10s) 300°C (SOIC Lead Tips Only) *Pb-free PDIPs used through hole wave solder processing only. They intended Reflow solder processing applications.
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: Maximum power dissipation, including output load, must designed maintain junction temperature below 175°C die, below 150°C plastic packages. Application Information section safe operating area information. measured with component mounted evaluation board free air. non-inverting input unused amplifiers must connected GND. Output protected short circuits ground. Brief short circuits ground will degrade reliability, however, continuous (100% duty cycle) output current should exceed 15mA maximum reliability.
Electrical Specifications
VSUPPLY ±5V, 400, 10pF, Unless Otherwise Specified (NOTE TEST LEVEL TEMP. (°C)
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (VIO)
TEST CONDITIONS
UNITS
Full Full Full Full Full Full Full Full Full
±2.5
0.15
µV/°C µA/V µA/V µA/V µA/V
Delta Between Channels Average Input Offset Voltage Drift Common Mode Rejection Ratio Note
Power Supply Rejection Ratio
±3.5V ±6.5V
Input Common Mode Range Non-Inverting Input (+IN) Current
Note
Common Mode Rejection (+IBCMR +RIN Power Supply Rejection
Note
±3.5V ±6.5V
Inverting Input (-IN) Current
Delta BIAS Current Between Channels
FN3393.8 June 2006
HA5023
Electrical Specifications
VSUPPLY ±5V, 400, 10pF, Unless Otherwise Specified (Continued) (NOTE TEST LEVEL Power Supply Rejection ±3.5V ±6.5V Input Noise Voltage +Input Noise Current -Input Noise Current TRANSFER CHARACTERISTICS Transimpedence Note Open Loop Voltage Gain 400, VOUT ±2.5V Open Loop Voltage Gain 100, VOUT ±2.5V OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Current, Short Circuit POWER SUPPLY CHARACTERISTICS Supply Voltage Range Quiescent Supply Current CHARACTERISTICS Slew Rate Full Power Bandwidth Rise Time Fall Time Propagation Delay Overshoot -3dB Bandwidth Settling Time Settling Time 0.25% VOUT 100mV Output Step Output Step Note Note Note Note Note V/µs Full mA/Op ±2.5V, VOUT Full Full Full ±2.5 ±2.5 ±16.6 ±3.0 ±3.0 ±20.0 Full Full Full 0.85 1kHz 1kHz 1kHz TEMP. (°C) Full Full
PARAMETER Common Mode Rejection
TEST CONDITIONS Note
25.0
UNITS µA/V µA/V µA/V µA/V nV/Hz pA/Hz pA/Hz
FN3393.8 June 2006
HA5023
Electrical Specifications
VSUPPLY ±5V, 400, 10pF, Unless Otherwise Specified (Continued) (NOTE TEST LEVEL TEMP. (°C)
PARAMETER CHARACTERISTICS 681) Slew Rate Full Power Bandwidth Rise Time Fall Time Propagation Delay Overshoot -3dB Bandwidth Settling Time Settling Time 0.25% Gain Flatness
TEST CONDITIONS
UNITS
Note Note Note Note Note
0.02 0.07
V/µs
VOUT 100mV Output Step Output Step 5MHz 20MHz
CHARACTERISTICS +10, 383) Slew Rate Full Power Bandwidth Rise Time Fall Time Propagation Delay Overshoot -3dB Bandwidth Settling Time Settling Time 0.1% VIDEO CHARACTERISTICS Differential Gain (Note Differential Phase (Note NOTES: ±2.5V. -40°C Product tested ±2.25V because Short Test Duration does allow self heating. VOUT switches from +2V, from -2V. Specification from points. Slew Rate FPBW PEAK PEAK 100, VOUT Measured from points rise/fall times; from points input output propagation delay. Production Tested; Typical Guaranteed Limit based characterization; Design Typical information only. Measured with VM700A video tester using NTC-7 composite VITS. VOUT ±2.5V. -40°C Product tested VOUT ±2.25V because Short Test Duration does allow self heating. 0.03 0.03 VOUT 100mV Output Step Output Step Note Note Note Note Note V/µs
FN3393.8 June 2006
HA5023 Test Circuits Waveforms
HP4195 NETWORK ANALYZER
FIGURE TEST CIRCUIT TRANSIMPEDANCE MEASUREMENTS
(NOTE VOUT
(NOTE
VOUT
FIGURE SMALL SIGNAL PULSE RESPONSE CIRCUIT NOTE:
FIGURE LARGE SIGNAL PULSE RESPONSE CIRCUIT
series input resistor recommended limit input currents case input signals present before HA5023 powered
Vertical Scale: 100mV/Div., VOUT 100mV/Div. Horizontal Scale: 20ns/Div. FIGURE SMALL SIGNAL RESPONSE
Vertical Scale: 1V/Div., VOUT 1V/Div. Horizontal Scale: 50ns/Div. FIGURE LARGE SIGNAL RESPONSE
FN3393.8 June 2006
Schematic Diagram
(One Amplifier Two)
2.5K
QP11
QP14
QP19
QP10 QN12
QP16 QP20
QN10 VR33 QN11
FN3393.8 June 2006
QP15 1.4pF
QP12 QN13 QP13
QP17 QN17
HA5023
1.4pF
QN15
QN21 QN19
QN14
QN16
QN18
HA5023 Application Information
Optimum Feedback Resistor
plots inverting non-inverting frequency response, Figure Figure typical performance section, illustrate performance HA5023 various closed loop gain configurations. Although bandwidth dependency closed loop gain isn't severe that voltage feedback amplifier, there appreciable decrease bandwidth higher gains. This decrease minimized taking advantage current feedback amplifier's unique relationship between bandwidth current feedback amplifiers require feedback resistor, even unity gain applications, conjunction with internal compensation capacitor, sets dominant pole frequency response. Thus, amplifier's bandwidth inversely proportional HA5023 design optimized 1000 gain Decreasing unity gain application decreases stability, resulting excessive peaking overshoot. higher gains amplifier more stable, decreased tradeoff stability bandwidth. table below lists recommended values various gains, expected bandwidth.
GAIN (ACL) BANDWIDTH (MHz)
traces connected -IN, that connections kept short possible minimize capacitance from this node ground.
Driving Capacitive Loads
Capacitive loads will degrade amplifier's phase margin resulting frequency response peaking possible oscillations. most cases oscillation avoided placing isolation resistor series with output shown Figure
VOUT
FIGURE PLACEMENT OUTPUT ISOLATION RESISTOR,
selection criteria isolation resistor highly dependent load, been determined good starting value.
Power Dissipation Considerations
1000 1000
high supply current inherent dual amplifiers, care must taken insure that maximum junction temperature Absolute Maximum Ratings) exceeded. Figure shows maximum ambient temperature versus supply voltage available package styles (Plastic DIP, SOIC). ±5VDC quiescent operation both package styles operated over full industrial range -40°C 85°C. recommended that thermal calculations, which take into account output power, performed designer.
AMBIENT TEMPERATURE (°C) SOIC PDIP
Board Layout
frequency response this amplifier depends greatly amount care taken designing board. inductance components such chip resistors chip capacitors strongly recommended. leaded components used leads must kept short especially power supply decoupling components those components connected inverting input. Attention must given decoupling power supplies. large value (10µF) tantalum electrolytic capacitor parallel with small value (0.1µF) chip capacitor works well most cases. ground plane strongly recommended control noise. Care must also taken minimize capacitance ground seen amplifier's inverting input (-IN). larger this capacitance, worse gain peaking, resulting pulse overshoot possible instability. recommended that ground plane removed under
SUPPLY VOLTAGE (±V)
FIGURE MAXIMUM OPERATING AMBIENT TEMPERATURE SUPPLY VOLTAGE
FN3393.8 June 2006
HA5023 Typical Performance Curves
NORMALIZED GAIN (dB) FREQUENCY (MHz) FREQUENCY (MHz) VOUT 0.2VP-P 10pF NORMALIZED GAIN (dB)
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified
VOUT 0.2VP-P 10pF
FIGURE NON-INVERTING FREQENCY RESPONSE
FIGURE INVERTING FREQUENCY RESPONSE
-3dB BANDWIDTH (MHz)
VOUT 0.2VP-P 10pF
NONINVERTING PHASE -135 -100 -225 -270 -315 -360 VOUT 0.2VP-P 10pF +10,
INVERTING PHASE
-10,
-135 -180
GAIN PEAKING 1100 1300 FEEDBACK RESISTOR 1500
FREQUENCY (MHz)
FIGURE PHASE RESPONSE FUNCTION FREQUENCY
-3dB BANDWIDTH (MHz) VOUT 0.2VP-P 10pF -3dB BANDWIDTH GAIN PEAKING (dB)
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
-3dB BANDWIDTH (MHz)
-3dB BANDWIDTH GAIN PEAKING (dB)
GAIN PEAKING
GAIN PEAKING
1100
VOUT 0.2VP-P 10pF
1000
FEEDBACK RESISTOR
LOAD RESISTOR
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
FIGURE BANDWIDTH GAIN PEAKING LOAD RESISTANCE
FN3393.8 June 2006
GAIN PEAKING (dB)
-3dB BANDWIDTH
HA5023 Typical Performance Curves
VOUT 0.2VP-P 10pF OVERSHOOT
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
VOUT 0.1VP-P 10pF VSUPPLY ±5V,
-3dB BANDWIDTH (MHz)
VSUPPLY ±15V, VSUPPLY ±5V, VSUPPLY ±15V,
FEEDBACK RESISTOR
LOAD RESISTANCE 1000
FIGURE BANDWIDTH FEEDBACK RESISTANCE
FIGURE SMALL SIGNAL OVERSHOOT LOAD RESISTANCE
0.10 FREQUENCY 3.58MHz DIFFERENTIAL GAIN DIFFERENTIAL PHASE 0.08
0.08 FREQUENCY 3.58MHz
0.06
0.06 0.04
0.04
0.02 0.00
0.02 0.00 SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
FIGURE DIFFERENTIAL GAIN SUPPLY VOLTAGE
FIGURE DIFFERENTIAL PHASE SUPPLY VOLTAGE
VOUT 2.0VP-P 30pF ORDER FREQUENCY (MHz) REJECTION RATIO (dB) DISTORTION (dBc) 0.001
CMRR
NEGATIVE PSRR POSITIVE PSRR 0.01 FREQUENCY (MHz)
FIGURE DISTORTION FREQUENCY
FIGURE REJECTION RATIOS FREQUENCY
FN3393.8 June 2006
HA5023 Typical Performance Curves
VOUT 1.0VP-P
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
RLOAD VOUT 1.0VP-P PROPAGATION DELAY (ns) +10,
PROPAGATION DELAY (ns)
TEMPERATURE
SUPPLY VOLTAGE (±V)
FIGURE PROPAGATION DELAY TEMPERATURE
FIGURE PROPAGATION DELAY SUPPLY VOLTAGE
VOUT 2VP-P SLEW RATE (V/µs) TEMPERATURE (°C) SLEW RATE SLEW RATE NORMALIZED GAIN (dB)
-0.2 -0.4 -0.6 -0.8 -1.0 -1.2 FREQUENCY (MHz) +10, VOUT 0.2VP-P 10pF
FIGURE FIGURE SLEW RATE TEMPERATURE
FIGURE NON-INVERTING GAIN FLATNESS FREQUENCY
NORMALIZED GAIN (dB) -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 FREQUENCY (MHz) VOUT 0.2VP-P 10pF
+10, VOLTAGE NOISE (nV/Hz) -INPUT NOISE CURRENT
1000
+INPUT NOISE CURRENT INPUT NOISE VOLTAGE
0.01
FREQUENCY (kHz)
FIGURE INVERTING GAIN FLATNESS FREQUENCY
FIGURE INPUT NOISE CHARACTERISTICS
FN3393.8 June 2006
CURRENT NOISE (pA/Hz)
HA5023 Typical Performance Curves
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
(mV)
BIAS CURRENT (µA)
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE INPUT OFFSET VOLTAGE TEMPERATURE
FIGURE +INPUT BIAS CURRENT TEMPERATURE
4000
TRANSIMPEDANCE
BIAS CURRENT (µA)
3000
2000
1000
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE -INPUT BIAS CURRENT TEMPERATURE
FIGURE TRANSIMPEDANCE TEMPERATURE
REJECTION RATIO (dB) 125°C +PSRR
55°C
-100 CMRR -PSRR
(mA)
25°C
SUPPLY VOLTAGE (±V)
TEMPERATURE (°C)
FIGURE SUPPLY CURRENT SUPPLY VOLTAGE
FIGURE REJECTION RATIO TEMPERATURE
FN3393.8 June 2006
HA5023 Typical Performance Curves
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
SUPPLY CURRENT (mA)
OUTPUT SWING
+10V
+15V
DISABLE INPUT VOLTAGE
TEMPERATURE (°C)
FIGURE SUPPLY CURRENT DISABLE INPUT VOLTAGE
FIGURE OUTPUT SWING TEMPERATURE
±15V VOUT (VP-P) (mV) 10.00
±10V
±4.5V 0.01 0.10 1.00 LOAD RESISTANCE TEMPERATURE (°C)
FIGURE OUTPUT SWING LOAD RESISTANCE
FIGURE INPUT OFFSET VOLTAGE CHANGE BETWEEN CHANNELS TEMPERATURE
VOUT 2VP-P
BIAS CURRENT (µA)
SEPARATION (dB)
TEMPERATURE (°C) FREQUENCY (MHz)
FIGURE INPUT BIAS CURRENT CHANGE BETWEEN CHANNELS TEMPERATURE
FIGURE CHANNEL SEPARATION FREQUENCY
FN3393.8 June 2006
HA5023 Typical Performance Curves
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
FEEDTHROUGH (dB)
DISABLE 5VP-P
TRANSIMPEDANCE
0.01 0.001 PHASE ANGLE
FREQUENCY (MHz)
0.001
0.01
FREQUENCY (MHz)
-135
FIGURE DISABLE FEEDTHROUGH FREQUENCY
FIGURE TRANSIMPEDANCE FREQUENCY
TRANSIMPEDANCE
0.01 0.001 0.001 0.01 FREQUENCY (MHz) -135 PHASE ANGLE
FIGURE TRANSIMPEDENCE FREQUENCY
FN3393.8 June 2006
HA5023 Characteristics
DIMENSIONS: 1650µm 2540µm 483µm METALLIZATION: Type: Metal AlCu (1%) Thickness: Metal Type: Metal AlCu (1%) Thickness: Metal SUBSTRATE POTENTIAL (Powered Up): VPASSIVATION: Type: Nitride Thickness: TRANSISTOR COUNT: PROCESS: High Frequency Bipolar Dielectric Isolation
Metallization Mask Layout
HA5023
-IN1
+IN1
OUT2
FN3393.8 June 2006
HA5023 Dual-In-Line Plastic Packages (PDIP)
INDEX AREA -B-AD BASE PLANE SEATING PLANE 0.010 (0.25) -CA2
E8.3 (JEDEC MS-001-BA ISSUE
LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 0.39 2.93 0.356 1.15 0.204 9.01 0.13 7.62 6.10 5.33 4.95 0.558 1.77 0.355 10.16 8.25 7.11 NOTES Rev. 12/93
0.015 0.115 0.014 0.045 0.008 0.355 0.005 0.300 0.240
0.210 0.195 0.022 0.070 0.014 0.400 0.325 0.280
NOTES: Controlling Dimensions: INCH. case conflict between English Metric dimensions, inch dimensions control. Dimensioning tolerancing ANSI Y14.5M-1982. Symbols defined Series Symbol List" Section Publication Dimensions measured with package seated JEDEC seating plane gauge GS-3. dimensions include mold flash protrusions. Mold flash protrusions shall exceed 0.010 inch (0.25mm). measured with leads constrained perpendicular datum measured lead tips with leads unconstrained. must zero greater. maximum dimensions include dambar protrusions. Dambar protrusions shall exceed 0.010 inch (0.25mm). maximum number terminal positions. Corner leads E8.3, E16.3, E18.3, E28.3, E42.6 will have dimension 0.030 0.045 inch (0.76 1.14mm).
0.100 0.300 0.115 0.430 0.150
2.54 7.62 10.92 3.81 2.93
FN3393.8 June 2006
HA5023 Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M8.15 (JEDEC MS-012-AA ISSUE
LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.25 0.40 1.75 0.25 0.51 0.25 5.00 4.00 6.20 0.50 1.27 NOTES Rev. 6/05
0.0532 0.0040 0.013 0.0075 0.1890 0.1497 0.2284 0.0099 0.016
0.0688 0.0098 0.020 0.0098 0.1968 0.1574 0.2440 0.0196 0.050
0.10(0.004)
0.050
1.27
0.25(0.010)
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch). Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
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FN3393.8 June 2006

Data Sheet June 2006 FN3393.8 Dual 125MHz Video Current Feedback

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