1162 DVI-compliant transmitter incorporating nextgeneration PanelLink®
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1162 PanelLink Transmitter
1162 DVI-compliant transmitter incorporating nextgeneration PanelLink® technology support full bandwidth MHz. result, 1162 supports monitors projectors with resolutions that range from UXGA (1600 1200). Three TMDSdata channels send data 1.65 Gbps channel. 1162 incorporates industrystandard 12-bit (1/2 pixel clock edge) interface true color (16.7 million) support. Built-in flexibility enables customers pins configure settings interface program registers. 1162 available low-cost, easier-to-use, 48-pin TSSOP package with smaller footprint compared other discrete transmitters. incorporating most advanced PanelLink technology available today, 1162 transmitter brings higher performance guaranteed compatibility your applications while enabling faster time market, smaller form factor designs lower system costs.
DVI-compliant Quality specification defines precise system-level signaling output transmitter system input receiver system. result, DVI-compliant host will always interoperate with DVI-compliant display. most comprehensive method determine quality compliance transmitter measure TMDS "eye" diagram defined specification Test Measurement Guide. Only high-performance PanelLink transmitters, such 1162, yield consistently robust differential signal "eyes" that exceed minimum "eye" width height requirements specification full bandwidth 25-165 MHz.
Applications Motherboards Graphics Boards Notebook
1162 DVI-compliant "eye" diagram measured MHz.
Host
(PC, Graphics Board)
Display
(LCD Monitor, Projector, Plasma Display)
Channels Pixel data
Video Source
Clock HSYNC VSYNC
1162 PanelLink Transmitter
Clock Channel
Pixel data PanelLink Clock Receiver HSYNC
VSYNC
Digital Display
(I2C)
1162 PanelLink Transmitter
Edge Select Input Select Monitor Sense Powerdown De-Skew Plug Detect
Select/ Reset
PanelLink® Transmitter Scalable bandwidth from (VGA UXGA) Three TMDSdata channels capable transferring 1.65 Gbps channel Inter-pair skew tolerance input clock cycle MHz) Adjustable TMDS low-voltage swing amplitude long cable support DC-balanced signals direct coupling fiber-optic ready modules Operates with 1.0-compliant receivers Supports Plug Detect Receiver Sensing
1162 Features
Data Clock
Slave
Registers Configuration Logic
1162
Data [11:0] Display Enable Horizontal Sync Vertical Sync Clock
Data Capture Block
PanelLink Transmitter
Power Ground
Reference Voltage
External Voltage Swing
Input
Flexible graphics controller interface: 1.0V 1.9V (DVO) 3.3V (CMOS) interface voltages 12-bit input true color (16.7 million) support De-skewing option vary clock data timing Supports dual-edge single clock dual-edge differential clock Selectable primary edge parallel data Programmable through interface configurable settings
Power Management
3.3V core provides low-power operation Low-power standby mode
Silicon Image's 1162 Starter Kits
1162 starter kits available various motherboard graphics chipset platforms. details, please Starter Kits/Reference Designs Silicon Image website www.siliconimage.com
Part Number SiI1162CS48
©2002 Silicon Image, Inc. rights reserved. Silicon Image, Silicon Image logo, SiI, 1162, PanelLink, PanelLink logo TMDS trademarks registered trademarks Silicon Image, Inc. United States other countries. Other trademarks property their respective holders. Product specifications subject change without notice. Printed U.S.A. 9/02 PB-0032
Silicon Image, Inc. 1060 Arques, Sunnyvale, 94085 408.616.4000 408.830.9530 www.siliconimage.com
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