HBD851/D Rev. Sep-2005 SCILLC, 2005 Previous Edition Copyright 20

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

HBD851/D Rev. Sep-2005 SCILLC, 2005 Previous Edition Copyright 20

Datasheet Thumbnail

Top Searches for this datasheet

Quality Reliability Handbook
HBD851/D Rev. Sep-2005
SCILLC, 2005 Previous Edition Copyright 2004 "All Rights Reserved"
Page Introduction Semiconductor Organization Semiconductor Quality System Introduction Methods Customer Process Change Notification Page Supplier Quality Process Failure Analysis Reliability Data Summary External Manufacturing Quality Customer Returns
http://onsemi.com
Dear Customer: pleased present with Semiconductor Reliability Quality Handbook. becoming QS-9000 certified first doing business company, Semiconductor demonstrated willingness live these stringent, internationally accepted requirements "Reliability" "Quality." recognize integrated effectiveness building both "Reliability" "Quality" into services, processes products. committed developing distinctive, world class Quality system, which transcends international Quality standards such QS-9000 measures performance versus globally accepted criteria performance excellence based Baldrige model. This will enable implement truly unique, overall business system, which optimized Semiconductor customer base. This handbook intended provide information reliability quality aspects components supplied Semiconductor worldwide. Semiconductor maintains portfolio products that includes, limited following products: Analog Power Management Broadband Bipolar Discrete Logic Gated Standard Logic Rectifiers Small Signal Thyristors Zener broad spectrum products encompasses Analog, Broadband, Logic, Discretes (Bipolar, Diodes, IGBTs, Rectifiers, Thyristors Power MOSFETS) full array package technologies. Semiconductor headquartered Phoenix, Arizona (U.S.A.) number international facilities, which have on-site test product analysis capabilities. Semiconductor developed global marketing, sales field quality network supply customers with quality products, information services. Semiconductor registered both 9001:2000 Technical Specification (TS) 16949:2002. Semiconductor's Quality System Business Operating System synonymous. company established Core Business Process Model ensure that meet exceed customer's expectations business goals. We've adopted approach taking 9001:2000 requirements aligning them within existing Business Model. Quality Policy states, will exceed Customer Expectations with Superior Products Services." addition, Quality statement declares, "Every employee personally responsible ensuring highest Quality products services delivered internal external customers. Continuous improvement quality processes, products service fundamental achievement customer satisfaction." policy gives responsibility achieve quality, both services products, each everyone can't over emphasize this point! every business leader, sales person, project manager, operator, engineer, EVERY employee, personally responsible Quality those products services that individually collectively supply Customers. finally, because believe "fulfilling customer requirements first step customer satisfaction", Core Business process model begins with customer ends with customer. strength business initiatives focus servicing customers ensures Semiconductor's success future. Thank reading letter. hope information contained within handbook provides information were seeking. will continually update contents this handbook remain forefront industry requirements surpass customer expectations uncompromising Quality Reliability. there questions, please contact (800) 282-9855 email quality@onsemi.com. Keenan Evans Vice-President, Director Global Quality Semiconductor
http://onsemi.com
Introduction
Semiconductor designs manufactures analog power management broadband integrated circuits. company's current portfolio numbers close 19,000 products which includes full Pb-Free, ROHS compliant device offerings. manufactured more than billion devices 2003, 27.2 billion 2004 track near BILLION 2005. These products hands customers through highly responsive supply chain. With global logistics network strong portfolio power semiconductor devices, Semi- conductor preferred supplier power solutions engineers, purchasing professionals, distributors contract manufacturers computer, cell phone, portable devices, automotive industrial markets. Headquartered Phoenix, Arizona, public company trade NASDAQ under symbol (ONNN). employ approximately 10,400 people worldwide, which 8,300 direct employees 2,000 employed through joint ventures, most whom engaged manufacturing services. operate manufacturing facilities Arizona, China, Czech Republic, Japan, Malaysia, Philippines, Slovakia, either directly through joint ventures. strive continuously meet customers' current anticipated semiconductor component needs well that, "Customers will come first!" enact this vision each fulfilling mission Eliminate reason customer from other suppliers providing highest Quality components services competitive prices with most reliable delivery ease purchase. Semiconductor both ISO/TS16949:2002 9001:2000. foundation success customer satisfaction, customer confidence continuous improvement. extent these efforts touches every function region business. quality resolve deeply ingrained every employee. This handbook intended review provide information reliability quality aspects semiconductor products supplied Semiconductor worldwide. today's semiconductor marketplace, important elements success company quality reliability systems. They interrelated, reliability being quality extended over expected life product. manufacturer remain business, products must meet exceed basic quality reliability standards. semiconductor supplier, Semiconductor successfully established reliability quality standards products, processes, services that exceed basic standards meet customers' needs. purpose this report, most stringent demanding definitions quality reliability used.
Quality defined
Reduction variability around target that
conformance customer requirements expectations achieved cost effective way. probability that device (equipment, parts) will have performance characteristics within specified limits. Fitness use.
Reliability defined
Quality time environment (temperature, probability that semiconductor device, which
voltage, etc.). initially satisfactory performance, will continue perform intended function given time under actual usage environments.
http://onsemi.com
Semiconductor, reliability quality assurance program designed generate ongoing data both reliability quality various product families. Both reliability quality monitors performed different major categories semiconductor products. These monitors designed test product's design material well identify eliminate potential failure mechanisms ensure reliable device performance real world application. Thus, primary purpose program identify trends from data generated that information continuously improve products. addition, this reliability quality data utilized customers failure rate predictions.
This handbook compilation reliability test results quality data from semiconductor operations. data contained annual summaries many detailed tests evaluations performed Semiconductor locations worldwide. Detailed reliability reports product line device types available upon request obtained through your local Semiconductor Sales Customer advocacy representative, from sources indicated this handbook.
http://onsemi.com
Semiconductor Organization
Aylesbury Phoenix East Greenwich FRANCE Toulouse
CZECH REPUBLIC Roznov SLOVAKIA Piestany
CHINA Leshan
JAPAN Aizu JAPAN Tokyo PHILIPPINES Carmona
CHINA Hong Kong
MALAYSIA Seremban SINGAPORE
Corporate Headquarters
http://onsemi.com
Semiconductor Quality System
(Based Core Business Process Model)
Semiconductor registered both 9001:2000 Technical Specification (TS) 16949:2002. Semiconductor's Quality System Business Operating System synonymous. company established Core Business Process Model, which shown below ensures meet exceed customer's expectations business goals. We've adopted approach taking 9001:2000 requirements aligning them into existing Business Model. Quality Policy states, will exceed Customer Expectations with Superior Products Services." addition, Quality statement declares, "Every employee personally responsible ensuring highest Quality products services delivered internal external customers. Continuous improvement quality processes, products service fundamental achievement customer satisfaction." Since believe that, other words, "fulfilling customer requirements first step customer satisfaction", Core Business process model begins with customer ends with customer.
Semiconductor Certification Status
Each manufacturing sites, marketing design groups have been certified Lloyd's Registry Quality Assurance (LRQA). Certificate Approval: Certificate Schedule:
Sigma[
them from total system's perspective from idea introduction successful delivery product service. will determine this? asking external customers perceive Semiconductor terms quality asking them about their expectations Semiconductor. This will accomplished conducting Annual Quality Survey. objectives that will accomplished through Annual Quality Survey are: Continue strengthening business operating system determining customers' current business expectations. Provide baseline measurement performance against those expectations. Provide feedback performance against customer expectations annual basis (trends). Track changing expectations order modify quality system accordingly. Provide basis consistent customer satisfaction metrics that provides check internal quality measurements. Therefore, each business must develop customer driven indices using factors established customer aggressive improvement goals. They will also change time when customers raise meet their current expectations.
Semiconductor Learning Development
Semiconductor committed Sigma philosophy both manufacturing business environments. Sigma efforts millennium beyond will Continue efforts achieve Sigma results beyond everything (products services) Measure parts billion (ppb)
Customer Satisfaction
Semiconductor engaged very competitive global marketplace. will grow continue focus only heritage past accomplishments. continually strive understand customers' needs service support focusing customer service. factor here feedback receive quality products services. need understand this well that will able anticipate solutions product service needs customers have recognize. That means listening their ideas about better serve
Semiconductor instituted education training that directly linked strategic company goals identified Executive Council. corporate driven training delivered targeted toward those areas. keep current with business needs, training focus reviewed annually alignment with corporate plan strategy. When focus determined, supporting training education events identified, designed, developed, and/or sourced meet need. This dynamic process with inputs from organization, employees external market factors. functional level, organizational capability assessed, matched with current skills population execute, gaps filled accordingly. employee needs factored when looking skill match. Does employee have right skills execute strategic direction company not, what immediate development plan that would allow employee obtain skill, real time. This job/skill match process allows alignment business goals skill requirements. Black Belt training programs mentioned above excellent examples many training programs developed Semiconductor.
http://onsemi.com
Introduction Methods
semiconductors, often critical nature equipment which they used leaves room failure. their very nature, properly designed semiconductor devices will outlast life expectancy equipment which they intended, careful processing will ensure that each device meets specifications which designed. result proper design careful planning quality product. reliability quality methods discussed this handbook contribute attainment Sigma performance operations.
Reliability Stress Tests
accelerate corrosion metallization. With time, this catastrophically destructive test. Typical Test Conditions: 85°C 95°C, 95%, Bias 100% Data Book maximum rating, 1008 hours. Common Failure Modes: Parametric shifts, high leakage and/or catastrophic failure. Common Failure Mechanisms: corrosion contaminants such foreign material within package materials. Poor package sealing.
HIGH TEMPERATURE FORWARD BIAS
following brief descriptions tests commonly used reliability assessment. tests listed performed each product. Other tests performed when appropriate. information herein typical testing performed. Variations following will found throughout this document based limitations specific device being tested.
AUTOCLAVE
This test designed measure stability devices under forward bias condition high temperature. Typical Test Conditions: 85°C 100°C, Bias 100% Data Book maximum rating, 1008 hours. Common Failure Modes: Parametric drifts repetitive peak state reverse currents, gate trigger current voltage. Common Failure Mechanisms: Random oxide defects ionic contamination.
HIGH TEMPERATURE GATE BIAS
Autoclave environmental test which measures device resistance moisture penetration resultant effects galvanic corrosion. Autoclave highly accelerated destructive test. Typical Test Conditions: 121°C, 100%, Atmosphere psig), hours. Common Failure Modes: Parametric shifts, high leakage and/or catastrophic failure. Common Failure Mechanisms: corrosion contaminants such foreign material within package materials. Poor package sealing.
HIGHLY ACCELERATED STRESS TEST
This test designed electrically stress gate oxide under bias condition high temperature. Typical Test Conditions: 150°C, Bias Data Book maximum rating, 1008 hours. Common Failure Modes: Parametric shifts gate leakage gate threshold voltage. Common Failure Mechanisms: Random oxide defects ionic contamination.
HIGH TEMPERATURE REVERSE BIAS
Highly Accelerated Stress Test uses pressurized environment produce extremely severe temperature, humidity bias conditions. HAST accelerates same failure mechanisms High Humidity High Temperature Bias. Typical Test Conditions: 130°C, 95%, Atmospheres, Bias 100% Data Book maximum rating, hours. Common Failure Modes: Parametric shifts, high leakage and/or catastrophic failure. Common Failure Mechanisms: corrosion contaminants such foreign material within package materials. Poor package sealing.
HIGH HUMIDITY HIGH TEMPERATURE BIAS
purpose this test align mobile ions means temperature voltage stress form high-current leakage path between more junctions. Typical Test Conditions: 85°C 150°C, Bias 100% Data Book maximum rating, 1008 hours. Common Failure Modes: Parametric shifts leakage gain. Common Failure Mechanisms: Ionic contamination surface under metallization die.
HIGH TEMPERATURE STORAGE LIFE
This environmental test designed measure moisture resistance plastic encapsulated devices. bias applied create electrolytic cell necessary
High temperature storage life testing performed accelerate failure mechanisms which thermally activated through application extreme temperatures. Typical Test Conditions: 125°C 200°C, bias, 1008 hours. Common Failure Modes: Parametric shifts leakage gain. Common Failure Mechanisms: Bulk diffusion defects.
http://onsemi.com
INTERMITTENT OPERATING LIFE
purpose this test same Operating Life addition checking integrity both wire bonds means thermal stressing. Typical Test Conditions: 25°C, Data Book maximum rating, Toff 125°C 175°C, 1000 15000 cycles. Common Failure Modes: Parametric shifts catastrophic failure. Common Failure Mechanisms: Foreign material, crack bulk defects, metallization, wire diebond defects.
OPERATING LIFE
Typical Test Conditions: -65°C 150°C, cycle 1000. Common Failure Modes: Parametric shifts catastrophic failure. Common Failure Mechanisms: Wire bond, cracked lifted package failure.
THERMAL SHOCK (LIQUID LIQUID)
purpose this test evaluate bulk stability generate defects resulting from manufacturing aberrations that manifested time stress-dependent failures. Typical Test Conditions: 25°C, Data Book maximum rating, 1008 hours. Common Failure Modes: Parametric shifts catastrophic failure. Common Failure Mechanisms: Foreign material, crack die, bulk die, metallization, wire bond defects.
SOLDERABILITY
purpose this test evaluate ability device withstand both exposure extreme temperatures sudden transitions between temperature extremes. This testing will also expose excessive thermal mismatch between materials. Typical Test Conditions: -65°C 150°C, cycle 1000. Common Failure Modes: Parametric shifts catastrophic failure. Common Failure Mechanisms: Wire bond, cracked lifted package failure.
Reliability Data Analysis
purpose this test measure ability device leads/terminals soldered after extended period storage shelf life. Typical Test Conditions: Steam aging hours. Common Failure Modes: holes, dewetting, non-wetting. Common Failure Mechanisms: Poor plating, contaminated leads.
SOLDER HEAT
This test used measure ability device withstand temperatures seen wave soldering operations. Electrical testing endpoint criterion this stress. Typical Test Conditions: Solder Temperature 260°C, seconds. Common Failure Modes: Parameter shifts, mechanical failure.
TEMPERATURE CYCLING (AIR-TO-AIR)
purpose this test evaluate ability device withstand both exposure extreme temperatures transitions between temperature extremes. This testing will also expose excessive thermal mismatch between materials.
Reliability probability semiconductor device will perform specified function specified time period under specified environmental conditions. general, reliability thought maintaining acceptable quality performance over time environmental conditions. characteristic reliability hazard rate h(t). hazard rate roughly represents rate devices will fail function time. most widely used probability distribution used analyzing semiconductor device reliability data exponential distribution. hazard rate function exponential distribution (this usually called failure rate) function time very simple estimate. point estimate failure rate obtained dividing number observed failures total number device-hours from stress test. Device-hours defined product number devices that stress tested duration stress test. This called point estimate because based sample devices from population devices with similar characteristics, does account uncertainty caused estimating failure rate from sample. modern semiconductor devices, failure rates extremely failure rate presented units FIT, where number failures billion device-hours. These calculations appropriate when exact failure times known. More complicated censoring situations analyzed using techniques presented elsewhere (e.g., Meeker Escobar, "Statistical Methods Reliability Data," (1998).
http://onsemi.com
order account uncertainty calculating failure rate based sample, must apply confidence limits point estimate. relevant confidence interval device reliability calculations one-sided upper confidence interval failure rate. one-sided upper confidence interval provides estimate failure rate that unlikely exceeded given point estimate given confidence level. appropriate sampling distribution failure rate exponential distribution chi-square distribution This means that were calculate failure rate many independent samples drawn from same exponential population, then distribution point estimates failure rate would follow distribution. one-sided upper confidence estimate exponential failure rate where life test time-censored given
1*sided 2@n@t
where: l1-sided one-sided upper confidence level failure rate estimate inverse cumulative distribution function chi-square distribution (100 confidence level)/100 number failures observed during stress test number devices stress test sample stress test duration hours Values inverse cumulative distribution function chi-square distribution confidence levels provided Table
Table Chi-Square Inverse Cumulative Distribution Function
Confidence Level Fails Quantity 1.833 4.045 6.211 8.351 10.473 12.584 14.685 16.780 18.868 20.951 23.031 25.106 27.179 Confidence Level Fails Quantity 4.605 7.779 10.645 13.362 15.987 18.549 21.064 23.542 25.989 28.412 30.813 33.196 35.563
continuing process improvements advances device package technologies, failure rate semiconductor devices extremely low. accurately assess reliability these devices, reliability engineers routinely accelerated stress test conditions during reliability testing. These test conditions carefully chosen accelerate failure mechanisms that expected occur under normal conditions without introducing spurious failure mechanisms. Accelerated stress testing used provide estimates device reliability performance under conditions, assist identifying opportunities improving reliability performance device. Failure mechanisms found during stress testing traced root cause eliminated, whenever possible. most commonly used stress accelerator temperature. most cases, elevated temperature increases rate which given failure mechanism progresses. There failure mechanisms that accelerated using lower temperatures. simplest thermal acceleration model Arrhenius equation:
Rate
where: Rate rate progress given failure mechanism pre-exponential factor that characteristic given failure mechanism Thermal activation energy failure mechanism Boltzman constant, 8.617@ 10-5 eV/K device junction temperature degrees Kelvin Using Arrhenius equation, relate failure rate stress condition failure rate different condition. acceleration factor defined following manner:
Rate (Condition Rate (Condition
where: Rate (Condition =rate progress given failure mechanism Condition (i.e., Rate (Condition =rate progress given failure mechanism Condition (i.e., thermal acceleration factor becomes:
here: device junction temperatures stress conditions respectively. Figure example acceleration factor used transform stress testing time into equivalent time typical junction temperature.
http://onsemi.com
FAILURE RATE 1200 1400
8.617
(167.5 273.15) 273.15)
TIME (YEARS) 70°C (TJ)
ACCELERATION FACTOR STRESS TESTING TIME (HRS) 167.5°C (TJ)
Figure Example Temperature Acceleration Factor (0.7 Activation Energy) ACTIVATION ENERGY
Semiconductor uses industry-standard estimates activation energies that documented EIA/JEDEC Publication 122, "Failure Mechanisms Models Silicon Semiconductor Devices." following table summarizes most commonly used activation energies.
Table Activation Energy
Device Association Silicon Surface Oxide Failure Mechanism Surface Inversion Mobile Ions Charge Accumulation Surface Charge Spreading Dielectric Breakdown Thin Oxide Thick Oxide Electromigration Pure AlSi 1.5%) AlSi (1.5%) AlCu (0.5%) AlCuSi AlCu over (u1% Corrosion General With Chlorine With Phosphorus Assembly Process Intermetallics Bromine-induced Halide-induced Chloride-induced Wire Bond Attach Accelerating Failures Typical Activation Energy (eV) 0.48 0.50 0.72 0.70 0.70 0.71
Gate Oxide
Metallization
E/V,
0.53
0.75 0.30
Temperature, Temperature Cycling, Voltage, Electric Field, Current Density, Humidity
http://onsemi.com
THERMAL RESISTANCE
Circuit performance long-term circuit reliability affected temperature. Normally, both improved keeping junction temperatures low. Electrical power dissipated semiconductor device source heat. This heat source increases temperature about some reference point, normally ambient temperature 25°C still air. temperature increase, then, depends amount power dissipated circuit thermal resistance between heat source reference point. temperature junction depends packaging mounting system's ability remove heat generated circuit from junction region ambient environment. basic formula converting power dissipation estimated junction temperature
(qJC qCA)
Only terms right side equation varied user, ambient temperature device case-to-ambient thermal resistance, qCA. some extent, device power dissipation also controlled, under recommended supply voltage loading dictate fixed power dissipation.) Both system flow package mounting technique affect thermal resistance term. essentially independent flow external mounting method, sensitive package material, bonding method, area. applications where case held essentially fixed temperature mounting large temperature controlled heat sink, estimated junction temperature calculated
(JC) (qJC)
(qJA)
where maximum case temperature other parameters previously defined.
FLOW
where: maximum junction temperature maximum ambient temperature =calculated maximum power dissipation, including effects external loads when applicable average thermal resistance, junction-to-case average thermal resistance, case-to-ambient average thermal resistance, junction-to-ambient
flow over packages (due decrease qCA) reduces thermal resistance package, therefore, permitting corresponding increase power dissipation without exceeding maximum permissible operating junction temperature. thermal resistance values specific packages, Semiconductor Data Book Design Manual appropriate device family contact your local Semiconductor sales office.
http://onsemi.com
Customer Process Change Notification
Semiconductor committed delivering superior quality products valued customers providing cost effective solutions. This commitment continuous improvement quality value requires periodically make changes product portfolio. These changes handled accordance with Semiconductor's change management system, described below, which compliant international quality system standards such 9001:2000 TS16949. Along with commitment quality value, Semiconductor manages necessary product changes with rigorous evaluation characterization methodology make them fully "transparent" valued customers from electrical, physical, thermal performance standpoint. goal make customer evaluation changed product unnecessary.
Change Management Overview
proposed changes classified three classes, determined nature scope proposed change. classification level indicates level qualification testing customer notification required. classification level assigned corporate Business Change Action Board, which independent body chartered represent customer's best interests. Prior submittal Business Change Action Board review, local Manufacturing Change Action Board must review approve potential changes first. This two-tiered
requirement review approval intended provide thorough analysis changes proper evaluation risk mitigation. Level changes include minor change materials, process method, process equipment design, which effect visual appearance, external dimensions tolerances, performance finished product. Level changes require reliability testing customer notification, require product characterization prior implementation. Level changes include substantial change materials, process method, process equipment design, which effect external dimensions tolerances performance finished product. Level changes have effect visual appearance difference purely cosmetic nature does impact customer usage product. Level changes require product characterization reliability testing require customer notification prior implementation. Level changes include substantial change materials, process method, process equipment design, which affect visual appearance, external dimensions tolerances, performance finished product. Level changes also include transfer existing wafer fabrication assembly processes manufacturing site. Level changes require both product characterization reliability testing, communicated customers.
Product Change Notification Customers
Change Control Process Change Control Process Change Control Process Change Control Process
Provide Advance Notification (HR)
Analyze Feedback Make Decision
Provide Initial Notification
Semiconductor Customer
Provide Feedback Request Samples Provide Feedback Request Samples
Provide Final Notification (GPCN, PPAP) Provide Samples (upon request)
Implement Change
Provide Feedback Samples/Data
months
months
months
Time
http://onsemi.com
Semiconductor's Change Management Policy inform customers about Level product and/or process changes many three stages communication. Horizon Report (Optional) This "Advanced Notification" communication intended provide customers early warning about upcoming potential changes. intended give least months advance notification Level changes. This notification usually just identifies brief change description, products affected, general timing change. Information contained Horizon Report should considered very preliminary subject modification. Horizon reports provided only those Semiconductor customers request them. Initial Product/Process Change Notification (IPCN) This "Initial Notification" first, formal notification distributed customers. IPCN must distributed least days from effective date change. IPCN contains qualification plan which must completed prior implementation, which gives valued
customers opportunity request additional testing they might require order approve change. content qualification plan dependent nature scope change, cases must compliance with applicable JEDEC standards. Final Product/Process Change Notification (FPCN) This `Final Notification' completes notification process. FPCN must distributed least days from effective date change. FPCN must contain successful results characterization reliability testing documented qualification plan. Prior issuance FPCN characterization reliability data again reviewed approved both Manufacturing Business Change Action Boards. advance notification provides valued customers with final opportunity communicate additional requirements accept change prior implementation necessary.
http://onsemi.com
Supplier Quality Process
Semiconductor follows five step Supplier Development process improve quality goods services delivered suppliers. five steps process are: Planning, Implementation, Measurement, Improvement, Recognition Award. During Planning phase establish general expectations doing business with Semiconductor, make supplier selection based their Quality System, Technical Capability, Value Added Services, Cost, Capacity, etc. Suppliers requested perform Quality System self evaluation TS-16949:2002 requirements. Once potential supplier been selected they must pass qualification process prior making production shipments; this Implementation step Supplier Development Process. order pass qualification requirements suppliers must provide samples data which demonstrates their product conforms specifications well their ability manufacture product consistently. This process will include review First Article Inspection data, Process Control Measurement System Analysis data, on-site audit Semiconductor (for suppliers). significant process changes made supplier through same qualification process described above, managed through Part Submission Warrant process.
Once supplier been qualified enter into Measurement stage. material production verified three ways prior production, three methods are: Inspection, Audits combined with measurement acceptable performance, and/or receipt review data. determined that material been received that non-conforming specified requirements utilize automated corrective action tracking system ensure suppliers respond problem using corrective action. quarterly basis measure supplier's performance areas Quality, Cost, Delivery, Service Technology. This data shared with suppliers both on-line well during Business Review Meetings. also have ongoing supplier assessment process TS-16949:2002 requirements)
which prioritized based their certification status ongoing performance measured rating system. Improvement stage establish goals with suppliers using Supplier Goal Plan (SGP) Process. This enables clearly define priorities suppliers, provides with method follow-up verifies suppliers meeting goals. reviewed with suppliers during Business Review meetings. Semiconductor understands value recognizing awarding suppliers their hard work dedication. believe that recognizing best suppliers their superb performance setting standard suppliers achieve. This final step Supplier Development Process; Recognition Award.
http://onsemi.com
Failure Analysis
Overview Generic Process Steps
Failure analysis process which entails vast analytical methods techniques solve reliability quality issues that occur either manufacturing application products. process rather complicated endeavor many aspects associated with ever advancing semiconductor packaging technologies numerous engineering disciplines involved. failure analyst must proficient design, process, assembly, test, applications, which equates electrical, physics, chemical, mechanical engineering. Failure analysis laboratories available globally Semiconductor manufacturing sites support customer returns, reliability failures, manufacturing fallout design support. These same analytical tools proactively utilized good unit analysis, process characterization, destructive physical analysis, construction analysis, even competitive benchmarking studies. Tool development failure analysis advancing similar rate that manufacturing. labs stay current with technology, analyst must continually developing associated tools techniques. features shrinking become covered with multiple layers interconnects, requirements failure analysis needs anticipated early design cycle. incorporating these specialized test structures functional test coverage, problems more easily diagnosed. addition tools, trained personnel, techniques, procedures, adequate database tracking system should employed assist expeditious problem solving. Semiconductor, labs equipped diverse range instrumentation engineering expertise solve problems aspects semiconductor packaging analysis. success failure analysis only superior instrumentation set, people their approach problem solving. While failure analysis able identify failure mechanism, road root cause just embarked upon. Depending manufacturing process complexity, root cause analysis entail extensive experimentation designed experiments only identify root cause also verify potential corrective action effectiveness. full process problem solving entails multiple labs techniques. These analytical professionals along with subject matter experts, such design manufacturing, work unison solve problem.
full sequence problem solving events outlined Section Customer Returns. following steps outline basic procedures that typical field return subjected within failure analysis lab.
Required Information
more information better! There minimum background information that greatly impacts overall quality cycle time problem solving process. minimum some questions follows: Failure history failure rate customer site, either this application other products. this product have changes occurred this time frame? Length time application conditions upon failure should included. other components fail same time they fail? schematic sent? there devices this same date code still available? What failure mode application related this device? perceive that device failing (short, open, stuck logic levels, etc.)? device handled prior receipt Semiconductor? Precautions should taken removal handling (ESD) devices insure that electrical physical damage does occur testability package maintained.
Receipt Request
When product received failure analysis lab, devices have generally been confirmed failures through automatic test equipment achieve rapid failure verification customer support group. this point, background documentation, electrical results historical failure data reviewed outline appropriate course analytical action. external visual inspection carried out, documenting package's physical condition markings.
Diagnostic Testing
devices would most likely subjected benign "pin-to-pin" test which quickly identifies parametric anomalies compared known good units. Depending failure mode, device subjected more extensive bench test with stress conditions applied match customer's application stimulate mechanism.
http://onsemi.com
Non-destructive Testing
Failure analysis itself reverse engineering this vein, destructive nature returned product. Since package will least partially destroyed expose die, non-destructive techniques carried first observe package assembly related mechanisms. most common techniques used acoustic microscopy radiographic (XRAY) inspections look internal assembly molding anomalies.
Storage Bakes Stress
anomalies. majority these techniques attempting observe properties failure site, thermal dissipation photon emission. From probing standpoint, navigational tools, laser cutter Focussed Beam (FIB) employed assist device circuit isolation.
Deprocessing
Depending failure mode, analyst subject device series vacuum storage bakes observe parametric functional shifts. original failure mode confirmed, stress testing (high temperature bias instance), carried observe possible longer-term reliability concerns.
Decapsulation Package Preparation
Deprocessing iterative process removing layer time, which entail both chemistry plasma etching techniques reveal underlying structures. proper techniques critical these steps destructive nature process potential loss vital information.
Analysis Failure Site
general course action this point reveal surface. case plastic encapsulated component, this would entail chemical decapsulation. There however, many methods utilized decapsulation package preparation, dependent package, failure mode, potential failure mechanism.
Internal Inspection
Once potential site been determined revealed, documentation analysis should conducted. Further analytical techniques employed depending whether morphology material composition required.
Report Conclusion
internal optical inspection would then carried check obvious assembly anomalies wafer fabrication issues. Re-testing recommended this point insure that failure mode changed.
Internal Diagnostic Testing
Upon completion analysis, written report generated documenting work. report should state relationship physical anomaly failure mode. should also include sufficient documentation root cause analysis manufacturing site warranted.
Summary
many cases, internal inspection will reveal obvious failure mechanism. this point, depending technology level testability, would utilize more techniques available isolate failure site. This could entail extensive probing technique, such liquid crystal photoemission, highlight potential
cost failure analysis high extensive instrumentation, highly technical staff, continual training development, associated analysis expenses (chemicals, fixtures, etc.). enable most efficient utilization these resources, essential that background documentation (see Required Information previous page) complete upon receipt that open communication channel between Semiconductor customers exists. This will insure timely resolution problem either end.
http://onsemi.com
Reliability Data Summary
Semiconductor performs extensive reliability stress testing devices that span full breadth product portfolio. Reliability data collected part Semiconductor Reliability Audit Program, part normal product qualification re-qualification process. This data periodically updated include most recent test results. data typically updated quarterly basis. current data always located through reliability data links onsemi.com website.
reliability data presented parts: Life Test Data that groups data business unit product family technology. This data provides information that pertains primarily design- wafer fabrication-related failure mechanisms. Package Test Data that groups data package case outline product family technology. This data provides information that pertains primarily package design- assembly process-related failure mechanisms. Semiconductor package outline reference also included make easier identify specific case outline.
http://onsemi.com
External Manufacturing Quality
Semiconductor utilizes subcontractor joint venture partners support customers' increasing requirements high quality, cost semiconductors. global subcontractor joint venture partners perform some areas semiconductor manufacturing. This includes wafer fabrication, wafer probe, assembly, test, well product analysis, reliability testing. When Semiconductor selects manufacturing subcontractors, this requires extensive review company's ability meet high quality, business technical requirements. current manufacturing partners, continuous improvement plans required which outline aggressive improvement goals. Progress these goals periodically reviewed. product introduction process change control requirements specifications same internal Semiconductor factories well external manufacturing partners. Quality systems vary from subcontractor subcontractor; however, Semiconductor requires each supplier manufacture products with same high standards internal factories. Prior engaging with subcontractor supplier when adding expanded manufacturing line, Semiconductor performs extensive assessment. This includes review machine capability maintenance, process documentation control, training certification personnel, FMEA's, well many other areas. Detailed project management methodology utilized drive projects timely completion. Semiconductor encourages each subcontractor foundry pursue outside certification drive their quality system improvements, i.e., QS-9000, Semiconductor Assembly Council (SAC), etc. Additionally, drive many internal factories quality system practices into external partners. Periodic subcontractor reviews held review progress metrics including customer quality delivery. Joint corrective action plans agreed upon drive resolution continuous improvements.
http://onsemi.com
10.0 Customer Returns
Semiconductor's Global Customer Return Incident process focused formal Problem Solving Responsiveness. Problem Solving Methodology determine Containment, Root Cause, Corrective/Preventive Actions. Eight Disciplines are: Establish Team Establish cross functional team people with process/product knowledge solve problem. Describe Problem Specify customer's problem identifying quantifiable terms who, what, where, why, how, many, problem. Implement Verify Containment Define Implement containment actions isolate effect problem from customers until corrective actions implemented. Define Verify Root Cause Identify potential causes that could explain problem occurred escaped testing. Isolate verify root cause testing each potential cause against problem description. Choose Verify Permanent Corrective Action Identify potential corrective actions Occur Escape Root Causes. Verify which actions will correct root cause. Implement Permanent Corrective Action Provide action plans implementation verified corrective actions. Follow outstanding actions. Prevent Recurrence Implement actions address "system" failure. Update control plans, FMEA specifications, process specifications. Fan-Out Corrective Actions appropriate manufacturing sites, other Technologies. Congratulate Team communicate customer throughout process.
Customer Incident Process
CUSTOMER COMMUNICATION CONTAINMENT
Problem Notification Submission Customer Receipt Samples Semiconductor Initial Problem Verification Complete Failure Problem Analysis Complete Final Corrective Action Plan Corrective Preventive Actions Implemented Verified
Customer Incidents tracked Customer Incident information system. Monthly customer incident metrics compiled distributed corporate-wide. Responsiveness metrics used drive continuous improvement Cycle Time arena. Failure Mechanism paretos used
drive continuous improvement Product Administrative Quality arenas. These metrics also reviewed monthly Business Unit Manufacturing Operations Reviews.
http://onsemi.com
Sigma registered trademark Motorola, inc.
Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer. This literature subject applicable copyright laws resale manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: American Technical Support: 800-282-9855 Toll Free Literature Distribution Center Semiconductor USA/Canada P.O. 61312, Phoenix, Arizona 85082-1312 Phone: 480-829-7710 800-344-3860 Toll Free USA/Canada Japan: Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder additional information, please contact your local Sales Representative.
http://onsemi.com
HBD851/D

HBD851/D Rev. Sep-2005 SCILLC, 2005 Previous Edition Copyright 20

Top Searches for this datasheet

Other recent searches