Specifications Features Available image array sizes: (640 480) (352 28

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Specifications Features Available image array sizes: (640 480) (352 28

Datasheet Thumbnail

Top Searches for this datasheet

Agilent HDCS-1020, HDCS-2020 CMOS Image Sensors
Specifications Features Available image array sizes: (640 480) (352 288) Bayer color filter array Independent sub-sampling modes (2:1 each) providing frame rate increase Description HDCS-1020 HDCS-2020 CMOS Image Sensors capture high quality, noise images while consuming very power. These parts integrate highly sensitive active pixel photodiode array with timing control onboard conversion. Available either (640 480) (352 288) resolution image arrays, devices ideally suited wide variety applications. HDCS-2020 HDCS-1020, when coupled with Agilent's HDCP family image processors, provide complete imaging system enable rapid endproduct development. Designed low-cost consumer electronic applications, HDCS-2020 HDCS-1020 sensors deliver unparalleled performance mainstream imaging applications. HDCS-2020 (VGA) HDCS-1020 (CIF) CMOS active pixel image sensors with integrated conversion full timing control. They provide random access sensor pixels, which allows windowing panning capabilities. sensor designed video conferencing applications still image capabilities. HDCS family achieves excellent image quality with very dark current, high sensitivity, superior antiblooming characteristics. devices operate from single bias voltage, easy configure control, feature power consumption. Programmable Features Programmable window size ranging from full array down pixel window Programmable panning capability which allows specified window (minimum pixels) located anywhere sensor array Integrated programmable gain amplifiers with independent gain control each color Internal register programmable either UART synchronous serial interface Integrated timing controller with rolling electronic shutter, row/ column addressing, operating mode selection with programmable exposure control, frame rate, data rate Programmable horizontal, vertical, shutter synchronization signals Programmable horizontal vertical blanking intervals HDCS-1020 Full frame video rate resolution: 25.8 HDCS-2020 Full frame video rates resolution: Still image capability Mechanical shutter external flash mode power modes Shadow gain exposure registers Integrated analog digital converters: HDCS-2020 bit), HDCS-1020 bit) Automatic subtraction column fixed pattern noise Integrated voltage references Digital image data output (HDCS-1020) (HDCS-2020) synchronous parallel interface serial interface Applications Digital still cameras cameras Handheld computers Cellular phones Notebook computers Toys
Introduction Sensor
sensor acts normal CMOS digital device from outside. Internal circuits combination sensitive analog timing circuits. Therefore, designer must attention board layout power supply design. Writing registers compatible two-wire interface provides control sensor. Sensor data normally output parallel interface (serial data output also available). Once registers programmed sensor selfclocking timing internally generated. chip programmable amplifiers provide separately adjust green blue pixels good white balance. Analog digital conversion also chip digital data output. data ready pulse follows each valid pixel output. signal follows each frame signal follows each frame. Layout Analog analog ground need routed separately from digital digital ground. Noisy circuits should placed opposite side board. Heat producing circuits such microprocessors
displays should placed next opposite from sensor reduce noise image. Power Supply sensor operates VDC. There power supplies sensor, analog digital Vdd. supplies grounds must kept separate. separate regulators provide best isolation. noise analog supply will result noise image. Analog digital ground should tied together single point lowest impedance noise. Master Clock part requires duty cycle master clock. Maximum clock rates HDCS-2020 HDCS-1020. Reset hard reset required before sensor will function properly. Once master clock running, assert nRST_nSTBY clock cycles. Register Communication Communication (read/write) sensor registers wire serial interface- either synchronous compatible
half duplex UART (9600 baud default). nTristate (pin HDCS-1020 only) must pulled high normal operation. HDCS-2020 does have nTristate. Parallel Data Output parallel data output from sensor. data ready line (DRDY) asserted when data valid. sensor acts master outputs data. There flow control data received handshake. Once (CONTROL register) set, image processor must ready accept data sensor rate when data presented. Serial Data Output this mode, output data lines (the lower bits parallel data port) wire serial interface. Handshaking data, nROW line asserted. frame data, nFRAME_nSYNC line asserted. Registers following table sample register settings. These values good starting point.
Table Register Declaration.
Register Name
Identifications Register Status Register Interrupt Mask Register Control Register Drive Control Register Interface Control Register Interface Timing Register Baud Fraction Register Baud Rate Register Control Register First Window Register First Window Column Register Last Window Register Last Window Column Register Timing Control Register Gain Register: Green Gain Register: Gain Register: Blue Gain Register: Green Exposure Register Exposure High Register Sub-Row Exposure Register Error Control Register Interface Timing Register Interface Control Register Horizontal Blank Register Vertical Blank Register Configuration Register Control Register Reserved Reserved Reserved Reserved
Mnemonic
IDENT STATUS IMASK PCTRL PDRV ICTRL ITMG BFRAC BRATE ADCCTRL FWROW FWCOL LWROW LWCOL TCTRL ERECPGA EROCPGA ORECPGA OROCPGA ROWEXPL ROWEXPH SROWEXP ERROR ITMG2 ICTRL2 HBLANK VBLANK CONFIG CONTROL
Address (hex)
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20
Sample Value (hex)
0x7F 0x00 0x03 0x00 0x20 0x00 0x00 0x00 0x08 0x00 0x07 0x79 0xA8 0x04 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x00 0x4B 0x00 0x00 0x00 0x0C 0x04
Setting Exposure Gain exposure image function exposure gain registers. Exposure sets length time each pixel integrates light (shutter speed). Gain settings allow pixel values amplified. Gain values from allowed, higher gain settings amplify noise (much like higher film speeds grainier). best lower gain settings better images. Gains from generally recommended. Note there green gain registers listed Table number green pixels even number green pixels. green color filters slightly different between rows this allows finetuning. Using same gain setting both green registers usually enough. Since blue channel sensitive, using blue gains approximately double that green will allow full range three channels. Using MacBeth Color Checker good judge exposure color balance. good image will have good grey scale (the bottom patches chart). Gain settings should adjusted red, green, blue values equal grey patch. After setting gain, exposure registers should adjusted good exposure. There three exposure registers; Table
Table
Register Name
Gain Register: Green Gain Register: Gain Register: Blue Gain Register: Green
Mnemonic
ERECPGA EROCPGA ORECPGA OROCPGA
Address (hex)
0x0F 0x10 0x11 0x12
Table
Register Name
Exposure Register Exposure High Register Sub-Row Exposure Register
Mnemonic
ROWEXPL ROWEXPH SROWEXP
Address (hex)
0x13 0x14 0x15
exposure high register (upper bits) exposure register (lower bits) single register. This register sets integration time (shutter speed) sensor. sub-row exposure register used very small changes exposure allow fine-tuning exact shutter speeds. Proper exposure will result black values near 0x00 white values near 0xFF (assuming bits). grey patches MacBeth chart should have different average intensity values image. brightest patches both appear white then exposure long. darkest patches both appear black then exposure short. Remember that image does have gamma correction applied yet. final grey scale image needs evaluated after gamma correction.
Image Processing data from sensor requires image processing before digital image ready viewing. Some standard steps image processing follows: Defective pixel correction Lens flare subtraction Auto-exposure Auto-white balance Color filter array interpolation (demosaic) Color correction (3x3 matrix) Gamma correction Color space correction (3x3 matrix) Data compression
Image processing part sensor must supplied separately. Image processors that compatible with these sensors available from Agilent Technologies (HDCP-2000, HDCP-2010).
Typical Application
Clock
IMODE0 IMODE1 nTRISTATE DRDY DATA READY Reset Frame TxD/RxD Clock
Parallel Interface
HDCS-1020
nRST_nSTBY nROW nFRAME_nSYNC nIRQ Analog Analog Digital Digital 3.3V Regulator 3.3V Regulator
Serial Interface
Host System
Star Ground
Typical Electrical Specifications
Part Number Pixel size Maximum Clock Rate Effective Sensor Dynamic Range Effective Noise Floor Dark Signal [1,4] HDCS-2020 (VGA) (VGA) (VGA) e240 e-/sec 22°C) V/(Lux-S) 1.22 68,000 µV/e1- resolution) µsec minimum, µsec increments -5%/+10% operating, standby operating, standby 1/3" +65°C -40° +125°C HDCS-1020 (CIF) (CIF) (CIF) e240 e-/sec 22°C) V/(Lux-S) 1.22 68,000 µV/e1- resolution) µsec minimum, µsec increments -5%/+10% operating, standby operating, standby 1/4" +65°C -40° +125°C
Sensitivity [2,3] Peak Quantum Efficiency [1,2,3] Saturation Voltage Full Well Capacity Conversion Gain Programmable Gain Range Fill Factor Exposure Control Supply Voltage Absolute Max. Power Supply Voltage Absolute Max. Input Voltage (any pin) Power Consumption (typical) Power Consumption (max) Optical Format Operating Temperature Storage Temperature Notes: Specified over complete pixel area Measured unity gain Measured Excludes dark current shot noise
HDCS Sensor Level Block Diagram
Image Array
Two-Wire Serial/ UART
Clock
Timing Controller
Programmable Amplifier
Programmable Amplifier
Programmable Amplifier
Analog Digital Converter
Sync/IRQ
8/10 Digital Output
HDCS-2020 Package Diagram
nRST_nSTBY SDATA_TxD SCLK_RxD AGND3
HDCS-1020 Package Diagram
nRST_nSTBY
IMODE0 IMODE1 nIRQ_nCC nFRAME_nSYNC AVDD1 AGND1 GND1 VDD1
SDATA_TxD
SCLK_RxD
DATA8
DATA9
AGND3 DATA0
DATA6
DATA7
nROW
PVDD
DATA7 AGND2 AVDD2 VDD3 GND3 DRDY DATA6
IMODE0 IMODE1 nIRQ_nCC nFRAME_nSYNC AVDD1 AGND1 GND1 VDD1
DATA5 AGND2 AVDD2 VDD3 GND3 DRDY DATA4
DATA3
DATA2
DATA1
VDD2
nTRISTATE
GND2
nROW
PVDD
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
VDD2
GND2
HDCS-2020 Description Pins
Signal Name
IMODE1 IMODE0 nRST_nSTBY Data Data Data Data DRDY SDATA_TxD SCLK_RxD nFRAME_nSYNC nROW nIRQ_nCC PVDD AVDD AGND
Type
Input Input Input Input Output Output Input/output open drain Input Output Output Output PVDD AVDD AGND
Description
Half duplex UART slave interface mode Synchronous serial slave interface mode Always System Clock Active system reset input stand-by mode input Parallel digitized pixel data Data valid parallel digitized pixel data Serial output data Transfer clock serial data input Signals frame Signals Programmable interrupt request Digital power supply Digital ground Array power supply Analog power supply Analog, array, substrate ground
HDCS-1020 Description Pins (Location)
Signal Name
IMODE1 IMODE0 nRST_nSTBY Data Data Data Data DRDY SDATA_TxD SCLK_RxD nFRAME_nSYNC nROW nIRQ_nCC PVDD AVDD AGND nTRISTATE
Type
Input Input Input Input Output Output Input/output open drain Input Output Output Output PVDD AVDD AGND Input
Description
Half duplex UART slave interface mode Synchronous serial slave interface mode Always System Clock Active system reset input stand-by mode input Parallel digitized pixel data Data valid parallel digitized pixel data Serial output data Transfer clock serial data input Signals frame Signals Programmable interrupt request Digital power supply Digital ground Array power supply Analog power supply Analog, array, substrate ground Disables sensor tristate mode connect
Packaging General Package Specs J-leads side) Package dimensions, optical center shown diagram below
1.65
13.36
1.955
4.120
optical center package center
1.735
2.37
2.67 HDCS-1020 3.340 4.127 HDCS-2020 3.082
14.80
13.80
13.60
13.00
12.365
12.165 2.00 0.25 Notes: Leadframe Plating: Ni-Pd-Au Dimension Tolerances: ±0.075 Leadframe Tolerances: ±0.2 1.02 11.56
1.65
1.175 3.80 2.23
www.semiconductor.agilent.com Data subject change. Copyright 2001 Agilent Technologies, Inc. February 2001 5988-2026EN

Specifications Features Available image array sizes: (640 480) (352 28

Top Searches for this datasheet

Other recent searches