task. reduce space, simplify manufacturing, reduce parts count, reduce

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MACROMODELS THAT SPEED SOFTWARE SIMULATION BECOME USEFUL PRE-BREADBOARDING TOOL
task. reduce space, simplify manufacturing, reduce parts count, reduce time market, designer often must look towards ASIC implementation. pressure integrate mounts especially when production volumes seen increase. that point, original prototype design done without consideration integration, complete redesign usually necessary. ASIC PROGRAM address situation mentioned above, Advanced Linear Devices (ALD) Sunnyvale, California embarked prong approach provide designer with inexpensive, common sensed tool that provides powerful mixed signal ASIC design environment while still providing component level design prototype parts shelf medium volume design. Essentially prototype volume solution with ease integration without redesign. First, provides design consisting predesigned prefabricated analog functional blocks that have been completely tested characterized, these parts standard parts, complete with characterization curves specifications. These analog functions only useful breadboarding functionality also useful determining potential second order effects that affect performance final system. question arises: these analog cell well designed engineered adequate this purpose, then sell these blocks standard product? Indeed that's exactly what done. They have made their standard packaged parts available standard cell integrated components. These products available packaged parts ASIC functional blocks. guarantees that their products fully compatible with each other same chip. These products, therefore available prototyping, volume manufacturing ASIC components. Second, also developed unique family macromodels, subcircuits, components that fitted their processing parameters. They designed compatible with PSPICE most other SPICE based circuit simulators. These macromodels have been developed specifically ease burden system designer when utilizing products board level design designing breadboard/prototype implementation. With these models, become practical simulate analog board level system personal computer. addition breadboard using actual components constructed. complexity most applications, utilizing hundreds transistors, macro-model approach allows designer simulate develop
INTRODUCTION today's analog systems become more sophisticated, complex precise, industrial, instrumentation, telecom automotive electronic control systems need perform more functions, becomes increasingly cost effective integrate components such amps, comparators, digital logic, etc. into single Application Specific While microelectronics technology have increased capability, also increasingly complex, expensive. become necessary have better faster engineering tools tackle these higher level design challenges, while decreasing time market. examining typical design process, design task usually starts conceptually with outline desired capabilities, specifications features system. After design concept been established, critical steps design process, namely prototype functional implementation evaluation requires that individual functional blocks specified, that individual components specifications evaluated their effect upon overall system performance. this level design that designer needs know quickly what functions, components, particular specifications suitable they effect system performance, able determine whether these components will perform function within required system specifications. Once these selections made, circuit design synthesized developed further. Finally, prototype breadboard constructed test design concept, gather data that unattainable otherwise facilitate further circuit evaluation. Changes, corrections, improvements clearly evaluated. order reconcile differences between design goal breadboard implementation, only functionality breadboard adequate, incompatibilities inconsistencies between various components must resolved. design task takes additional dimension when analog components used especially when such parameters tempco, offset voltages, offset currents, noise, gain, device matching, tracking voltages currents, power supply rejection ratio, common mode rejection ratio become important proper operation system. Integration these analog components into single custom monolithic while addressing these issues become daunt-
Tasman Drive Sunnyvale, 94089-1706
408.747.1155
408.747.1286
(E-mail) sales@aldinc.com
(Website) www.aldinc.com
system-on-a-chip using both software hardware tools, thus performing trial error experimentation personal workstation well bench. course, final design will only good what designer measure predict using simulation breadboard measurements. With simulation added design verification process, convergence upon design solution rapid. addition, this approach allows manufacturer possibility verify system through actual field tests, limited production, beta test sites, before committing expensive custom production. Actual chip level experimentation mask iteration only costly, systems increasingly complex, probability designer actually developing working ASIC system under time budget constraints diminishes. complex analog mixed analog digital system development intended ASIC implementation, ability inexpensively quickly design iterations measurements, whether computer station, breadboard, vital ultimate success project. course, ability both software hardware iteration produces desirable combination engineering analysis. certain situations, quick computer simulator verify circuit configuration that performs intended function. Unfortunately, nice, idealized graphs presented computer terminal always represent actual circuit behavior many analog systems full simulation with regard parametric behavior impractical impossible. other situations, such verify signal levels timing interface between ASIC other board components such transducers, "feel" adequacy analog signal, breadboard actual hardware simulator prove superior engineering tool. When pieces individual subcircuits simulated designed, time comes them together verify that they perform system. This time when designer needs engineering tools disposal. software simulators models assist spotting problems early hardware simulators real hardware help other problems show This prong approach circuit development eliminates redundant engineering effort when ASIC needs implemented later production cycle. design initially developed with this approach would need additional engineering effort when time integrate. More importantly, this approach most technical risks ASIC implementation because designer close feedback ability observe measure actual well simulated system. Thus often stated goal quick implementation onto ASIC chip easily handled need justification develops.
cuitry. Also available from proprietary library macromodels these specific analog parts developed standard SPICE circuit simulator such PSPICE, addition design manual that contains complete information useful hints provided. When working with kit, design simulate using ASIC library components breadboard these circuits with Advanced Linear Devices' standard parts. designer number analog cells from design configuration desired, later decide package pinout ASIC part. Since ALD's ASIC program semicustom standard cell approach, there rigid limitation many instances function block, pins, components even values used. Furthermore, digital logic such CD4000 family parts also used software simulator well hardware prototype. Many software circuit simulator suppliers already supply digital parts individual part numbers their digital library. These digital parts simulate logic performance say, CD4027 Dual Flip-Flop. developed functional equivalent digital cells computer library that will perform identical logical functions. custom prototype system designed around using these generic digital part types along with analog parts supplied readily implemented into ASIC with virtually performance differences. With this complete library digital functions such counters, encoders decoders, logic conversion necessary from standard part type implementation ASIC. digital circuit blocks ALD's digital library perform identical functions generic part types simulation library. Backgound macromodels operational amplifier modeled with detailed transistor level parameters circuitry five hours equivalent time based Pentium class personal computer each parametric iteration. With several amplifiers tens hundreds simulations with perhaps dozens parameters each requiring multiple passes order completely analyze optimize analog system design, analysis these systems readily overwhelm available computer resources. addition, many simulation induced problems tend creep using detailed transistor operational models. These problems include setting correct internal node conditions, non-convergence circuit simulation induced oscillation. analog simulation, where signal amplification, precision voltages feedback common circuit parameters, circuit behavior specific circuit block depend only transistor models simulators used, also user specified iteration limits tolerances. these limits improperly, circuit take hours converge, generate useless data, terminate abruptly middle simulation. integration complex ASIC where several complex functional blocks used, detailed transistor level simulation sim-
EASY ASIC BREADBOARDING ASIC Available from design that contains full analog parts such operational amplifiers, comparators, oscillators transistors that allow designer develop custom cir-
Tasman Drive Sunnyvale, 94089-1706
408.747.1155
408.747.1286
(E-mail) sales@aldinc.com
(Website) www.aldinc.com
impractical. macromodel that emulates behavior operational amplifier, other hand, simulated seconds. Macromodels have been developed purpose simulation function block while using minimum computer memory time still provide adequate functional emulation. These generally compositions simple idealized elements, opposed individual transistor level models, this reduces matrix variables that needs iterated computer station. These macromodels have been developed perform simulate function individual functional blocks. Ideal circuit elements like ideal voltage controlled current sources used emulate these amplifiers Also equations simulator emulate behavior operational amplifier. many cases, real difficulty using this approach stems from fact that real life operational amplifier "ideal" behavior. design engineer would attest, real life circuit have idiosyncrasies, behaviors capabilities that different from ideal, resulting unintended behavior. most noteworthy these differences incorporated into macromodel order better model actual behavior circuit. However, case second order effects like nonlinear parametric changes, where matrix equations even best macromodel accurately describe actual circuit behavior, user would well advised check circuit with breadboard after simulation completed. Notwithstanding these limitations, many applications first order macromodel prove adequate circuit analysis tool. These macromodels, when carefully engineered constructed, provide user with convenient intermediate step where analysis complexity goes beyond paper pencil, circuit function ready breadboard construction laboratory. Macromodels used simulators give quick first order trial analysis ability circuit configuration perform given task. user also working experience with actual part, developed intuition feel properly, then combination capabilities computer simulation breadboarding indeed powerful engineering tool indeed. ALD-simulation model libraries models designed support board level macro simulation such PSPICE simulation where packaged circuit elements such transistors, operational amplifiers, logic functions, counters, latches, gates used. These components that would normally circuit board prototype system. ASIC implementation, chip macromodels circuit elements should partitioned from other circuit elements. Partitioning system involves more than determining connection points between circuit elements that intended on-chip those that off-chip. supplies SPICE library designed ASIC integration that contains detailed SPICE circuit models analog integrated components like resistors, capacitors, diodes, transistors course major macro-models functional
blocks standard integratible parts. Once partition system made, into ASIC components, chip components, then simulation proposed ASIC done- including designers chip components. circuit elements used simulator divided into four major categories: analog standard part macromodels, ASIC element macromodels, digital function models standard vendor supplied PSPICE models. analog cell macromodels consists library macromodels standard parts including operational amplifiers, voltage comparators, timers, oscillators, voltage references transistors. These macromodels also used applications where ASIC implementation planned. ASIC element macromodels include diodes, transistors, zener diodes, input protection circuits, on-chip integrated resistors capacitors. These element models only needed where on-chip ASIC implementation these elements planned. Digital function models specifically standard CMOS logic family functions including, present, logic family only), logic family, CD4000 logic family 12V). These components their models widely available from variety sources. Users incorporate these functions into their simulator. these digital functions ASIC library ready ASIC implementation. Standard vendor supplied models models other circuit elements, such relay, microphone, piezoelectric crystal, I.C. that scope ASIC integratible library. PSPICE provides large selection generic parts composed various vendors. These circuit elements used with circuit simulator circuit breadboard would included ASIC chip.
Tasman Drive Sunnyvale, 94089-1706
408.747.1155
408.747.1286
(E-mail) sales@aldinc.com
(Website) www.aldinc.com

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