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Available Texas Instruments NanoStar NanoFree Packages Supports Operat
Top Searches for this datasheetSN74LVC2G32 DUAL 2-INPUT POSITIVE-OR GATE Available Texas Instruments NanoStar NanoFree Packages Supports Operation Inputs Accept Voltages Power Consumption, ±24-mA Output Drive Typical VOLP (Output Ground Bounce) <0.8 25°C Typical VOHV (Output Undershoot) 25°C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds JESD Class Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) PACKAGE (TOP VIEW) PACKAGE (BOTTOM VIEW) description/ordering information This dual 2-input positive-OR gate designed 1.65-V 5.5-V operation. SN74LVC2G32 performs Boolean function positive logic. NanoStar NanoFree package technology major breakthrough packaging concepts, using package. This device fully specified partial-power-down applications using Ioff. Ioff circuitry disables outputs, preventing damaging current backflow through device when powered down. ORDERING INFORMATION PACKAGE NanoStar WCSP (DSBGA) (Lead) -40°C 85°C NanoFree WCSP (DSBGA) (Lead-free) SSOP VSSOP Tape reel Tape reel Tape reel Tape reel ORDERABLE PART NUMBER SN74LVC2G32YEAR _CG_ SN74LVC2G32YZAR SN74LVC2G32DCTR SN74LVC2G32DCUR C32_ C32_ TOP-SIDE MARKING Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. DCT: actual top-side marking three additional characters that designate year, month, assembly/test site. DCU: actual top-side marking additional character that designates assembly/test site. YEA/YZA: actual top-side marking three preceding characters denote year, month, sequence code, following character designate assembly/test site. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. NanoStar NanoFree trademarks Texas Instruments. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. Copyright 2002, Texas Instruments Incorporated POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G32 DUAL 2-INPUT POSITIVE-OR GATE FUNCTION TABLE (each gate) INPUTS OUTPUT logic diagram (positive logic) absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Voltage range applied output high-impedance power-off state, (see Note -0.5 Voltage range applied output high state, (see Notes -0.5 Input clamp current, Output clamp current, Continuous output current, Continuous current through ±100 Package thermal impedance, (see Note package 220°C/W package 227°C/W YEA/YZA package 140°C/W Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input negative-voltage output voltage ratings exceeded input output current ratings observed. value provided recommended operating conditions table. package thermal impedance calculated accordance with JESD 51-7. POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G32 DUAL 2-INPUT POSITIVE-OR GATE recommended operating conditions (see Note Supply voltage Operating Data retention only 1.65 1.95 1.65 1.95 1.65 High-level output current 1.65 Low-level output current 0.15 Input transition rise fall rate 1.65 0.65 0.35 ns/V UNIT High-level High level input voltage Low-level level input voltage Input voltage Output voltage Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004. POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G32 DUAL 2-INPUT POSITIVE-OR GATE electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER -100 Ioff inputs GND, input Other inputs TEST CONDITIONS 1.65 1.65 1.65 1.65 1.65 VCC-0.1 0.45 0.55 0.55 UNIT typical values 25°C. switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure PARAMETER FROM (INPUT) (OUTPUT) 0.15 UNIT operating characteristics, 25°C PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G32 DUAL 2-INPUT POSITIVE-OR GATE PARAMETER MEASUREMENT INFORMATION VLOAD Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD From Output Under Test (see Note LOAD CIRCUIT INPUTS 0.15 tr/tf VCC/2 VCC/2 VCC/2 VLOAD 0.15 0.15 Timing Input Input VOLTAGE WAVEFORMS PULSE DURATION Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS Output Waveform (see Note Output Control tPZL tPZH Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES tPLZ VLOAD/2 tPHZ Output Waveform VLOAD (see Note VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with transition measurement. tPLZ tPHZ same tdis. tPZL tPZH same ten. tPLH tPHL same tpd. parameters waveforms applicable devices. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. 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Reproduction this information with alteration unfair deceptive business practice. responsible liable such altered documentation. Resale products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service unfair deceptive business practice. responsible liable such statements. Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265 Copyright 2002, Texas Instruments Incorporated Other recent searchesTDAT021G2 - TDAT021G2 TDAT021G2 Datasheet STP16CP596 - STP16CP596 STP16CP596 Datasheet SA1469TN - SA1469TN SA1469TN Datasheet NR3470MU-CC - NR3470MU-CC NR3470MU-CC Datasheet HD64336057GFP - HD64336057GFP HD64336057GFP Datasheet CTNFM21CC - CTNFM21CC CTNFM21CC Datasheet 74LCX16244 - 74LCX16244 74LCX16244 Datasheet
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