Multi Frequency Contactless Identification Device Anti-Collision
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P4022
Multi Frequency Contactless Identification Device
Anti-Collision compatible with BTG's Supertag Category Protocols Features
Typical Applications
Implements anti-collision protocols: Fast SWITCH-OFF, SLOW-DOWN, FREE-RUNNING used implement frequency inductive coupled transponders, high frequency coupled transponders bi-frequency transponders Reading transponders less than second high frequency applications Factory programmed number Data rate options form kbit/s kbit/s Manchester data encoding field frequency: Typically kHz, 13.56 inductive 2.54 Data transmission done amplitude modulation Trimmed on-chip resonant capacitor On-chip oscillator, rectifier voltage limiter power consumption voltage operation down ambient temperature operating temperature range
Access control Animal tagging Asset control Sports event timing Licensing Electronic keys Auto-tolling
Assignment
Fig. Name
XCLK MTST COIL1 COIL2 VSSTST
Function
external test clock input positive supply connection antenna test output Coil terminal Coil terminal negative test supply output negative supply input Serial test data input (pull down) Test mode control (pull down)
Description
P4022 chip implements patented anti-collision protocols both high frequency frequency applications. even possible identify transponders with identical codes, thereby making possible count identical items. chip typically used "passive" transponder applications, i.e. does require battery power source. Instead, powered electromagnetic energy field beam transmitted reader, which received rectified generate supply voltage chip. pre-programmed code transmitted reader varying amount energy that reflected back reader. This done modulating antenna coil, thereby effectively varying load seen reader.
Table
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P4022
Typical Operating Configurations
frequency inductive transponder
COIL1 COIL2
P4022
Medium frequency applications those which cannot integrated full wave rectifier where transponder power transmitted through coil. External microwave schottky diodes required rectify carrier wave. external power storage capacitor added improve reading range. These applications allow higher data rates kbit/s). Where reading rates transponders second achieved High frequency transponder implementation.
Fig. frequency applications those applications that make on-chip full wave rectifier bridge rectify incident energy. These typically applications that inductive coupling transmit energy chip. carrier frequency typically less than kHz. design onchip rectifier resonance capacitor optimized frequencies order kHz. frequency transponders implemented using just P4022 chip external coil that resonates with on-chip tuning capacitor required carrier frequency. external power storage capacitor required maintain supply voltage above integrated power reset level. very strong field, forward resistance diode, input must limited VSS0.3V schottky diode (D1) Medium frequency (13.56 MHz) inductive transponder implementation
COIL1
P4022
COIL2
Fig. figure optional only used enable versions. diodes schottky type. High frequency applications similar medium frequency applications. These typically applications that electromagnetic coupling transmit energy chip using carrier frequencies greater than MHz. High frequency transponders implemented using P4022 chip, three microwave diodes printed antenna. High frequency coupled applications typically have higher reading distances
P4022
Bi-frequency applications possible implementing coil between coil1 coil2 connections high frequency application (fig.
Fig. coil antenna (typical value 1.35 µH). tuning capacitor (typical value
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P4022
Absolute Maximum Ratings
Parameter Symbol Maximum peak current COIL induced COIL1 COIL2 Maximum voltage induced between
Handling Procedures
Conditions -0.3 +125 1000
Maximum current supplied into Power supply Max. voltage other pads Min. voltage other pads Storage temperature Electrostatic discharge maximum MIL-STD-883C method 3015
whatever reached first
Vmax Vmax TSTORE VESD
This device built-in protection against high static voltages electric fields; however, unique properties this device, anti-static precautions should taken other CMOS component. Unless otherwise specified, proper operation only occur when terminal voltages kept within supply voltage range.
Operating Conditions
Parameter Operating temperature Maximum coil current voltage coil* voltage Symbol ICOIL VCOIL Units
Table Stresses above these listed maximum ratings cause permanent damage device. Exposure beyond specified operating conditions affect device reliability cause malfunction.
Table voltage coil voltage limited on-chip shunt regulator loaded ICOIL table
Electrical Characteristics
Parameter Supply voltage (VDD VSS) Regulated voltage Oscillator frequency Power-on reset threshold Power-on reset threshold Power-on reset hysteresis input time constant Modulation transistor resistance Resonance capacitor Supply capacitor Current consumption modulation state Shunt Regulator current consumption pull-up current consumption Dynamic current consumption
VSUPPLY between unless otherwise specified.
Symbol VSUPPLY FOSC VPONR VPONF VPHYS TGAP CSUP IMOD ISHUNT IGAP IDYN Test conditions VSUPPLY VSUPPLY rising VSUPPLY falling Extrapolated with external capacitor 64nF VSUPPLY 100KHz, 100mVpp 100KHz, 100mVpp VSUPPLY VSUPPLY VGAP VSUPPLY fOSC 128KHz, VSUPPLY VPONR +100mV Units 113.3
106.7
Table
Timing Characteristics
timings derived from on-chip oscillator. minimum frequency width single chip clock frequency. reader must however allow spread clock frequencies possible group tags. Therefore minimum width MUTE WAKE-UP signals must bits. High frequency GAPs arbitrarily. maximum width single chip bits clock frequency. reader must however allow spread clock frequencies possible group tags. Therefore maximum width MUTE WAKE-UP signals must bits.
Parameter High frequency width High frequency width High frequency MUTE WAKE-UP width frequency width frequency MUTE WAKE-UP width separation WAKE-UP signal Symbol Test conditions THFGAP HFACK HFMUTE LFGAP LFACK LFMUTE Units
Table
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P4022
Power storage capacitor calculation
global current consumption device defines external storage capacitor. When device modulate, supply voltage picked from supply capacitor should never decrease under falling edge power reset (VPONF). this occurs, device goes reset mode data transmission aborted. worst case storage capacitor calculation when device electromagnetic field. this moment supply reaches VPONR start modulate. During modulation power store capacitor must high enough that modulation supply higher than VPORF. This means that voltage reduction capacitor must less than hysteresis power reset (VPHYS). this when chip supply voltage around power reset threshold total current consumption from storage capacitor defined modulation current IMOD, This current consumption power reset block, oscillator logic which work typical frequency 125KHz. current also included this parameter. duration where this currents present capacitor calculation, dependent data rate
VPHYS IMOD Data rate KBaud.
Calculation example Below define typical cases combinations FOSC
FOSC *VHYS BaudRate
14.4nF
course, this value adapted electromagnetic power performances that must achieved. field within short time, emitting power must high enough charge capacitor. chip integrates 140pF supply capacitor.
Block Diagram
COIL1
LOGIC
Shunt
COIL2
XCLK
Fig.
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P4022
Functional description
Resonance capacitor resonance capacitor nominal value trimmed achieving high stability over whole production. resonance external 14.7 coil required. 13.65 required coil inductance drops Rectifier bridge Diodes D1-D4 form full wave rectifier bridge. They have relatively large forward resistances (100 This sufficient kHz, where output impedance tuned circuit high, 13.5 diode resistance becomes significant external diodes have used bypass internal ones. diode resistance affects rate which power capacitor charged. also affects modulation depth that achieved. Shunt regulator shunt regulator functions. limits voltage across logic high frequency applications limits voltage across external microwave Schottky diodes, which typically have reverse breakdown voltages Oscillator on-chip oscillator center frequency kHz. gives main clock logic defines effective data/rate. Power-on reset (PON) reset signal keeps logic reset when supply voltage lower than threshold voltage. This prevents incorrect operation spurious transmissions when supply voltage oscillator logic work properly. also ensures that transistor transistor during power-up ensure that chip starts Modulation transistor channel transistor used modulate transponder coil antenna. When turned loads antenna coil, thereby changing load seen reader antenna coil, effectively changing amount energy that reflected reader. resistance especially designed high frequency applications. Charge preservation transistor channel transistor turned whenever modulation transistor turned prevent from discharging power storage capacitor. This done non-overlapping manner, i.e. first turned before turned turned before turned detection Poly-silicon diode used detect illuminating field. minimum sized diode with forward resistance order k.==The pass filter shown diagrammatically actually consists pull-up transistor (approximately conjunction with parasitic capacitance input (approximately pF). Through diode input will pulled during each negative going cycle carrier. When carrier switched off, input will pulled high pull-up transistor. very high carrier frequencies MHz) carrier will filtered out, that input will continuously when carrier present. When carrier disappears, input will high with time constant pass filter. very frequencies input will high each cycle carrier, will stay high when carrier disappears. detect gap, logic must check high period longer than maximum high period carrier. rise fall times slow, Schmitt trigger used buffer input. LOGIC block Depending state input power-up, P4022 either enters test mode normal operating mode internally pulled down, that left open normal operation.
After power-on reset disappeared, chip boots reading SEED ROMs. chip then enters normal operating mode, which basically consists clocking timer counter with rate clock until compares with number random number generator. this point code (which stored ROM) transmitted with correct preamble correct data rate encoded correctly. random number generator clocked generate pseudo random number, counter reset start delay. width comparison between random number delay count determines maximum possible delay between transmissions (repetition rate). eight maximum delay settings pre-programmed. basic free-running mode described above modified reception (MUTE ACK) signals, these enabled bits. signal received after transmission code, chip either turns itself completely reduces rate which delay counter clocked, thereby slowing down rate which codes transmitted. MUTE signal received while chip transmitting, current operation chip
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interrupted clock periods, after which continues normally. Reception more MUTEs during sleep state restarts sleep state. sleep state also terminated reception WAKE-UP signal signal chip which just completed transmitting).
timing diagram
timing Clock Data
Fig.
Detection Algorithm detection logic contains main controllers, detecting signal, detecting MUTE WAKE-UP signals. WAKE-UP signal also called asynchronous ACK, really meant another chip. also contains pre-processor frequency signals. Refer timing diagrams Figure following detailed description detection algorithms. controller checks 1.75 periods after last code been transmitted. then checks HIGH bits later, bits later finally HIGH further bits later. reader should synchronise itself frequency received code, check then send GAPs that above pattern matched. Ideally achieve lowest error rate, GAPS should narrow possible situated 4.75 7.75 bits after last code. practice allowance must made fact that on-chip oscillator drift time between when last code transmitted when GAPs expected. reason drift that oscillator supply voltage dependent, supply voltage will typically rising during this time, since transponder will modulating coil antenna. slope rising falling edges GAPs also adjusted reduce reader power bandwidth. case high frequency GAPs envelope used directly. frequency GAPs have pre-processed. They detected checking high periods lasting longer than
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period. this reason there set-up time bit. minimum width therefore period timing diagram).
MUTE MUTE signal received asynchronously transponder. controller checks HIGH less than bits wide after pre-processing timing diagram). case ACK, frequency MUTE GAPs must least wide timing diagram), high frequency GAPs arbitrarily narrow. When transmitting MUTE, reader must take into account that there could spread clock frequencies receiving transponders. reader should therefor limit width MUTE less than bits nominal rate timing diagram). frequency MUTE should also wider than bits nominal rate timing diagram). MUTE should sent early possible after code transmission been detected, while still making sure that code transmission just noise. earlier MUTE sent, more time reader recover before SYNCH code bits arrive, smaller probability that another transponder started colliding transmission
P4022
MUTE WAKE-UP timing diagrams
Fig.
WAKE-UP sent after correct reception code interpreted other transponders field WAKE-UP. arrives synchronously transponder that just transmitted, asynchronously other transponders. necessary, WAKE-UP also sent code received correctly, ensuring that will interpreted transmitting transponder. This could speed protocol, runs risk turning transponders accident. detect WAKE-UP, chip checks GAPs, less than bits apart each less than seven bits wide. with MUTE allowance must made spread clock frequencies. safely interpreted WAKE-UP, GAPs should sent less than bits apart, each should less than bits wide.
This implication case high frequency ACK, which could theoretically consist very narrow GAPs bits apart. practice though, GAPs will typically least wide, making separation five bits.
Like MUTE, frequency GAPs should least bits wide serve reliable WAKE-UP. should noted that failure reliably recognise WAKE-UPs critical. protocol might slowed down marginally, will still work, chips time-out sleep mode automatically after bits.
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P4022
Data Encoder transmitted code always consists preamble followed code bits. preamble consists start bits (ZEROES), followed SYNCH. SYNCH consists periods followed ONE. P4022 programmed data encoding methods. first method variation Manchester i.e. represented HIGH first half period, ZERO represented first half period. Data Encoding
second encoding method called GLITCH encoding. represented HIGH first quarter period, while ZERO represented HIGH third quarter period. GLITCH encoding longest modulation period quarter period, compared Manchester encoding, where longest modulation period full period. GLITCH encoding therefore requires much smaller power storage capacitor.
programming P4022 contains three laser fuse blocks that pre-programmed foundry. CODE This contains code. foundry will automatically program unique CRC. this case most significant programmed into ROM, which will transmitted first. Control
Byte[1]
Fig. CONTROL operational modes P4022 preprogrammed into CONTROL ROM. contents this read out.
Manchester
Data rate
Byte[0]
Random delay
Fast
Switch- Freeoff running
Table
Block Diagram
Feedback before shift Exclusive Shift Register Data Input
CRC-CCITT Generating polynomial Fig.
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P4022
Control definition
Parameter Value Fast Normal Mode Free-running mode Maximum initial random delay Data rate Encoding method type Mode Normal Fast detection enabled disabled (Free-running) Slow-down Switch-off (Continuous) bits bits bits kbits kbits kbits kbits kbit/s kbit/s kbit/s kbit/s kbit/s kbit/s kbit/s kbit/s Glitch encoding Manchester encoding frequency detection High frequency detection
Table
Anti-collision Protocol Overview protocols collection simple fast reliable anti-collision protocols. They allow fast reading large numbers transponders simultaneously using single reader. even possible identify transponders with identical codes, thereby making possible count identical items.
Free-running protocol basis BTG-Supertag series protocols that transponders transmit their codes random times reader. just listening recording unique codes when they received, reader eventually detect every tag. reader detects collisions typically checking CRC.
This basic protocol known "Free-running" protocol. requires uniquely coded tags. main advantage that reader design simple, spectrum requirement much less very narrow band required. Figure shows sequence three transponders. reader starts first read transponder during data transmission, transponder starts modulate. this case, check transponder detected. transponder taken into account, transmits complete data stream without disturbance
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P4022
Free running example
Transponder Transponder Transponder Data stream ccollision Data stream detected
Fig.
Bi-directional protocols Allowing bi-directional communication between reader transponders speed basic free-running protocol. Communication from reader transponders achieved turning illuminating energy field short periods. transponders detect these gaps energy transmission interpret them required. Switch-off Slow-down Modes Reducing effective population transmitting transponders reader field speed free-running protocol. method achieve this either switching transponders slowing them down once they have been detected. achieve this, reader sends signal transponder after code been successfully received. transponder then either switches completely reduces repeat rate until powered down. This reduces number collisions between transponder transmissions, thereby reducing time required read group tags. Figure shows typical situation where collision occurs between transponder Then, soon transponder read, reader sends signal this switching long powered from field. This eliminates collision between transponder next step Switch-off protocol's main advantage that identical transponders counted.
P4022 signal implemented consecutive gaps with appropriate timing received specific time after code been transmitted. slow-down mode compromise between free-running mode switch-off mode. Etch time transponder read, reader send double random repetition rate. This reduces collisions time increases saturation level. Figure show typical case this mode operation.
Fast Mode second method speeding reading tags, inhibit other transponders from transmitting while transponder transmitting. This done sending MUTE signal transponders when start transmission detected. transponders stay muted long enough (128 clock) allow transmission code (see figure 13). This allows transponder that started transmitting complete transmission without collisions. other transponders continue with their protocols automatically after time out, continue immediately upon detection signal indicating that transmission that caused MUTE been completed. P4022 MUTE signal implemented single received while transponder transmitting.
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P4022
Switch-off example
Transponder Transponder Transponder Reader field Data stream collision Transponder switched Transponder detected
Fig.
Slow-down example
Transponder Transponder Transponder Reader field Data stream collision Transponder detected
Fig.
Fast mode example
Transponder Transponder Transponder Reader field shift Transponder detected
Fig.
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P4022
Protocol combinations free-running basic bi-directional protocols, switch-off slow-down, combined with Fast protocol give different protocols, i.e. Normal free-running, slow-down, Normal switch-off, Fast free-running, slow-down, Fast switch-off. following should noted about different protocols: switch-off protocols must used counting applications. protocols except switch-off protocols have built redundancy because fact that they transmit code more than once. Normal free-running only unidirectional protocol. lowest power spectrum requirement because reader transmits wave. Fast switch-off Fast slow-down fastest protocols, should used where speed important, where data rate limits reading rate. Fast slow-down slightly slower, theoretically lower error rate. inductive applications using kbit/s data rate, Fast slow-down probably best overall protocol. applications using kbit/s data rate, normal free-running protocol probably best protocol. Reader determined protocols reader does send MUTE signals transponders that were programmed FAST protocols, protocol merely reverts equivalent normal protocol. Similarly, reader does send signals transponders that were programmed SLOW-DOWN SWITCHOFF, protocol reverts FREE-RUNNING protocol. this manner, reader determine protocol that used.
Note, however, that unless transponder specifically programmed free-running protocol, input must pulled down. This happens automatically frequency inductive applications, where input pulled down internal detector diode. applications, however, input will have pulled down explicitly.
Protocol saturation number transponders reader beam increased, number collisions increase, takes longer read tags. This process linear. read twice many transponders could take more than twice long. This effect called protocol saturation. normal free-running protocol saturates easiest protocols, because does have means reducing transmitting population. Fast protocols, other hand, virtually immune against saturation, they prevent collisions muting transponders except transmitting one. delaying onset saturation, reduce initial repeat rate (not data rate) which transponders transmit their codes. This done increasing maximum random delay between transmissions. Figure below show's reading times some possible versions Optimum repeat delay settings Table lists optimum repeat delay settings each protocols number transponders group. Protocol
Free-running Slow-down Switch-off Fast Free-running Fast Slow-down Fast Switch-off
Number transponders Table
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P4022
Reading time versus quantities transponders protocol (4Kbauds)
Reading time
versions
Number tags 1000
Fig.
Reading time versus quantities transponders protocol (64Kbauds)
reading time
versions
0.01 Number transponders 1000
Fig.
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Chip Packaging Information
Chip size
Location
Fig.
location table with reference center
[µm] [µm] 1037 1200 1324 1324 1324 1324 Test inputs outputs must left open. size [µm] 98/98 98/98 98/98 98/98 175/98 175/98 98/98 98/98 98/98 98/98 98/98 name
XCLK MTST COIL1 COIL2 VSSTST
Function
external test clock input positive supply connection antenna test output Coil terminal Coil terminal negative test supply output negative supply input Serial test data input (pull down) Test mode control (pull down)
Table
Ordering information samples versions
Version name Data Rate Protocol Free-Running Slow down Switch Fast Free-Running Fast Slow down Fast Switch Free-Running Slow down Switch Fast Free-Running Fast Slow Fast Switch Random value Continuous 4096 4096 Continuous 1024 1024 Continuous 4096 4096 Continuous 4096 4096 Ordering form P4022 P4022 P4022 P4022 P4022 P4022 P4022 P4022 P4022 P4022 P4022 P4022 Table
production versions, customer must define their options with control definition (page 9-10). Using this information, Microelectronic Marin S.A. will define version number ordering.
Microelectronic-Marin cannot assume responsibility circuitry described other than entirely embodied Microelectronic-Marin product. Microelectronic-Marin reserves right change circuitry specifications without notice time. strongly urged ensure that information given been superseded more date version.
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