USER'S EM73A00 MANUAL 4-Bit Microcontroller ELAN MICROE

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USER'S EM73A00 MANUAL 4-Bit Microcontroller ELAN MICROE

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ELAN MICROELECTRONICS CORPORATION
USER'S EM73A00 MANUAL
4-Bit
Microcontroller
ELAN MICROELECTRONICS CORPORATION
Hsinchu Headquarters Hong Kong Office
Innovation Road Science-based Industrial Park, HsinChu, Taiwan, Phone +886 563-9977 +886 563-9966 http://www.emc.com.tw
1005B, 10/F., Empire Centre, Mody Road., Tsimshatsui, Kowloon, Hong Kong Phone +852 2723-3376 +852 2723-7780
Trademark Acknowledgments
registered trademark PS/2 trademark IBM. Microsoft, MS-DOS, Windows registered trademarks Microsoft Corporation.
©2002 ELAN MICROELECTRONICS CORPORATION Rights Reserved Printed Taiwan, 6/2000
material this manual subject change without notice. ELAN MICROELECTRONICS assumes responsibility errors that appear this manual. ELAN MICROELECTRONICS makes commitment update, keep current, information contained this manual. software described this manual furnished under license nondisclosure agreement, used copied only accordance with terms agreement. part this manual reproduced transmitted form means without express written permission ELAN MICROELECTRONICS.
INTRODUCTION OVERVIEW FEATURES FUNCTIONAL BLOCK DIAGRAM ASSIGNMENTS DIAGRAM DESCRIPTIONS INSTRUCTION OVERVIEW 1.7.1 Data Transfer.13 1.7.2 Rotate.13 1.7.3 Arithmetic Operation 1.7.4 Logical Operation.14 1.7.5 Exchange 1.7.6 Branch 1.7.7 Compare 1.7.8 Manipulation.15 1.7.9 Subroutine.16 1.7.10 Input/Output.16 1.7.11 Flag Manipulation 1.7.12 Interrupt Control 1.7.13 Control.17 1.7.14 Timer/Counter, Data Pointer, Stack Pointer Control NOTATION CONVENTIONS PROGRAMMING MODEL.19 PROGRAM (24K 8BITS) EM73A00 2.1.1 User's Program Fixed Data DATA 128-NIBBLE ).23 2.2.1 Zero Page 2.2.2 Stack.24 2.2.3 Data Area 2.2.4 Address Mode PROGRAM COUNTER (24K ROM) EM73A00.25 2.3.1 Branch Instruction 2.3.2 JUMP instruction.25 2.3.3 Subroutine Instruction 2.3.4 Interrupt Acceptance Operation 2.3.5 Interrupt Return Operation.26 2.3.6 Reset Operation 2.3.7 Other Operations SIGNAL FUNCTION DESCRIPTIONS ACCUMULATOR (ACC) FLAGS 3.2.1 Carry Flag (CF).27 3.2.2 Zero Flag (ZF).28 3.2.3 Status Flag (SF).28 3.2.4 Examples.28
EM73A00 User's Manual Introduction
3.3.1 Structure 3.3.2 Supported Functions REGISTER 3.4.1 Register Function STACK POINTER (SP).31 DATA POINTER (DP).32 RESET FUNCTION TYPE CIRCUITY DIAGRAMS TYPE CIRCUITRY DIAGRAMS 4.1.1 Reset Type 4.1.2 Oscillation Types.33 4.1.3 Input Types 4.1.4 Types 4.1.5 Bi-direction Program Controlling.35 EM73A00 PORT DESCRIPTIONS CLOCK TIMING OVERVIEW CLOCK TIMING GENERATOR 5.2.1 Clock Timing Generator Structure 5.2.2 Clock Timing Generator Function.38 INTERNAL TIME BASE 5.3.1 Time Base Interrupt (TBI ).39 TIMER/COUNTER 5.4.1 Counter Function.40 5.4.2 Timer Function INTERRUPT POWER SAVING FUNCTIONS OVERVIEW INTERRUPT FUNCTION 6.2.1 Interrupt Structure 6.2.2 Interrupt Operation POWER SAVING (OFF SLEEP) FUNCTION 6.3.1 Sleep Control 6.3.2 Sleep Conditions 6.3.3 Release Condition 6.3.4 Edge Off/Sleep Mode:.47 MISCELLANEOUS FUNCTION OVERVIEW REMOTE CONTROL SIGNAL OUTPUT PORT VOLTAGE DETECTOR WATCH TIMER OVERVIEW ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS.51
ELECTRICAL PROPERTIES
EM73A00 User's Manual
Introduction
Chapter
Introduction
Overview
EM73A00 advanced single chip CMOS 4-bit microcontroller. contains 24K-byte ROM, 128-nibble RAM, 4-bit ALU, 16-level subroutine nesting, 13-bit programmable counter, 8-bit watchdog timer, 13-bit programmable timer chip.
Features
gate CMOS process power consumption Single power supply 1.6V 5.5V. High-speed operation 4MHz max. capacity capacity bits input port O/P: bits output port I/O: bits bi-direction port Programmable counter timer Built-in watchdog timer voltage detector Subroutine nesting Standby function Instruction execution time @4MHz Packaging chip form EM73A00H, 28-pin EM73A00AM, 28-pin TSSOP EM73A00BM carrier wave output port remote controller
EM73A00 User's Manual Introduction
24576 bits. bits.
Built-in time base counter stages.
levels.
Interrupt Three (Internal)
Functional Block Diagram
figure below illustrates simplified block diagram EM73A00 followed assignments description. RESET XOUT
Reset Control
Clock Generator
Timing Generator
Sleep Mode Control
System Control Data pointer Stack pointer Time Base bits timer bits counter Data Flag
P0.0/WAKEUP0
Instruction Decoder Interrupt Control Instruction Registor
Stack
Control
P0.1/WAKEUP1 P0.2/WAKEUP2 P0.3/WAKEUP3
WAKEUP/P4.0~P4.3
P5.0~P5.3
P6.0~P6.3
P7.0~P7.3
P1.1
EM73A00 User's Manual
Introduction
Assignments
TEST XOUT RESET view
Physical Dimension SOP28
DETAIL"A" (4X)
DETAIL
EM73A00 User's Manual
Introduction
Symbol
Dimension mils 12.5
Dimension 2.337 0.102 0.991 0.330 0.229 17.704 7.392 10.008 0.406 1.041 0.406 0.254 17.907 7.493 1.270 10.414 2.692 0.305 1.092 0.508 0.318 18.110 7.595 10.643 1.27
Physical Dimension TSSOP28
EM73A00 User's Manual
Introduction
Symbol
0.05 0.80 0.19 0.09 9.60
Normal 0.10 1.00 9.70 6.40
1.20 0.15 1.05 0.30 0.20 9.80
4.30
4.40 0.65
4.50
0.45
0.60
0.75
EM73A00 User's Manual
Introduction
Diagram
P6.1 P6.2 P6.3 P1.1 P1.0 TEST EM73A00
(0,0)
EM73A00 User's Manual
P6.0
XOUT
P5.3
P5.2
P5.1 /RESET
P5.0 P7.0
P4.3 P7.1
P4.2 P4.1 P4.0 P0.3 P0.2 P0.1 P0.0 P7.2 P7.3
Introduction
Symbol P5.2 P5.3 P6.0 P6.1 P6.2 P6.3 P1.1 P1.0 TEST XOUT /RESET P7.0 P7.1 P7.2 P7.3 P0.0 P0.1 P0.2 P0.3 P4.0 P4.1 P4.2 P4.3 P5.0 P5.1
-202.7 -374.5 -546.3 -718.1 -735.0 -735.0 -735.0 -735.0 -735.0 -735.0 -545.3 -373.5 -194.0 30.8 202.6 374.4 546.2 718.0 735.0 735.0 735.0 735.0 735.0 735.0 484.5 312.7 140.9 -30.9
775.0 775.0 775.0 775.0 548.5 376.7 204.9 33.1 -157.0 -381.8 -775.0 -775.0 -775.0 -775.0 -775.0 -775.0 -775.0 -775.0 -102.6 69.2 241.0 412.8 584.6 756.4 775.0 775.0 775.0 775.0
Chip size 1770 1850 layout, substrate must floated connected Vss.
EM73A00 User's Manual
Introduction
Descriptions
Symbol
TEST RESET OSCin XOUT P7(0.3) P1.1 P0(0.3) P4(0.3) P5(0.3) P6(0.3)
Pin-Type
RESET-A OSC-A OSC-A I/O-RMO
Function
Power supply Power supply Test pin, high active System reset input signal, active Crystal connecting Crystal connecting Remote control signal output terminal 4-bit bi-direction port 1-bit bi-direction port
Mask Options
Pull-down resistor Pull-up resistor voltage detector enable Crystal type Output open-drain push-pull Input pull-up resistor none Pull-up/pull-down resistor Wakeup Pull-up/pull-down resistor Wakeup Push-pull open-drain Push-pull open-drain
Input Input
4-bit input port 4-bit input port output port output port
EM73A00 User's Manual
Introduction
Instruction Overview
instruction optimized support those instructions most commonly used executed.
1.7.1 Data Transfer
Flag Mnemonic
LDAM LDAX LDAXI LDHL LDIA STAM STAMD STAMI #k,y STDMI
Object Code (Binary)
0110 1010 xxxx xxxx 0101 1010 0110 0101 0110 0111 1001 kkkk 0100 1110 xxxx xxx0 1101 kkkk 1000 kkkk 0110 1001 xxxx xxxx 0101 1001 0111 1101 0111 1111 0100 1000 kkkk yyyy 1010 kkkk 0111 0110 0111 0100
Operation Description
AccRAM[x] AccRAM[HL] AccROM[DP]L AccROM[DP]H, DP+1 LRRAM[x],HRRAM[x+1] Acck RAM[x]Acc RAM[HL]Acc RAM[HL]Acc, LR-1 RAM[HL] Acc, RAM[y]k RAM[HL]k, AccHR AccLR
Byte
Cycle
1.7.2 Rotate
Flag Mnemonic
RLCA RRCA
Object Code (Binary)
0101 0000 0101 0001
Operation Description
[CFAcc] [CFAcc]
Byte
Cycle
1.7.3 Arithmetic Operation
Flag Mnemonic
ADCAM ADDA ADDAM EM73A00 User's Manual
Object Code (Binary)
0111 0000
Operation Description
AccAcc RAM[HL] RAM[y]RAM[y] AccAcc AccAcc RAM[HL]
Byte
Cycle
#k,y 0100 1001 kkkk yyyy 0110 1110 0101 kkkk 0111 0001
Introduction
ADDH ADDL DECA DECL DECM INCA INCL INCM SUBA SBCAM SUBM
0110 1110 1001 kkkk 0110 1110 0001 kkkk 0110 1110 1101 kkkk 0101 1100 0111 1100 0101 1101 0101 1110 0111 1110 0101 1111
HRHR LRLR RAM[HL]RAM[HL] AccAcc-1 LRLR-1 RAM[HL]RAM[HL] AccAcc LRLR RAM[HL]RAM[HL]+1 Acck-Acc AccRAM[HLl RAM[HL]k RAM[HL]
ADDM
0110 1110 0111 kkkk 0111 0010 0110 1110 1111 kkkk
1.7.4 Logical Operation
Flag Mnemonic
ANDA ANDAM ANDM ORAM XORAM
Object Code (Binary)
0110 1110 0110 kkkk 0111 1011 0110 1110 1110 kkkk 0110 1110 0100 kkkk 0111 1000 0110 1110 1100 kkkk 0111 1001
Operation Description
AccAcc&k AccAcc RAM[HL] RAM[HL]RAM[HL]&k AccAcc AccAcc RAM[HL] RAM[HL]RAM[HL] AccAcc^RAM[HL]
Byte
Cycle
1.7.5 Exchange
Flag Mnemonic
EXAH EXAL EXAM EXHL
Object Code (Binary)
0110 1000 xxxx xxxx 0110 0110 0110 0100 0101 1000 0100 1100 xxxx xxx0
Operation Description
AccRAM[x] AccHR AccLR AccRAM[HL] LRRAM[x],HRRAM[x+1]
Byte
Cycle
EM73A00 User's Manual
Introduction
1.7.6 Branch
Flag Mnemonic
Object Code (Binary)
000a aaaa aaaa aaaa 0100 0110
Operation Description
SF=1 than Else null RAM[HL+3],RAM[HL +2],RAM[HL+1],RAM[HL]
Byte
Cycle
1.7.7 Compare
Flag Mnemonic
CMPA CMPAM CMPH CMPL CMPIA #k,y
Object Code (Binary)
0100 1011 kkkk yyyy 0110 1011 xxxx xxxx 0111 0011 0110 1110 1011 kkkk 1011 kkkk 0110 1110 0011 kkkk
Operation Description
k-RAM[y] RAM[x]-Acc RAM[HL] k-LR
Byte
Cycle
1.7.8 Manipulation
Flag Mnemonic
CLPL SEPL TFPL
Object Code (Binary)
1111 00bb 0110 1101 11bb pppp 0110 0000 0110 1100 11bb yyyy 1111 01bb 0110 1101 01bb pppp 0110 0010 0110 1100 01bb yyyy 0110 1100 00bb yyyy 1111 10bb 1111 11bb 0110 1101 00bb pppp 0110 0001 0110 1100 10bb yyyy 0110 1101 10bb pppp
Operation Description
RAM[HL]b0 PORT[p]b0 PORT[LR3-2+4]LR1-00 RAM[y]b0 RAM[HL]b1 PORT[p]b1 PORT[LR3-2+4] LR1-01 RAM[y]b1 SFRAM[y]b' SFAccb' SFRAM[HL]b' SFPORT[p]b' SFPORT[LR LR1-0' SFRAM[y]b SFPORT[p]b
Byte
Cycle
EM73A00 User's Manual
Introduction
1.7.9 Subroutine
Flag Mnemonic
LCALL SCALL
Object Code (Binary)
001a aaaa aaaa aaaa 1110 nnnn
Operation Description
SPSP STACK[SP]PC, SPSP PCa, =1~15) STACK[SP]PC, PCSTACK[SP], SP=SP
Byte
Cycle
0100 1111
1.7.10 Input/Output
Flag Mnemonic
OUTA
Object Code (Binary)
0110 1111 0100 pppp 0110 1111 1100 pppp 0100 1010 kkkk pppp 0110 1111 000p pppp 0110 1111 100p pppp
Operation Description
AccPORT[p] RAM[HL]PORT[p] PORT[p]k PORT[p]Acc PORT[p]RAM[HL]
Byte
Cycle
#k,p
1.7.11 Flag Manipulation
Mnemonic
TFCFC TTCFS
Object Code (Binary)
0101 0011 0101 0010 0101 1011
Operation Description
SFCF', SFCF, SFZF
Byte
Cycle
Flag
1.7.12 Interrupt Control
Mnemonic
DICIL EICIL EXAE
Object Code (Binary)
0110 0011 00rr rrrr 0100 0100 00rr rrrr 0100 0101 00rr rrrr 0111 0101 0100 1101
Operation Description
ILIL EIF0, ILIL&r EIF1, ILIL&r MASKAcc FLAG.PC STACK[SP] SPSP+1, EIF1
Byte
Cycle
Flag
EM73A00 User's Manual
Introduction
1.7.13 Control
Mnemonic Object Code (Binary)
HALT 0101 0110 0100 0111
Operation Description
operation halt, wait interrupt release
Byte
Cycle
Flag
1.7.14 Timer/Counter, Data Pointer, Stack Pointer Control
Mnemonic
LDADPL LDADPM LDADPH LDASP LDATAL LDATAM LDATAH LDATBL LDATBM LDATBH STADPL STADPM STADPH STASP STATAL STATAM STATAH STATBL STATBM STATBH
Object Code (Binary)
0110 1010 1111 1100 0110 1010 1111 1101 0110 1010 1111 1110 0110 1010 1111 1111 0110 1010 1111 0100 0110 1010 1111 0101 0110 1010 1111 0110 0110 1010 1111 1000 0110 1010 1111 1001 0110 1010 1111 1010 0110 1001 1111 1100 0110 1001 1111 1101 0110 1001 1111 1110 0110 1001 1111 1111 0110 1001 1111 0100 0110 1001 1111 0101 0110 1001 1111 0110 0110 1001 1111 1000 0110 1001 1111 1001 0110 1001 1111 1010
Operation Description
Acc[DP]L Acc[DP]M Acc[DP]H AccSP Acc[TA]L Acc[TA]M Acc[TA]H Acc[TB]L Acc[TB]M Acc[TB]H [DP]LAcc [DP]MAcc [DP]HAcc SPAcc [TA]LAcc [TA]MAcc [TA]HAcc TB]LAcc [TB]MAcc [TB]HAcc
Byte
Cycle
Flag
EM73A00 User's Manual
Introduction
Notation Conventions
following notation conventions used above tables throughout this manual unless otherwise specified. Symbol
MASK RAM[HL] ROM[DP]L [DP]L [DP]H [TA]M([TB]M) register Program counter Stack pointer Accumulator Carry flag Status flag Enable interrupt register Interrupt mask Timer/counter Data memory (address 4-bit program memory 4-bit data pointer register High 4-bit data pointer register Middle 4-bit CounterA/TimerB register Transfer Addition Logic Logic Concatenation 8-bit address 4-bit 5-bit port address 6-bit interrupt latch Contents assigned
Operation
Symbol
STACK[SP] FLAG LR3-2 PORT[p] RAM[x] ROM[DP]H [DP]M [TA]L([TB]L) [TA]H([TB]H) PC12-6 a5-0 register Data pointer
Operation
Stack specified flags Zero flag Interrupt latch Port address Timer/counter Data memory (address High 4-bit program memory Middle 4-bit data pointer register 4-bit CounterA/TimerB register High 4-bit CounterA/TimerB register Exchange Subtraction Logic Inverse operation 4-bit immediate data 4-bit zero-page address address program counter destination address branch instruction
EM73A00 User's Manual
Introduction
Chapter
Programming Model
Program (24K 8bits) EM73A00
bits program contains user's program some fixed data. basic structure program categorized into partitions. Address 0000h: Reset start address. Address 0002h 000Ch: kinds interrupt service routine entry addresses. Address 0000E 0086h: SCALL subroutine entry address, only available 000Eh, 0016h, 001Eh, 0026h, 002Eh, 0036h, 003Eh, 0046h, 004Eh, 0056h, 005Eh, 0066h, 006Eh, 0076h, 007Eh, 0086h. Address 0000h 1FFFh: Except regions used above functions, other region used user's program region.
Address 0000h 0002h 0004h 0006h 0008h 000Ah 000Ch 000Eh 0086h
Bank Reset start address Reserved Reserved TRGA TRGB Reserved
SCALL, subroutine call entry
07FFh 0800h 0FFFh 1000h 1FFFh Bank Bank Bank Bank Bank EM73A00 User's Manual
Data table [LDAX], [LDAXI] instructions
Programming Model
2.1.1 User's Program Fixed Data
User's program fixed data stored program ROM. User's program executed using value fetch instruction code.
User's Program
24Kx8 bits program divided into banks 4Kx8 bits bank. program bank selected (2.0). program counter 13-bit binary counter. initialized during reset. When P3(3.0) x000B, program Bank0 Bank1, selected. When P3(3.0) x001B, Bank0 Bank2 selected. When P3(3.0) x010B, Bank0 Bank3 selected.
Address 0000h 0FFFh 1000h 1FFFh x000B x001B x010B x011B x100B
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Example: BANK START: LDIA OUTA LDIA OUTA LDIA OUTA #00H program bank1
#01H
program bank2
#02H
program bank3
EM73A00 User's Manual
Programming Model
-BANK -BANK -BANK
Fixed Data
Fixed Data read table-look-up instruction. instruction requires Data Pointer (DP) indicate address obtaining code data (except Bank0): LDAX LDAXI ROM[DP]L ROM[DP]H,DP+1
Where: 12-bit data register that stores program address pointer code data. User must initially load address into register with instructions "LDADPL", "LDADPM", "LDADPH" assign bank (bank #-1) into obtain lower nibble code data, instruction "LDAX", "LDAXI." obtain higher nibble. After "LDAXI" instruction. value will increased automatically
Example: Read code address 777h Bank 111h Bank table-look-up instruction. #00H,P3 ;set bank LDIA #07H STADPL STADPM
EM73A00 User's Manual
;DP2-0 ;DP5-3
Programming Model
STADPH #00H #03H LDAX STAMI LDAXI STAMI LDIA #01H; STADPL STADPM STADPH #02H; #03H; LDAX STAMI LDAXI STAMI BANK 0777H DATA 56H; BANK 111H DATA ACH;
;DP8-6 07H, Load DP=777H ;ACC ;RAM[30H] ;ACC increase DP=778H ;RAM[31H]
#01H,P3 ;Set bank ;DP2-0 ;DP5-3 ;DP8-6 01H, Load DP=111H
;ACC ;RAM[32H] ;ACC increase DP=112H ;RAM[33H]
EM73A00 User's Manual
Programming Model
Data 128-nibble
total 128-nibble data available from address 7Fh. Data includes Zero Page region, Stacks Data areas.
Address
000h 00Fh 010h 01Fh 020h 020Fh 040h 04Fh 050h 05Fh 060h 06Fh 070h 07Fh 080h 0EFh 0F0h 0FFh
Increment
Zero Page
LEVEL LEVEL LEVEL LEVEL
LEVEL LEVEL LEVEL LEVEL
LEVEL LEVEL LEVEL LEVEL
LEVEL LEVEL LEVEL LEVEL
Used Area System Used Area
2.2.1 Zero Page
From 000h 00Fh zero-page location. used zero-page address mode pointer instructions "STD #k,y; #k,y; y,b; y,b". Example: Write immediate data "07h" address "03h" RAM, clear from RAM. #07H, 0EH,2 ;RAM[03] ;RAM[0EH],2
EM73A00 User's Manual
Programming Model
2.2.2 Stack
There maximum stack levels that user subroutines (including interrupt CALL). User assign level starting stack providing level number stack pointer (SP). When instruction (CALL subroutine) invoked before subroutine entered, previous address saved into stack until return from those subroutines. value restored data saved stack.
2.2.3 Data Area
Except area used user application, whole used data area storing loading general data.
2.2.4 Address Mode
Data Memory also consisted three Address Modes, namely-
Indirect Address Mode
address specified registers.
address
Example: LDAM STAM ;Acc RAM[HL] ;RAM[HL]
Direct Address Mode
Instruction field
XXXX XXXX
address specified bits second byte instruction field.
address
XXXX XXXX
Example: RAM[43H] RAM[23H]
EM73A00 User's Manual
Programming Model
Zero-Page Address Mode
Instruction field yyyy zero-page address 000h~00Fh. address lower nibble second byte instruction field.
address
0000 yyyy
Example: RAM[y]
Program Counter (24K ROM) EM73A00
Program Counter (PC) consisted 13-bit counter. indicates next address executed program instruction. 8K-byte size ROM, indicates address 0000h 1FFFh BRANCH CALL instructions. changed when indicating desired instruction.
2.3.1 Branch Instruction
Object code: 000a aaaa aaaa aaaa Condition: SF=1; PC13.a (branch condition satisfied) SF=0; +2(branch condition satisfied) Original value+2
2.3.2 JUMP instruction
Object code: 0100 0110 Condition: HL%4=0
2.3.3 Subroutine Instruction
SCALL Object Code: 1110 nnnn Condition:
EM73A00 User's Manual
a=8n+6 n=1.Fh
Programming Model
LCALL Object code: 001a aaaa aaaa aaaa Condition: Object code: 0100 1111 Condition: STACK[SP]; return address stored stack
2.3.4 Interrupt Acceptance Operation
When interrupt received, original entered into stack interrupt vector loaded into interrupt vectors follows: TRGA (Counter overflow interrupt)
TRGB (Timer overflow interrupt)
(Time base interrupt)
2.3.5 Interrupt Return Operation
Object code: 0100 1101 Condition: FLAG. STACK[SP]; return address stored stack
2.3.6 Reset Operation
2.3.7 Other Operations
1-byte instruction execution: 2-byte instruction execution: 3-byte instruction execution:
EM73A00 User's Manual
Programming Model
Chapter
Signal Function Descriptions
Accumulator (ACC)
Accumulator (ACC) 4-bit data register temporary data. plays role holding source data result arithmetic, logic, comparison operations.
Flags
There three types flag: Carry Flag (CF) Zero Flag (ZF) Status Flag (SF) These three 1-bit flags influenced arithmetic, logic, comparison operation. flags loaded into stack when interrupt subroutine served, flags restored after instruction executed.
3.2.1 Carry Flag (CF)
Carry Flag affected following operations: Addition: carry indicator. Under Addition operation, when carry-out occurs, "1". Likewise, operation carry-out, "0". borrow-in indicator. Under Subtraction operation, when borrow-in occurs,
Signal Function Descriptions
Subtraction:
EM73A00 User's Manual
"0". Likewise, there borrow-in, will "1". Comparison: borrow-in indicator Comparison operation Subtraction operation. Rotation: shifts into empty accumulator rotation holds shift data after rotation.
Test Instruction: Under TFCFC instruction, content sent into then clears itself "0". TTCFS instruction, content sent into then sets itself "1".
3.2.2 Zero Flag (ZF)
affected result ALU. operation generate result, "1". Otherwise, "0".
3.2.3 Status Flag (SF)
affected instruction operation system status. initiated reset condition. Branch instruction decided When SF=1, branch condition satisfied. Likewise, when SF=0, branch condition dissatisfied.
3.2.4 Examples
Check following arithmetic operation
Arithmetic Operation LDIA #00h LDIA #03h ADDA #05h ADDA #0Dh ADDA #0Eh
Arithmetic logic operations 4-bit data performed unit.
EM73A00 User's Manual
Signal Function Descriptions
3.3.1 Structure
supports user arithmetic operation functions, including Addition, Subtraction, Rotation.The affect results.
Data
3.3.2 Supported Functions
Addition:
supports Addition function with instructions ADDAM, ADCAM, ADDM #k,y. Addition operation affects signal signal Under Addition operation, result "0", will "1". Otherwise, will "0". When Addition operation carry-out, "1". Otherwise, will "0". Example: Operation
3+4=7 7+F=6 0+0=0 8+8=0
Subtraction:
supports Subtraction function with instructions SUBM SUBA SBCAM, DECM. Subtraction operation affects Under Subtraction operation, result negative, equal borrow out. result positive, will "1". Likewise, result subtraction operation "0", "1". Otherwise, will "1". Example: Operation
8-4=4 7-F= -8(1000) 9-9=0
Rotation:
types Rotation operations available. Rotation Left, other Rotation Right.
EM73A00 User's Manual Signal Function Descriptions
RLCA instruction rotates value counter-clockwise, shift value into ACC, then hold shift data
RRCA instruction rotates value clockwise, shift value into ACC, then hold shift data
Example: Rotate clockwise (right) shift into ACC. TTCFS RRCA ;rotate right shift CF=1 into MSB.
Register
Register 4-bit registers. They used pair pointer memory address. They also used independent temporary 4-bit data registers. certain instructions, Register pointer indicate number (Port following illustrates Register structure.
REGISTER
REGISTER
3.4.1 Register Function
Temporary Register Function
Register used temporary register instructions LDHL, THA, THL, INCL, DECL, EXAL, EXAH. LDHL legal address should even number. Example: Load immediate data "5h" into register, "Dh" into register. #05H #0DH
EM73A00 User's Manual
Signal Function Descriptions
Memory Pointer Function
Register used pointer memory address instructions LDAM, STAM, STAMI. Example: Store immediate data into address 35h. STDMI #0AH ;RAM[35H]
Port Pointer Function
Register used pointer indicate port instructions SELP, CLPL, TFPL (when indicates P4.0). Example: Port #00H SEPL ;P4.0
4)direct Jump function
Register used pointer indicate destination address instructions JHL, should limited xxxxxx00. Example: Jump address 1234h #07H #01H LDIA #01H STAMD ;[17H] LDIA #02H STAMD ;[16H] LDIA #03H STAMD ;[15H] LDIA #04H STAM ;[14H] 1234H.
Stack Pointer (SP)
Stack Pointer 4-bit register that stores present stack level number. value must first before using stack. will initiate value after reset condition. When subroutine received, value automatically decreased one. Likewise, subroutine sent, value increased one. data transfer between done with instructions "LDASP" "STASP". Example: LDIA STASP
EM73A00 User's Manual
#0FH
Signal Function Descriptions
LCALL NEXT1:
NEXT1
SP[0EH] NEXT1
SP[0EH]
Data Pointer (DP)
Data Pointer 12-bit register that stores address indicating code data specified user (refer Chapter
Reset Function
When RESET held level least instruction cycles with working normally, will begin initialize whole internal states. When RESET changes high level, will begin work normal condition. following table shows internal state during reset condition:
Hardware Condition Under RESET (f1) State Program counter Status flag Interrupt enable flip-flop MASK0 Interrupt latch P1.1 P5,P6 Initial value 0000h input Start oscillation
RESET hysteresis input pull-up resistor. simplest RESET circuit connect RESET with capacitor diode VDD.
RESET
EM73A00 User's Manual
Signal Function Descriptions
Chapter
Type Circuity Diagrams
Type Circuitry Diagrams
4.1.1 Reset Type
Type Reset-A
4.1.2 Oscillation Types
Crystal Osc.
4MHz (100K)
XIN/OSCIN Osc.
XOUT XOUT
Type Osc-A
Type Osc-H
EM73A00 User's Manual
Type Circuity Diagrams
4.1.3 Input Types
WAKEUP CONTROL MASK OPTION WAKEUP FUNCTION
Type Input-A
Type Input-A
Type Input-B
4.1.4 Types
PathB
Special function control input
Output Data latch
Output data
Type
Type I/O-RMO
Output data Output control Input enable Input data
Type
EM73A00 User's Manual
Type Circuity Diagrams
4.1.5 Bi-direction Program Controlling
command port controlling
Port P7C3 P7Cn n:3~0 Input /Output mode selection P7C2 P7C1 P7C0 Initial state: 0000
Function Description
P7.n input port. P7.n output port.
P11.1 command port controlling P1.1.
Port Input /Output mode selection TIMF CNTF Initial state: 0000
Function Description
P1.1 input port. P1.1 output port.
Example:
output program control. LDIA #1110B OUTA LDIA #0111B OUTA ;P7=0110B ;P7C=1110B ;P7(3.1) define output port
EM73A00 User's Manual
Type Circuity Diagrams
EM73A00 Port Descriptions
Port
Counter control register Timer control register Timebase control register -Watch Timer control register
Input Function
Input port wake-up function P1.1 input -Input port, wake-up function -Input port -P7C TIMF+CNTF+P1C
Output Function
P1.0 :RMO, P1.1 output P3(1.0) bank selection -Output port Output port Output port -P7C TIMFC+CNTFC+P1C -Sleep/Off mode control register
Remarks
output program control Ref. Tmr/Cnt
EM73A00 User's Manual
Type Circuity Diagrams
Chapter
Clock Timing
Overview
This chapter summarizes clock timing EM73A00 CPU.
Clock Timing Generator
clock generator supported single clock system. clock sources from crystal. working frequency range 200KHz 4MHz depending actual working voltage.
5.2.1 Clock Timing Generator Structure
clock generator unit generates basic system clock "fc". When mode, clock generator will remain disabled until condition ends.
EM73A00 User's Manual
Clock Timing
system clock control unit generates basic clock phase system clock signal.
Mask option
sleep
clock generator
XOUT
System clock System clock control
5.2.2 Clock Timing Generator Function
"fc" frequency equal oscillation frequency pins XOUT with crystal (resonator). When under mode, XOUT "high" state. instruction cycle equals basic clock "fc". instruction cycle
Internal Time Base
illustrated below, time base stages.
Prescaler Binary Counter
Time base provides basic frequency following functions: (time base interrupt) Timer/counter, internal clock source Warm-up time off-mode disable
EM73A00 User's Manual
Clock Timing
5.3.1 Time Base Interrupt (TBI
time base used generate single fixed frequency interrupt. Eight types frequencies selected with "P25" setting: Single clock mode (initial value 0000) Interrupt disable Interrupt frequency Interrupt frequency Interrupt frequency Interrupt frequency Interrupt frequency Interrupt frequency Interrupt frequency Interrupt frequency Reserved
Timer/Counter
With Counter, counter data saved timer registers TAH, TAM, TAL. User initial counter value. Such value loaded stored executing instructions "LDATAH(M,L), STATAH(M,L)." With Timer, timer data saved TBH, TBM, TBL. User initial counter value. Such value loaded stored executing instructions "LDATBH (M,L), STATBH (M,L)". timer/counter basic structure (see figure below) consisted identical modules. timer counter module initial timer counter values which sent register. command ports Counter Timer. User choose different operating modes internal clock rates these ports. When timer/counter overflows, will generate TRGB/TRGA interrupt request interrupt control unit.
EM73A00 User's Manual
Clock Timing
CNTF,TIMF
Interrupt control Data
CNTFC,TIMFC
12-bit counter
12-bit counter
P7.0
Event counter control
Timer control
Internal clock
5.4.1 Counter Function
P7.0are external inputs Counter
Port COUNTER MODE SELECTION
Function Description
Stop input counter P7.0 input counter
Initial state: 0000
Under counter counter increased falling edge P7.0. When counter counts overflow, will provide interrupt request TRGA interrupt control. Read Write TIMF TIMFC CNTF CNTFC
CNTF: When MASK2=0, Counter overflow then read P11.2 whose value (CNTF) CNTFC: When write P11.2 ,then Flag reset (CNTFC =0).
EM73A00 User's Manual
Clock Timing
Example: Enable Counter with
LDIA EICIL #1000B 110111B ;Enable Counter with counter mode ;Interrupt latch enable OUTA
5.4.2 Timer Function
command port timer
Port Counter mode selection
Function Description
Stop Timer mode
Initial state: 0000
Internal pulse rate selection
Function Description
XIN/28Hz XIN/210Hz XIN/212Hz XIN/214Hz
Under Timer Timer increased falling edge internal pulse.user choose above types internal pulse rate setting timer command. When timer counts overflow, will provide interrupt request TRGB interrupt control. Read Write TIMF TIMFC CNTF CNTFC
TIMF: When MASK1=0, Timer overflow then read P11.3 whose value (TIMF) TIMFC: When write P11.3 ,then Flag reset (TIMFC =0). Example: generate TRGB interrupt request after 60ms with system clock XIN=4MHz
LDIA #0010B EXAE EICIL 111011B ;Enable mask ;Iinterrupt latch <-0,enable
EM73A00 User's Manual
Clock Timing
LDIA #06H STATBL LDIA #01H STATBM LDIA #0FH STATBH LDIA #1001B OUTA
;Enable Timer with internal pulse rate: XIN/2^10
NOTE
preset value Timer/Counter Register calculated follows: Internal pulse rate: XIN/2^10 4MHz time Timer/Counter count 2^10 /XIN 1024/4000=0.256ms number internal pulse timer overflow 0.256ms 234.375 0EAh preset value Timer/Counter Register 1000h 0EAh F16h
EM73A00 User's Manual
Clock Timing
Chapter
Interrupt Power Saving Functions
Overview
This chapter summarizes interrupt power saving functions EM73A00 CPU.
Interrupt Function
They internal interrupt sources. Multiple interrupts admitted according their priority Type
Internal Internal Internal
Interrupt Source
Counter overflow interrupt (TRGA) Timer overflow interrupt (TRGB) Time base interrupt(TBI)
Priority
Interrupt Latch
Interrupt Enable Condition
EI=1, MASK2=1 EI=1, MASK1=1 EI=1, MASK0=1
Program Entry Address
006h 008h 00Ah
EM73A00 User's Manual
Interrupt Power Saving Functions
6.2.1 Interrupt Structure
TRGB MASK1 TRGA MASK2
TIMFC
TIMF
CNTFC
CNTF
Reset system reset program instruction
MASK0
Reset system reset program instruction program
Priority Checker Entry address generator
Interrupt Power Saving Functions
EM73A00 User's Manual
Interrupt Controller
IL1-IL3 Interrupt latch. Holds interrupt requests from interrupt sources. program, reset program system reset. only decide which interrupt source accepted. MASK register promote inhibit interrupt sources. Enable interrupt Flip-Flop promote inhibit interrupt sources. When interrupt occurs, auto cleared "0". After instruction executed, auto again Check interrupt priority when multiple interrupts occur.
MASK0 MASK2
Priority Checker
6.2.2 Interrupt Operation
Follow steps below interrupt operation: Locate flags stack. interrupt entry address Clear inhibit other interrupts happened. Clear with which interrupt source already been accepted. Execute interrupt subroutine from interrupt entry address. accept RTI, restore flags from stack accept other interrupt requests. Example: Enable interrupt "TRGA".
LDIA #1100B EXAE EICIL 111111B ;Set mask register "1100B" ;Enable interrupt F.F.
EM73A00 User's Manual
Interrupt Power Saving Functions
Power Saving (OFF Sleep) Function
During Sleep Modes, keeps systems internal status under power consumption condition. Under Mode, system clock changes into snooze state. system needs warm period stabilize system clock back running condition after wake-up. Under Sleep Mode, system clock does turn into snooze state. needs warm-up period.
6.3.1 Sleep Control
Sleep Modes controlled Port released P0(0.3) P4(0.3), dependent Mask Option.
SWWT
Initial value: 0000
wake-up release mode Wake-up edge release mode Wake-up level release mode
Enable off/sleep Reserved Enable off/sleep mode
SWWT
wake-up warm-up time 216/XIN 212/XIN /XIN Sleep mode
Stop Stop Stop Stop
Note mode mode mode Need warm-up time
6.3.2 Sleep Conditions
following conditions exist when system under Off/Sleep Mode: stop (off only) internal status held Internal time base clear internal memory, flags, register, held original states Program Counter freezes executed address until released.
Interrupt Power Saving Functions
EM73A00 User's Manual
Example: Entry Off/Sleep mode
LDIA #0101B OUTA ;Entry mode1,wakeup edge.
6.3.3 Release Condition
following conditions exists when system wakes-up from /Sleep Mode: starts oscillate (off only) Warm-up period process (off only) According execute following program
6.3.4 Edge Off/Sleep Mode:
Releases Off/Sleep condition falling edge following pins: P0(0.3) P4(0.3) When P0/P4 wakeup edge/level release mode, must attend other P0/P4 whether enable wakeup release mode, because wakeup result decide wakeup function gating. (Ref 4.1.3)
NOTE
There independent mask options wake-up function EM73A00. wake-up function P0(0.3) P4(0.3) enabled disabled independently. HALT condition: Program Counter execute HALT instruction ,OSC stop internal status held. internal memory, flags, register held original state. When Interrupt happen HALT condition released.
EM73A00 User's Manual
Interrupt Power Saving Functions
Chapter
Miscellaneous Function
Overview
This chapter describes remote control signal output, voltage detector watch timer features EM73A00.
Remote control signal output port
This dedicate terminal carrier wave output remote controller. When remote control data written into remote control output data register, P1.0, data output from terminal
Port
Value Function Description
Output Output high
Initial state: ***0
Voltage Detector
power supply voltage lower than normally operating voltage, automatically initializes internal system. This function used masking option.
EM73A00 User's Manual
Miscellaneous Function
Watch Timer
watch timer 8-bit timer that protects from runaway programs. block diagram watch timer shown below. watch timer enabled disabled mask option. watch timer enabled, each interval time which choosing P21, system will reset.
XIN/2**12
counter RESET Mask option control
register
control port watch timer, time signal will reset system.
Port
Value Function Description
Clear Nothing 219/XIN 222/XIN 215/XIN 212/XIN
Initial state: 0*00
EM73A00 User's Manual
Miscellaneous Function
Chapter
Electrical Properties
Overview
This chapter provides information electrical, thermal timing properties EM73A00.
Absolute Maximum Ratings
Items
Supply Voltage Input Voltage Output Voltage Power Dissipation Operating Temperature Storage Temperature
Sym.
TOPR TSTG
Ratings
-0.3V -0.3V VDD+0.3V 300mW -20°C 70°C -40°C 125°C
Conditions
TOPR 25°C TOPR 25°C TOPR 25°C TOPR 25°C
Recommended Operating Conditions
Items
Supply Voltage Input Voltage Operating Frequency
Sym.
Ratings
1.6V 5.5V 0.80xVDD 0.20xVDD 200KHz 4MHz
Condition
Electrical Properties
EM73A00 User's Manual
Electrical Characteristics
VDD=3.0V, VSS=0V, TOPR=-20oC 70oC Parameters
Operation current consumption Standby current consumption Standby current consumption Input Current High level input current High level input current level input current level input current High level output current High level output current High level output current level output current level output current level output current Hysteresis Width battery detector
Sym.
Typ.
Max.
Unit
Conditions
load, Fc=4MHz load, mode, voltage detector load, mode, voltage detector TEST VIH=
RESET Vin=Vdd-0.3V
IDDs
IDDs IIH1 IIH2 IIL1 IIL2 IOH1 IOH2 IOH3 IOL1 IOL2 IOL3 VHYSVlb
-120 -900 1.6V
-450
-1.5 -1.5 -200 1.8V
with pull-up resistor
RESET Vin=Vss
RMO, Vout 2.1V P1.1, Vout 2.1V Vout 2.6V RMO, Vout 0.9V P1.1, Vout 0.9V Vout 0.4V
EM73A00 User's Manual
Electrical Properties
VDD=4.5V, VSS=0V, TOPR=-20oC 70oC Parameters
Operation current consumption Standby current consumption Standby current consumption Input Current High level input current High level input current level input current level input current High level output current High level output current High level output current level output current level output current level output current Hysteresis Width battery detector
Sym.
Typ.
Max.
Unit
Conditions
load, Fc=4MHz load, mode, voltage detector load, mode, voltage detector TEST VIH=
RESET Vin=Vdd-0.3V
IDDs
IDDs IIH1 IIH2 IIL1 IIL2 IOH1 IOH2 IOH3 IOL1 IOL2 IOL3 VHYSVlb
-200 -1.2 1.6V
-150 -0.9
-100 -0.6 1.8V
with pull-up resistor
RESET Vin=Vss
RMO, Vout 3.2V P1.1, Vout 3.2V Vout 3.9V RMO, Vout 0.9V P1.1, Vout 0.9V Vout 0.4V
Electrical Properties
EM73A00 User's Manual

USER'S EM73A00 MANUAL 4-Bit Microcontroller ELAN MICROE

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