Altera Devices September 2001, ver. Application Note Excalib

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Altera Devices September 2001, ver. Application Note Excalib

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Estimating Nios Resource Usage Performance
Altera Devices
September 2001, ver. Application Note
ExcaliburDevelopment Kit, featuring Niosembedded processor, includes software, hardware, accessories, documentation necessary create working embedded systems. Using software hardware included kit, specify peripherals configuration your Nios embedded microcontroller well custom hardware blocks complete your embedded system. When finished creating design, implement Altera® device. determine which Altera device best meets your design requirements, important able estimate device resources that used operating frequency. This document help make these estimates your Nios embedded processor design. This document describes usage performance (fMAX) 32and 16-bit Nios reference designs included Excalibur Development Kit, featuring Nios embedded processor version 1.1.1, explains Altera calculated results. reference designs have fullfeatured microcontroller with memory interface built-in peripherals; they demonstrate real-world embedded systems implemented Altera device. techniques described this application note calculate resource usage performance your Nios designs. This application note assumes that familiar with Nios embedded processor, Altera device architectures, Quartus® development tools.
Software Versions Used
This document provides data based push-button compilation 32and 16-bit reference designs, i.e., designs were optimized. Altera used following software versions calculate results:
Nios embedded processor version 1.1.1 Quartus software version
Refer Literature pages Altera site http://www.altera.com Nios peripheral documentation. Refer Altera device family data sheets more information about Altera device want use.
Altera Corporation
A-AN-178-1.0
178: Estimating Nios Resource Usage Performance Altera Devices
Usage Performance
When designing with Nios embedded processor version higher, target number Altera device families, including FLEX 10K®, FLEX® 10KE, ACEXTM, APEX20K, APEX Mercurydevices. Table description device families development tools supported. Table Device Family Development Tool Support Device Family
FLEX 10K, FLEX 10KE ACEX APEX APEX Mercury
Development Tool Support
MAX+PLUS Quartus MAX+PLUS Quartus Quartus Quartus Quartus
This section describes usage performance Nios processor, multiplication units, peripherals Altera devices.
Reference Designs
16-bit reference designs implement systems that comparable most dedicated microcontrollers. Table shows Nios processor configuration designs. designs located reference_design_16_bit directories. Include Multiply-step (MSTEP) instruction option turned 32-bit reference design. "Multiplication Units" page usages with this option turned
Table Processor Configuration Processor Configuration
Register File Size Data Path (Bits) Address Width Shifter Hardware Multiply Assist
32-Bit
7-bit None
16-Bit
3-bit Applicable
Table shows reference design peripherals; both designs same peripherals.
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
Table Reference Design Peripherals Peripheral
Port Port 7-Segment Port Push-Button Port Timer UART Memory Interface Memory Interface On-Chip Note:
32-bit reference design addresses 256K 32-bit SRAM memory; 16-bit reference design addresses 16-bit SRAM memory. 32-bit reference design addresses MByte flash memory; 16-bit reference design addresses flash memory.
Type
11-Bit Output Parallel Input/Output (PIO) 2-Bit Bidirectional 16-Bit Output 12-Bit Input 32-Bit Timer Fixed Baud Rate 115200 16-Bit SRAM 16-Bit Flash with Boot Monitor
Table shows usage fMAX reference designs. table provides information fastest speed grade devices each family. Altera created reference designs compiled them using standard tool flow without additional optimization. Additionally, constraints were used when compiling designs. Table Reference Design Usage fMAX Device Family Device
EP1M120F484C5 EP2A15F672C7 2,602 3,046 3,022 3,035 3,018 3,029 3,042
32-Bit fMAX
59.08 55.44 53.15 43.26 40.86 32.47 31.35
16-Bit EAB/ESB Bits
27,744 40,960 27,616 27,616 27,616 27,616 27,616
1,784 2,144 2,124 2,151 2,132 2,103 2,119
fMAX
70.51 59.34 54.09 44.50 48.28 38.82 38.31
EAB/ESB Bits
15,200 31,488 15,040 15,040 15,040 15,040 15,040
Mercury APEX
APEX 20KC EP20K200CF484C7 APEX 20KE EP20K200EFC484-1X APEX ACEX Note:
EP20K200FC484-1X EP1K100FC484-1
FLEX 10KE EPF10K100EQC208-1X
embedded array block. embedded system block.
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
Multiplication Units
Nios three multiplication unit options. overall usage depends which option your design uses. Table compares usage options three variants reference designs:
32-bit reference design without hardware assistance 32-bit reference design with Include Multiply-step (MSTEP) instruction option turned (integer multiplication performed with clock-cycle bit) 32-bit reference design with Include Multiply (MUL) instruction turned multiplication performed clock-cycles)
Table Multiplication Unit Usage Device Family
Mercury APEX APEX 20KC APEX 20KE APEX FLEX 10KE ACEX Note:
count this column count Software Only Multiplication column obtain total using this option. compile hardware multiplication option FLEX ACEX devices, must turn Auto Cascade Chains option. choose Assignment Organizer (Tools menu); Expand Options Individual Nodes Entities Node tab; Select Auto Cascade Chains Name drop-down list box, select Setting drop-down list box.
Device
EP1M120F484C5 EP2A15F672C7 EP20K200CF484C7 EP20K200EFC484-1X EP20K200FC484-1X EPF10K100EQC208-1X EP1K100FC484-1
Software Only Multiplication
2,602 3,046 3,022 3,035 3,018 3,029 3,042
MSTEP
Peripherals
Excalibur Development Kit, featuring Nios embedded processor includes following on-chip peripherals:
On-chip memory (RAM ROM) ports Serial peripheral interface (SPI) Interval timer UART
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
number each peripheral uses depends which Altera device use. Table shows number used peripheral included 32-bit Nios design targeting either APEX 20KE FLEX 10KE device. These counts vary slightly, depending Quartus MAX+PLUS Compiler optimization settings used.
Table Peripheral Usage Peripheral
Port Port 7-Segment Port Push-Button Port Timer UART
APEX 20KE
FLEX 10KE
When implement Nios peripheral, configure meet your system's requirements. Table describes some peripheral configuration options-and many option uses-for 32-bit Nios design targeting either APEX 20KE FLEX 10KE device. Table Peripheral Configuration Options Usage Peripheral
UART Fixed Baud Rate Variable Baud Rate 32-Bit, Tristate, Capture, 16-Bit, Tristate, Capture, 8-Bit, Tristate, Capture, 32-Bit, Tristate, With Capture, 32-Bit, Tristate, Capture, With Level 32-Bit, Tristate, With Capture, With Level 32-Bit, Input Output Only, Capture, 32-Bit, Both Input Output, Capture, Timer Options Master, 8-Bit, MSB/LSB, Default Settings, Slave Master, 8-Bit, MSB/LSB, Default Settings, Slaves Slaver, 8-Bit, MSB/LSB, Default Settings Slave, 16-Bit, MSB/LSB, Default Settings
Option(s)
APEX 20KE
FLEX 10KE
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
Calculating Usage
When calculating usage Usage Performance" page Altera optimization techniques during synthesis compilation. duplicate calculations, follow steps following sections. these steps calculate resource usage performance your Nios designs benchmark designs peripherals Altera device families. This example uses Mercury EPM120F484C5 device. process using other devices similar. This analysis uses Quartus software version 1.1. different version software, your results vary percent.
Calculating Quartus Software
find usage 32-bit reference design implemented Mercury device, perform following steps: Quartus software. Choose Open Project (File menu). Browse reference_design_32_bit directory. Select reference_design_32_bit.quartus project file. reference_design_32_bit.bdf file opens. Click Open. Select Altera device target. Choose Compile Mode (Processing menu). Choose Compiler Settings (Processor menu). Click Chips Device tab. Select Mercury from Family drop-down list box. Click Quartus message that warns that device family changed. (You want save assignments.) Select EPM120F484C5 device Available devices list box. Click
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
parameters Nios embedded processor. Skip this step want calculate usage performance reference design shipped with kit.
Double-click ref_32_system symbol launch Nios System Builder wizard. Click Edit CPU. Click Next wizard pages wizard page turn hardware-assisted multiplication want turning Include Multiply-step (MSTEP) instruction Include Multiply (MUL) instruction options off. Figure
Figure Hardware Assisted Multiplication window
Click Finish.
Change peripheral settings. Skip this step want calculate usage performance reference design shipped with kit.
Select name peripheral that want edit highlight peripheral. Click Next. through wizard, changing parameters. Click Finish when done making changes.
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
When finished changing peripheral parameters, click Next Nios System Builder.
Choose targeted device family. Figure Figure Nios System Builder (Page
Click Next. Click Generate. Nios System Builder begins generating files needed compile design. Click Finish when file generation completes close Nios System Builder. Choose Start Compilation (Processing menu) compile design.
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
When compilation completes, view usage performance. compilation summary shows device resources used design. Expand Timing Analyses. Click fmax (not incl. delays to/from pins) view fMAX design.
Calculating Peripheral Usage
cannot calculate usage Nios peripherals directly; instead, must compile your design with settings peripherals then compile second time with changes. Then, compare results determine used. calculate usage, perform following steps: Perform steps "Calculating Quartus Software" page target device find many design uses. Change design, example, removing peripheral changing settings. change device selection. Recompile design determine usage. Compare usage found step determine many were affected design change.
Conclusion
This application note provides usage fMAX performance 16-bit Nios reference designs common peripheral options. techniques described this application note determine usage performance Nios processor your designs.
Altera Corporation
178: Estimating Nios Resource Usage Performance Altera Devices
Innovation Drive Jose, 95134 (408) 544-7000 http://www.altera.com Applications Hotline: (800) 800-EPLD Literature Services: lit_req@altera.com
Copyright 2001 Altera Corporation. Altera, Programmable Solutions Company, stylized Altera logo, specific device designations, other words logos that identified trademarks and/or service marks are, unless noted otherwise, trademarks service marks Altera Corporation U.S. other countries. other product service names property their respective holders. Altera products protected under numerous U.S. foreign patents pending applications, maskwork rights, copyrights. Altera warrants performance semiconductor products current specifications accordance with Altera's standard warranty, reserves right make changes products services time without notice. Altera assumes responsibility liability arising application information, product, service described herein except expressly agreed writing Altera Corporation. Altera customers advised obtain latest version device specifications before relying published information before placing orders products services. rights reserved.
Altera Corporation

Altera Devices September 2001, ver. Application Note Excalib

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