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Single Cycle 8051 Core ­ AT89LP Family of High Performance & Low Power Flash Microcontrollers

By Raghu Raghavan, Microcontroller Marketing & Ben Froemming, Design Manager

Single Cycle 8051 Core - AT89LP Family of High Performance & Low Power Flash Microcontrollers
By Raghu Raghavan, Microcontroller Marketing & Ben Froemming, Design Manager
Summary
Atmel Corporation · 2325 Orchard Parkway · San Jose, CA 95131 TEL (408) 441-0311 · FAX (408) 487-2600 · Web Site: http://www.atmel.com
Table of Contents
Summary.........................................................1 Introduction ......................................................2 Single-Cycle AT89LP Family.........................................2 AT89LP Family Improvements.......................................3 Key Advantages ...................................................5 Example Applications..............................................7 Device Overview ..................................................8 Conclusion .......................................................8 References.......................................................8
Introduction
Single-Cycle AT89LP Family
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AT89LP Family Improvements
System Clock: The CPU clock frequency equals the XTAL1 frequency. The crystal oscillator no longer needs division by 2. CPU: The CPU fetches one byte from code memory every clock cycle instead of every twelve clock cycles. This greatly increases the throughput of the CPU and reduces the power consumption. As a consequence, the CPU no longer executes instructions in 12 to 48 clock cycles, but only in 1 to 4 clock cycles. Timer / Counters: The Timer / Counters in the AT89LP devices are enhanced in Mode 0 as a variable 9- to 16-bit timer / counter and in Mode 1 as a 16-bit auto-reload timer / counter. In the new architecture the Timer / Counters increment at a rate of once per clock cycle. This compares to once every 12 clocks in the classic 8051. Serial Port: The AT89LP UART supports Automatic Address Recognition and Frame Error Detection. Its baud rate in Mode 0 is 1 / 2 the clock frequency, compared to 1 / 12 the clock frequency in the classic 8051. I / O Ports: The I / O ports may be configured in four different modes: input-only (tristated), full CMOS output, open-drain output and quasi-bidirectional (classic 8051). Reset: The RST pin is active-low as compared with the active-high reset in the classic 8051, resulting in reduced latch-up susceptibility.
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Block Diagram
Figure 1. AT89LPxxx Block Diagram
AT89LP213 / 413 AT89LP214 / 414
Single-Cycle 8051 CPU 2K / 4K Code Flash 128 Bytes RAM
12 Configurable I / O General Purpose Interrupts
SPI Timer 0 Timer 1 8-bit PWM (x2)
Single-Cycle 8051 CPU 2K / 4K Code Flash 128 Bytes RAM
12 Configurable I / O
SPI Timer 0 Timer 1
Watchdog Timer
General Purpose Interrupts
Analog Comparator POR BOD OCD
8MHz RC Oscillator Crystal Oscillator
Analog Comparator POR BOD OCD
8MHz RC Oscillator Crystal Oscillator
AT89LP216 / 416
Single-Cycle 8051 CPU 2K / 4K Code Flash 128 Bytes RAM
14 Configurable I / O General Purpose Interrupts
SPI Timer 0 Timer 1 8-bit PWM (x2) UART
Watchdog Timer
Analog Comparator POR BOD OCD
8MHz RC Oscillator Crystal Oscillator
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Key Advantages
AT89LP microcontrollers have the following key advantages: Binary compatibility with the industry standard MCS51 instruction set Access to a wide range of existing code libraries and development tools from several vendors Lower power consumption and reduced EMI for the same throughput as classic 8051s 6x to 12x quicker interrupt response times and faster pin toggling than classic 8051s Fully static CMOS logic implementation driven by a single system clock Totally deterministic response at 20 MIPS (no cache memory) Boolean processor (bit set / reset read-modify-write instructions execute in two-cycles) Power saving modes of operation (Idle and Power-down) with multiple interrupt-based wake-up sources Fast programming time using Page Mode In-Application Programming for the added power of self-modifying code DSP-grade CPU speed using built-in hardware multiplier and fast dual data pointers Small footprints for space constrained applications Wide voltage operating range to meet a variety of needs Higher than voltage supply tolerant I / Os Upward migration path to devices with larger memories or more I / Os On-Chip Debug system allows development of firmware within the target system
System Integration
Atmel AT89LP microcontrollers are built around an enhanced 8051 CPU and are fully binary compatible with the industry standard MCS51 instruction set. The CPU employs a simple two-stage pipeline to fetch and execute one instruction byte every clock cycle, allowing up to 1 MIPS per MHz of system frequency. The enhanced CPU is paired with onchip RAM and a range of integrated peripherals, including at least two 16-bit timers, multiphasic pulse width modulator (two to four phases), an enhanced UART, a master / slave SPI, debounced analog comparators, 10-bit analog-to-digital converter, watchdog timer, and pin-based configurable interrupts. The devices also include system functions such as Power-on Reset, Brown-out Detection and an on-chip high precision RC Oscillator. The devices include 2KB up to 256KB of In-System Programmable Flash memory for code storage and up to 64KB of on-chip Flash data memory. The high level of system integration on AT89LP devices provides reduced system cost, lower power consumption and faster time-to-market.
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Timer / Counters
AT89LP microcontrollers have two or more 16-bit timers for use as system timers or event counters. Timer 0 and Timer 1 can independently generate 8-bit pulse width modulation waveforms. Timer 2 can be used with the Compare / Capture Array (CCA) to capture events and perform measurements on multiple channels or to generate multi-phasic PWM waveforms with 2 to 4 phases for advanced motor control.
Serial Communication
AT89LP microcontrollers include a full Serial Peripheral Interface (SPI) bus for high-speed serial communication with both master and slave modes and an enhanced UART with automatic address recognition and framing error detection.
Analog Peripherals
AT89LP microcontrollers include one or more analog comparators with selectable interrupt modes and a tunable digital debouncer. Some devices also include an integrated 10-bit analog-to-digital converter with multiple input channels and single-ended or fully differential operation.
Configurable I / O
Each pin of an AT89LP microcontroller is independently configurable in one of four modes: input-only (high impedance), open-drain, push-pull CMOS output, or Quasi-bidirectional (Intel). Some devices tolerant voltages levels on the I / Os that are greater than the supply voltage. In addition, all pins of Port 1 may be configured to generate an interrupt for a variety of edge or level conditions.
Supervisory Functions
AT89LP microcontrollers integrate several supervisory functions on chip, including Poweron Reset, Brown-out Detection, Software Reset, and a Watchdog Timer.
Clock Selection
Power Reduction
AT89LP microcontrollers include two power-saving modes of operation: Idle and Powerdown. These modes can be exited through a variety of interrupt conditions.
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Example Applications
The majority of embedded applications continue to be based on 8-bit devices. AT89LP microcontrollers provide high levels of integration leading to reduced system cost, lower power consumption, smaller packages, and faster time-to-market. These devices are ideal for communications, consumer, and industrial products, ranging from battery-powered devices to white goods. Some example uses include: Protocol Conversion Create a low-cost SPI-UART bridge. Convert the parallel port of a legacy device to an SPI bus . Intelligent Electronics Replace discrete logic components and programmable logic devices in control systems with an AT89LP device for the added flexibility of a microcontroller. Create smart sensors using the integrated ADC. Configure intelligent displays using the high current capability of the I / O drivers. Incorporate a low-cost, small package AT89LP device into disposable electronics for medical or drug testing. Waveform Capture and Generation Capture and process multi-channel events with the Compare / Capture Array. Drive electric motors with the up to four-phasic PWM. Use the on-chip timers for pulse generation, programmable frequency sources, or remote control encoders. Encode speech waveforms for direct digital speaker drive.
Table 1.
Communications
Handset Display Microphone Display Protocol Conversion Speech Encoder Telephone Handset
Applications
Consumer
Disposable Electronics Handheld Devices Intelligent Displays Smoke / CO Detectors Thermostat Toys Universal Remote Control White Goods
Industrial
Data Acquisition Motor Control Portable Instruments Smart Relays
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Device Overview
On-chip Memory Device AT89LP213 AT89LP214 AT89LP413 AT89LP414 AT89LP216 AT89LP416 AT89LP2052 AT89LP4052 AT89LP428 AT89LP828 AT89LP840 AT89LP1640 AT89LP3240 AT89LP6440 CODE 2K 2K 4K 4K 2K 4K 2K 4K 4K 8K 8K 16K 32K 64K 512 1K 512 1K 2K 4K DATA RAM 128 128 128 128 128 128 256 256 768 768 768 768 1280 2304 2 2 2 2 2 2 2 2 3 3 3 3 3 3 Timer / Counters 16-bit PWM 2 N 2 N 2 2 2 2 6 6 6 6 6 6 CCA N N N N N N N N Y Y Y Y Y Y Serial Interfaces UART N Y N Y Y Y Y Y Y Y Y Y Y Y SPI Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y 2 2 2 2 2 2 Analog COMP ADC N N N N N N N N N N N N 10-bit 10-bit Pins 14 14 14 14 16 16 20 20 28 / 32 28 / 32 40 / 44 40 / 44 40 / 44 40 / 44 Available Now Now Q4 2006 Q4 2006 Now Q4 2006 Now Now Q1 2007 Q1 2007 Q3 2007 Q3 2007 Q2 2007 Q2 2007
Conclusion
References
1. Atmel 8051 datasheets and product documentation: www.atmel.com / products / 8051
Contact: Raghu Raghavan, Microcontroller Marketing, San Jose, CA, Tel: +1 408 436 41 18, e-mail: mailto:rraghavan@atmel.com
Atmel Corporation 2006. All rights reserved. Atmel®, logo and combinations thereof, Everywhere You Are® and others, are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others.
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