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Configuring High-density FPGAs using Atmel's Serial DataFlash® AVR® Microcontroller
Completely In-System Programmable (ISP), both DataFlash HyperTerminal Download Binaries DataFlash using XmodemCRC
Protocol
Serial DataFlash® Application Note
Optional XY-Modem Terminal Emulator Downloading Uploading Binaries
DataFlash ASCII Binary File Converter Hex2Bin Auto-detect DataFlash Densities from 1-Mbit 32-Mbit using ATMega163, AT90S8515, AT90LS4433 Microcontroller
This application note describes cost-effective approach configuring high-density FPGAs. seen Tables memory requirements some today's FPGAs becoming quite large. With Atmel Serial DataFlash 8-bit microcontroller, cost-effective method obtaining In-System Programmability achieved. Table Memory Requirements Xilinx®/Atmel FPGAs
Device XC2V1500 XC2V2000 XC2V3000 XC2V4000 XC2V6000 XC2V8000 XC2V10000 Configuration Bits 5,166,240 6,808,352 9,589,408 14,220,192 19,752,096 26,185,120 33,519,264 DataFlash AT45DB081B AT45DB081B AT45DB161B AT45DB161B AT45DB321B AT45DB321B AT45DB321B
Table Memory Requirements Altera®/Atmel FPGAs
Device EP20K600E EP20K1000E EP20K1500E Configuration Bits 5,654,000 8,938,000 12,011,000 DataFlash AT45DB081B AT45DB161B AT45DB161B
Table Memory Requirements ORCA® Series 4/Atmel FPGAs
Device OR4E6 OR4E10 OR4E14 Configuration Bits 4,737,288 7,642,376 10,332,680 DataFlash AT45DB081B AT45DB081B
Rev. 3301A-DFLSH-4/03
AT45DB161B
Block Diagram
block diagram proposed solution displayed Figure RS-232 transceiver used communicate with host binary file downloading uploading. Communicating with DataFlash accomplished with peripheral microcontroller. general-purpose microcontroller used interface FPGA. Proof concept carried using Atmel ATSTK500 Microcontroller Starter Kit, which contains everything Figure except FPGA, Insight Electronics/Xilinx Spartan® Demo Board containing XC2S100 FPGA. signals representing AVR-to-FPGA interface were wire-wrapped. Users should refer ATSTK500 User Guide instructions correctly board 3.3V operation, connect DataFlash device enable spare RS-232 port. Users should also verify Slave Serial Configuration mode properly Spartan Demo Board referring Spartan Demo Board user manual. With starter kit, actions initiated pressing switches. Slave Serial Configuration accomplished banging clock data general-purpose pins microcontroller slaved FPGA. following link Spartan Demo Board modifications support Slave Serial Configuration:
Figure Slave Serial Configuration
FPGA
RS-232 Transceiver UART
PROG DataFlash 1-Mbit 32-Mbit MISO MOSI SCLK CCLK DONE INIT PORT
DataFlash: Configuring High-density FPGAs
3301A-DFLSH-4/03
DataFlash: Configuring High-density FPGAs
Table lists desired feature microcontroller required performing that function. example, want boot FPGA then AT90LS4433 adequate given task, this assumes course DataFlash either pre-programmed programmed nails. microcontrollers listed 3.3V devices that operate down 2.7V. Industrial temperature devices also available. part number suffix placeholder package type. Table List Microcontrollers that Perform Required Function
Configure FPGA with XmodemCRC Receive with XY-Modem Send Receive
Device AT90LS4433-4XC AT90S8515-4XC AT90S8535-4XC ATMEGA163L-4XC ATMEGA103L-4XC
embedded code this application note written tested with ATmega163L, AT90S8515, AT90LS4433 microcontrollers. Complete projects with CodeVision Integrated Development Environment available. Configuration time from power-up using 3.69 oscillator 10.32 seconds Slave Serial mode 6.88 seconds Slave Parallel mode Xilinx Spartan XC2S100 bitstream. Slave Parallel mode simulated writing external data space AT90S8515 instead banging. ATICE200 In-Circuit Emulator used time configuration process. DataFlash serial, Non-volatile Memory (NVM) storage solution utilizing small pages non-volatile memory. DataFlash devices have SRAM buffers on-chip that used data management. size SRAM buffer equivalent size page device. Figure block diagram typical DataFlash device. Table lists different DataFlash devices available page size number SRAM buffers each device. Figure Typical DataFlash Block Diagram
RESET PAGE FLASH MEMORY ARRAY RDY/BUSY
BUFFER
BUFFER
INTERFACE
3301A-DFLSH-4/03
Table DataFlash Devices Available
Device AT45DB011B AT45DB021B AT45DB041B AT45DB081B AT45DB161B AT45DB321B AT45DB642B Page Size 1056 SRAM Buffers
Connection between Starter Kits
Table lists connector assignments between starter kits. user wishes duplicate this setup, make sure common ground connected between starter kits. Table Connector Assignments
Starter Name INIT PROG DONE CCLK ATSTK500 PORTD PORTD PORTD PORTD PORTD Spartan Demo Board
Required File Formats
embedded source code running requires flat binary image bitstream located DataFlash device. output Xilinx's Promgen program made produce flat ASCII file representing contents bitstream. following commands used convert output BitGen proper flat ASCII file.
Promgen counterss.bit counterss.bit specifies file output specifies byte swapping (byte swapping used prom programmers) specifies counting from address input bitstream file from BitGen
important note that BitGen tool needs create bitstream Slave Serial mode. output Promgen counterss.hex application XY-Modem contains ASCII binary file converter. Figure depicts screenshot File Convert Dialog box.
DataFlash: Configuring High-density FPGAs
3301A-DFLSH-4/03
DataFlash: Configuring High-density FPGAs
Figure File Convert Dialog
clicking open file icons, input output files specified. Once files have been entered click Convert button convert binary file format. After converting from ASCII binary, user either HyperTerminal XY-Modem downloading DataFlash device.
Transport Protocol In-System Programming
XmodemCRC XY-Modem selected because small-embedded footprint. Since XmodemCRC uses 128-byte data packet, doesn't impact microcontroller SRAM memory requirements greatly. very file transmission, packets padded with value 0xFF. result this padding scheme never tell were file determine that FPGA configured properly indicate when should stop reading from DataFlash, user must DONE FPGA performed ConfigureFPGA_xmodem routine. There file size information transmitted XmodemCRC protocol. Alternatively, Ymodem protocol could have been used transport mechanism. Ymodem protocol does embed file attributes first packet transmitted from host target. these attributes file size bytes. Having file size information makes more robust configuration scheme. example, DONE high before file read, number bytes read from DataFlash device equal file size bytes DONE low, then there problem which warrants further investigation. Also, Ymodem selected then buffer requirements would have been increased from XmodemCRC protocol 128-byte packets 1024-byte packets.
3301A-DFLSH-4/03
XY-Modem written take advantage small packet size XmodemCRC with file attribute information that Ymodem transmits first packet. XY-Modem transmits file size information first packet just like Ymodem, only uses 128-byte data packets, reducing SRAM memory requirements embedded microcontroller manageable level. Because file size information stored DataFlash, capability upload file added XY-Modem program help user verify contents DataFlash device after download. File size DONE FPGA both used determine completion FPGA configuration cycle ConfigureFPGA_xymodem routine. There methods configuring FPGA. proper selection either coupled download method used. XmodemCRC used store binary bitstream DataFlash device then ConfigureFPGA_xmodem should used boot FPGA. XY-Modem used store binary bitstream DataFlash device then ConfigureFPGA_xymodem should used boot FPGA. File size information stored page address DataFlash. actual bitstream data starts page address Since smallest page size DataFlash device bytes XY-Modem packet size bytes there some unused memory first page. This only applies XY-Modem used. XmodemCRC used, file size information present bitstream data stored starting page address routine that actually configures FPGA needs know where beginning data starts. XY-Modem used user configuring XC2V10000, AT45DB321-XX adequate storage capacity binary bitstream additional storage requirements file attributes.
Embedded Source Code
Source code compiled using CodeVision Integrated Development Environment. Main routine listed below.
void main(void)
unsigned char mode; level hardware initialization _low_level_init();
dataflash auto detect device density GetDeviceDensity(); #asm enable interrupts #endasm
read mode pins mode PINA;
turn correct LED's PORTC mode;
DataFlash: Configuring High-density FPGAs
3301A-DFLSH-4/03
DataFlash: Configuring High-density FPGAs
delay debounce ProgramDelay(); switch (mode) case (MD_X_RECEIVE) recvfile_xmodem(&buf[0]); break; case (MD_XY_SEND) sendfile_xymodem(&buf[0]); break; case (MD_XY_RECEIVE) recvfile_xymodem(&buf[0]); break; case (MD_CONFIGURE_X) (!fpga_done) ConfigureFPGA_xmodem(&buf[0]); break; case (MD_CONFIGURE_XY) (!fpga_done) ConfigureFPGA_xymodem(&buf[0]); break; while (1); main
power-up, hardware initialized _low_level_init. GetDeviceDensity called next which DataFlash device connected peripheral. Interrupts enabled then main do-while loop starts. Mode assigned value pins PINA LEDs updated reflect that. switches connected PORTA through supplied jumper cables shown Table Table Switch Connections Activated Routines
Switch Port Pins Routine Called when Pressed Recvfile_xmodem Sendfile_xymodem Recvfile_xymodem ConfigureFPGA_xmodem ConfigureFPGA_xymodem Reserved Reserved Reserved
3301A-DFLSH-4/03
LEDs connected PORTC through another supplied jumper cables. When user depresses pin, main switch statement initiates action, corresponding illuminated indicate routine active shown Table Table LEDs Connection Activated Routines
LEDs LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 Port Pins Routine Active when Illuminated Recvfile_xmodem Sendfile_xymodem Recvfile_xymodem ConfigureFPGA_xmodem ConfigureFPGA_xymodem Reserved Reserved Reserved
XY-Modem Screenshots
Figure lists Configure Communication Port dialog box. 8-bit data assumed. When click "OK" button, "ini" file called xymodem.ini containing settings stored install path. default configuration shown Figure Figure Configure Communication Port Dialog
DataFlash: Configuring High-density FPGAs
3301A-DFLSH-4/03
DataFlash: Configuring High-density FPGAs
Figure depicts Send File dialog box. Clicking open file icon allows browse desktop. Once path filename selected transmission click "Send" button. Make sure XY-Modem receive mode. Figure Send File Dialog
Figure depicts Receive File dialog box. Clicking open file icon allows browse desktop. Once path filename selected reception click "Receive" button. Make sure transmit mode. Figure Receive File Dialog
3301A-DFLSH-4/03
Source Code
XY-Modem program written using Borland Builder Rapid Application Development Environment. source code program included this application note made available user modification. InstallShield Wizard will locate source code software embedded code into folder that user specifies during installation. following enhancements suggested. Burst Read feature DataFlash device. After supplying initial burst read opcode, page address, byte address dummy clocks, every subsequent clock edge results data being made available output pin. device keeps outputting data every clock edge until memory array reached. that time address wraps around beginning array. RDY/BSY DataFlash device indicate when programming operation completed, thereby, increasing programming throughput. additional features ATmega163. Analog-to-Digital Converters used monitor system voltages report back status host processor. There also ample code space, data space spare MIPS used main processor application. external address data AT90S8515 configure FPGA Slave Parallel mode. This could decrease effective boot time.
Enhancements
Tools
Software
Studio® Instruction Simulator Debugger:
CodeVision Integrated Development Environment Compiler:
http://www.prllc.com/
Borland Builder
http://www.borland.com/
Hardware
ATSTK500 Microcontroller Starter Description:
Users Guide:
Spartan Demo Board:
DataFlash: Configuring High-density FPGAs
3301A-DFLSH-4/03
DataFlash: Configuring High-density FPGAs
Reference Material
XmodemCRC Receive Utility:
Using Atmel's Serial DataFlash:
Virtex® FPGA Series Configuration Readback:
Altera FPGA Configuration:
3301A-DFLSH-4/03
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3301A-DFLSH-4/03
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