General Porting Considerations Memory Clock sources Interrupts Power M

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General Porting Considerations Memory Clock sources Interrupts Power M

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AVR097: Migration between ATmega128 ATmega1281/ATmega2561
General Porting Considerations Memory Clock sources Interrupts Power Management Timers/Counters USART Analog Comparator ATmega103 Compatibility Operational Range
8-bit Microcontrollers Application Note
Introduction
This application note summarizes differences between ATmega128 ATmega1281/2561. detailed information devices, refer datasheets. ATmega128 ATmega1281/2561 designed functionality compatible family. This application note points differences aware when porting code between devices.
Rev. 2581E-AVR-07/06
General Porting Considerations
Between devices described this application note, some register bits different locations within register. addition some registers have changed names, some bits located different registers shown Table Table Table Changes register names
Register Name ATmega128 MCUCSR SFIOR Note: Register name ATmega1281/2561 MCUSR TWIAMR(1)
Address Mask Register. This feature Atmega1281/2561
Table Changes locations
Name SRW10 PSR321 ACME SM2, SM0, Note: ATmega128 Register MCUCR MCUCSR SFIOR SFIOR SFIOR MCUCR ATmega1281/2561 Register XMCRA MCUCR MCUCR GTCCR ADCSRB SMCR
name PSRSYNC Atmega1281/2561
make porting process easy possible, always refer registers positions using their defined names. Avoid using absolute addresses values. most cases, register names unchanged from device device. When porting design, more convenient include correct definition file device, rather than manually changing your addresses values. also considered good programming practice named references instead absolute values. example shown below.
PORTE (1<<PORTE5); ~(1<<PORTE5); port high port input
Configure USICR
avoid conflicts with added features register functionality, never access registers that marked reserved. Reserved bits should always written zero accessed. This ensures forward compatibility, added features will stay their default states when unused.
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Memory
sizes memories main difference between ATmega128, ATmega1281, ATmega2561. They summarized Table Table Memory sizes
FLASH [bytes] ATmega128 ATmega1281 ATmega2561 128k 128k 256k SRAM [bytes] EEPROM [bytes]
EEPROM
time wait programming EEPROM page different ATmega128 compared ATmega1281/2561. Typical programming times listed Table Note that ATmega1281/2561 additional option splitting EEPROM write into separate erase write operation. more details this feature refer datasheet application note: "AVR®103: Using EEPROM Programming Modes". Table Wait times when programming EEPROM
Typical programming time ATmega128 ATmega1281/2561
XRAM
register bits (External SRAM/XMEM Enable) SRW10 (Wait-state Select Bit) located MCUCR ATmega128 XMCRA ATmega1281/2561.
Clock sources
ATmega128 nearly same clock options, settings timing ATmega1281/2561. exception that ATmega1281/2561 additional internal 128kHz Oscillator. start-up delays ATmega1281/2561 have constant clock cycles added standard value compared ATmega128. functionality Clock Select bits (CKSEL3.0, SUT1,0, CKOPT) themselves equal between devices. Refer datasheet find matching settings clock select configuration. ATmega1281/2561 system clock prescaler that can/has altered runtime from application code achieve desired system clock frequency.
Interrupts
ATmega1281/2561 interrupts. ATmega128 interrupts. additional interrupts ATmega1281/2561 reflects additional features device. ATmega1281/2561 trigger 9-pin change events with different interrupt vectors. ATmega128 does have this feature.
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Power Management
ATmega1281/2561 Power Reduction Register (PRR) that provides method stop clock individual peripherals. ATmega128 does have this feature.
Brown Detection (BOD) options similar between devices, except that ATmega1281/2561 additional level support extended operation range. setting select configuration varies; Table Table show settings devices. Note that voltage levels slightly higher ATmega1281/2561 then ATmega128. Table fuse configuration ATmega128
BODEN BODLEVEL Typical VBOT disabled disabled
Table fuse configuration ATmega1281/2561
BODLEVEL Typical VBOT disabled
ATmega1281/2561 Enhanced Watchdog Timer (WDT), which improved compared ATmega128. used, still recommended disable initially application code clear unintentional enabled events. operation voltage WDTON fuse left unprogrammed, will behave similar both devices. frequency Watchdog Oscillator ATmega1281/2561 approximately supply voltages. typical frequency Watchdog Oscillator ATmega128 close time-out period increases with decreasing VCC. This means that selection Time-out period Watchdog Timer terms number Oscillator cycles) must reconsidered when porting design. ATmega128, Watchdog Timer either enabled disabled, while ATmega1281/2561 supports safety levels selected WDTON Fuse. ATmega1281/2561 watchdog interrupt mode that supported ATmega128. Refer ATmega1281/2561 datasheet Application note "AVR132 Enhanced Watchdog Timer" more information.
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Timers/Counters
Timer/counter equal between devices, except TIMSK registers. Here register names bits differently organized. Refer datasheets find configuration settings. Essentially timers/counters only swapped between devices. I.e. features timer ATmega128 found timer ATmega1281/2561, vice versa. mappings these timers also swapped. I.e. after porting code other timer features still associated with same other device. control registers differently organized between devices. Please check naming positioning registers associated with timer/counter when porting code, find settings according datasheets. When operating timer/counter2 from external 32.768 watch crystal external clock source, external capacitors must connected TOSC1/2 pins when using ATmega1281/2561, opposed ATmega128 where crystal connected directly between pins. Refer Atmega1281/2561 datasheet details crystal connections. ATmega1281/2561 Output Compare units both timer/counter while ATmega128 each.
USART
USART's equal between devices, except that ATmega1281/2561 additional master mode within USART that available ATmega128. additional interface support software implementation described "AVR320: Software Master".
Both devices have option internal 2.56V voltage reference. addition ATmega1281/2561 also option 1.1V internal voltage reference. Both devices have option "Free Running Mode". that ATmega1281/2561 also option many other auto trigger sources; name feature enable control register different. ATmega128 ADFR (ADC Free Running Select), ATmega1281/2561 ADATE (ADC Auto Trigger Enable). default setting ADATE "Free Running Mode". internal bandgap reference used ATmega128 typical 1.23V, ATmega1281/2561 1.1V.
Analog Comparator
ACME (Analog Comparator Multiplexer Enable) located different register bytes devices. ATmega128 located SFIOR, ATmega1281/2561 located ADCSRB. internal bandgap reference used ATmega128 typical 1.23V, ATmega1281/2561 1.1V.
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ATmega103 Compatibility
ATmega128 special option compatibility ATmega103. ATmega1281/2561 does have this option.
Operational Range
Table Operating voltage Speed grades.
Operating Voltage ATmega128 ATmega128L ATmega1281 ATmega2561 ATmega1281V/2561V 5.5V 5.5V 5.5V 5.5V 5.5V Speed Grade 5.5V 16MHz 5.5V 16MHz 5.5V 5.5V
ATmega1281 ATmega2561 packages
Note that ground paddle size ATmega128 ATmega1281/2561 different packaging type.
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2581E-AVR-07/06

General Porting Considerations Memory Clock sources Interrupts Power M

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