Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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High-performance, Low-power secureAVR Enhanced RISC Architecture
Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Power-down Modes Bond Locations Conforming 7816-2 Protection 4000V Operating Ranges: 1.62 5.50V Compliant with GSM, 3GPP 2000 Specifications, Industry Compatible Available Wafers, Modules, Industry-standard Packages
Memory
288K Bytes Program Memory 144K Bytes EEPROM, Including Bytes 384-byte Bit-addressable Bytes
128-byte Program Erase Program Erase Typically 500,000 Write/Erase Cycles Temperature Years Data Retention bytes Memory
Secure Microcontroller Smart Cards AT90SC288144RU Summary
Peripherals
Port 7816 Controller
Kbps Compliant with Protocols Programmable Internal Oscillator internal Clock) 16-bit Timers Random Number Generator (RNG) 2-level Interrupt Controller Hardware Triple Resistant Checksum Accelerator CRC16 Engine (Compliant with ISO/IEC 3309)
Security
Dedicated Hardware Protection Against SPA/DPA/SEMA/DEMA Attacks Advanced Protection Against Physical Attack, Including Active Shield, Environmental Protection Systems Voltage Monitor Frequency Monitor Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
Voyager Emulation Platform (ATV4) Support Software Development Embedded Workbench® V4.20 Debugger Atmel's Studio® Version 4.07
Above
Software Libraries Application Notes
6543AS-SPIC-080107
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Description
AT90SC288144RU low-power, high-performance, 8/16-bit microcontroller with program memory, EEPROM memory, based secureAVR enhanced RISC architecture. executing powerful instructions single clock cycle, AT90SC288144RU achieves throughputs close MIPS MHz. Harvard architecture includes general-purpose working registers directly connected ALU, allowing independent registers accessed single instruction executed clock cycle. AT90SC288144RU uses secureAVR architecture that allows linear addressing bytes code bytes data well number functional security features. AT90SC288144RU features 144K bytes high-performance EEPROM (fast erase/write time, high endurance). ability EEPROM code space allows parts program memory reprogrammed in-system. Additional security features include logical scrambling program data addresses, power analysis countermeasures, memory accesses controlled supervisor mode. Figure shows block diagram AT90SC288144RU
Figure AT90SC288144RU secureAVR Enhanced RISC Architecture
Data 8-bit EEPROM User Memory Program Memory Instruction Register Instruction Decoder Control Lines Status Register Counter measures Checksum Accelerator General Purpose Registers
Access Control
Secure Control
Data Memory Interrupt Unit Access Control 7816 Controller 7816 Port Timer Timer Reset Circuit
IN/OUT0
AT90SC288144RU
6543AS-SPIC-080107
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6543AS-SPIC-080107

Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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