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SIL12F 3.3V 5Vin Single
Introduction Models
Features
Mechanical Information
Mechanical Outline Drawing Pin-out Table Description Vout Ground +Vsense -Vsense Trim Power Good Margin Margin down Remote ON/OFF Layout Information
General Description
Electrical Description Physical Construction
System Interface Information
Input Characteristics Reflected Ripple Current Input Source Impedance Input Capacitance Output Characteristics Output Capacitance Converter Stability Transient Response Ripple Noise
Packaging Information
Packaging Labels Part Numbering Sequence
Safety Information
Safety Standards Approvals Fuse Information Safety Considerations
Operating Information
Over Temperature Protection Short Circuit Protection
Feature
Trimming Output Voltage Remote ON/OFF Remote Sense Parallel Series Operation Margin Down Power good UVLO
Thermal Information
Thermal Reference Point Thermal Derating Curves Thermal Test Set-up
Manufacturing Environment
Resistance Solder Heat Water Washing Control
Applications
Optimum Layout
Rev. 2006
File Name: an_sil12f_05.pdf
SIL12F Single Series
Introduction
There increasing demand converters that maintain good regulation presence very fast load transients (di/dt). This application note describes features functions Artesyn Technologies' SIL12F series non-isolated plated through-hole converter that specifically designed provide designer with modular solution fast transient demands. converters that designed this purpose leave alternative customer other than excessive amounts decoupling capacitance supply these transients. These capacitors expensive, take room (quite often more than converter), unreliable. SIL12F range includes number specific features overcome this issue enables 300A/µs performance. section 4.2.2 more details regarding transient performance capabilities SIL12F design. series 5.5VDC operating input voltage range operate over ambient temperature range modules fully protected against short-circuit overtemperature conditions. Standard features include remote ON/OFF, remote sense, power good. Automated manufacturing methods, together with extensive qualification program, ensure extremely reliable design. These Point Load modules targeted fixed mobile telecommunications, industrial electronics distributed power markets.
General Description
Electrical Description SIL12F design incorporates proprietary control scheme that specifically designed offer excellent transient response step loads. This provides extremely compact, fast, accurate power delivery solution voltage applications that require fast transient responses load steps 300A/µs. topology non-isolated, three terminal buck converter. output adjustable over range 0.9V 3.3V means external resistor from trim ground. output voltage default 3.3V, which trimmed down required setpoint within range. Section details. converter shut down remote ON/OFF input that referenced ground. This input compatible with popular logic devices; 'active Low' logic input supplied standard. converter also protected against over-temperature conditions. converter overloaded ambient temperature gets high, converter will shut down until temperature falls below minimum threshold. There thermal hysteresis typically 105°C 120°C temperature, protect unit. There requirement place external capacitance this design order meet parameters outlined datasheets. Please refer Section specific details what capacitance needs placed. Physical Construction SIL12F constructed using multi-layer PCB. Heat dissipation power components optimized, ensuring that control components thermally stressed. converter open-frame product case case pin. open-frame design several advantages over encapsulated closed devices. Among these advantages are: Cost: potting compound, case associated process costs involved. Thermals: heat removed from heat generating components without heating more sensitive, less tolerant components. Environmental: some encapsulants kind environment create problems incinerators. Further more open-frame converters more easily re-cycled. Reliability: open-frame modules more reliable number reasons, including improved thermal performance reduced stresses. separate paper discussing benefits open-frame DC/DC converters (Design Note 102) available www.artesyn.com
Models
SIL12F series comprises model, listed Table Model SIL12F-05W3V3-VJ Input Voltage 3.0V 5.5V Output Voltage 3.3V Output Current
Table SIL12F Models Note: design buck converter. Vout Volts, minimum input voltage Volts. RoHS Compliance Ordering Information part number indicates that part Pb-free (RoHS compliant). RoHS (non Pb-free) compliant versions available special request, please contact your local sales representative details.
Features High efficiency topology, typically 3.3Vout full load Wide ambient temperature range, -40°C +85°C 0.9V 3.3V output voltage adjustability minimum load requirement Continuous short-circuit protection Over-temperature protection (OTP) Differential Remote Sense Output voltage adjust/trim Power Good Remote ON/OFF Separate digital inputs output voltage margining RoHS compliant
File Name: an_sil12f_05.pdf (02): 2006
System Interface Information
Input Characteristics SIL12F series input voltage range 5.5V. wide input voltage range gives designers more flexibility choosing power source operate converter. outputs greater than 2.5V, minimum 4.5V. 4.1.1 Reflected Ripple Current Because switching operation design, there current generated input unit. This referred input reflected ripple current. typical ripple current SIL12F typically 20mA full load, with output 3.3V. 4.1.2 Input Source Impedance Input Capacitance SIL12F must connected source impedance. High source inductance affect loop stability. unit does require external input capacitance operate. However test environment necessary include external input capacitor ensure output source impedance bench power supply less than that input impedance unit under test. input capacitance should placed close converter-input pins decouple distribution inductance. external input capacitors must chosen suitable ripple current rating. Electrolytic capacitors should avoided. Recommended input capacitors ceramics such 10µF 1210 similar. Output Characteristics Output Capacitance SIL12F been designed stable operation with requirement external capacitance output terminals. recommend minimum 22µF ceramic caps. However, when powering loads with dynamic current requirements, improved voltage regulation obtained inserting extra capacitors close possible load. most effective technique locate ceramic capacitors (for example 22µF greater series from Murata similar) close load possible. These ceramic capacitors will handle short duration high frequency components dynamic current requirement. equally important good design practices when configuring distribution system. resistance inductance layout traces should utilized, particularly high current output section. Remember that capacitance distribution system associated within feedback loop power module. This have effect module's compensation capabilities resultant stability dynamic response performance. With large values capacitance, stability criteria depend magnitude with respect capacitance. much capacitance possible should outside remote sensing loop close load. Note that maximum rated value output capacitance models 10,000µF. Contact your local Artesyn Technologies representative further information larger output capacitance values required application. 4.2.1 Converter Stability SIL12F series been designed meet minimum criteria unity gain over line load operating conditions. topology design ensures unconditionally stable regardless duty cycle. 4.2.2 Transient Response Because difficulty many electronic loads generate high di/dt's evaluation card been specifically designed demonstrate fast transient response capability SIL12F. external circuit allows user program rate change current output unit under test. potentiometers evaluation board independently demonstrate response (both sinking sourcing) module their particular load step requirements. Test cards available request, please contact your Artesyn Technologies representative assistance. SIL12F been specifically designed provide designer with modular solution fast transient demands. Step load di/dt's 300A/µs accommodated this design. Transient response plots repeated Figures
Figure Typical Transient Response load Step di/dt 100A/µs
Figure Typical Transient Response
(Vin Vout 2.5V) Load Step di/dt 200A/µs Channel Deviation 5.6%; Settling Time 40µs
File Name: an_sil12f_05.pdf (02): 2006
www.artesyn.com
SIL12F Single Series
deviation recovery time will dependant load step applied unit rate change that load step. summary typical performance included table below. Deviation Recovery Deviation Recovery Vout Load Step di/dt (A/µs)
Mechanical Information
Mechanical Outline Drawing
1.500 [38.10]
0.472 [12.00]
0.612 [15.55]
(mV) Source
Time (µs)
(mV) Sink
Time (µs)
0.850 [21.59]
0.950 [24.13]
1.050 [26.67]
1.150 [29.21]
0.450 [11.43]
0.550 [13.97]
0.650 [16.51]
0.750 [19.05]
1.250 [31.75]
1.350 [34.29]
0.000 [0.00]
1.450 [36.83]
0.025[0.64] 0.025[0.64] Connector places
0.050 [1.27]
0.250 [6.35]
0.350 [8.89]
0.335 [8.50]
Dimensions Inches (mm) Tolerances (unless otherwise specified) ±0.10 (±0.25)
0.140 [3.56]
Figure Mechanical Outline Pin-out Table CONNECTIONS NUMBER FUNCTION Vout Ground Vout Ground Vout +Vsense -Vsense Trim Power Good Margin Margin Down Remote ON/OFF
4.8A
3.6A 3.6A
Table Typical Performance 4.2.3 Ripple Noise typical noise measurement outlined Figure When measuring output ripple noise, coaxial cable with termination resistor should used prevent impedance mismatch reflections disturbing noise readings higher frequencies.
Table Connections Description 5.3.1 Vout regulated positive power output with respect node. Figure Ripple Noise Measurement Vin=5V, Vout=3.3V, Iout=12A SIL12F range been designed comply with requirements EN61000. been tested passed radiated noise immunity (EN61000-4-3) conducted noise immunity (EN61000-4-4) both with normal performance. 5.3.2 Ground This common ground connection Vout power connections. also 0VDC reference control inputs. 5.3.3 +Vsense sense input allows regulation circuit compensate voltage drop between module load. optimal voltage accuracy Sense should connected Vout node bypass capacitor. also left disconnected. Section further details.
File Name: an_sil12f_05.pdf (02): 2006
5.3.4 -Vsense Vsense should connected ground bypass capacitor near load left open circuit. Section further details. 5.3.5 Trim 0.1W resistor must directly connected between this (GND) output voltage lower value than 3.3V. temperature stability resistor should ppm/°C better. point range from 3.3V 0.9V. left open circuit output voltage will default 3.3V. Section further details. 5.3.6 positive input voltage power node module,which referenced common GND. 5.3.7 Power Good This indicates status output voltage. Power Good driven output voltage deviates outside specified limits. 5.3.8 Margin When this input asserted high, output voltage increased This function independant trim sense. Section further details. 5.3.9 Margin Down When this input asserted high, output voltage decreased from nominal. This function independant trim sense. Section further details. 5.3.10 Remote ON/OFF Applying high level ground signal this input disables module's output turns output voltage. When Remote ON/OFF control active, input current drawn regulator significantly reduced. Remote ON/OFF left open-circuit, module will produce output whenever valid input source applied. Layout Information acts heat sink draws heat from unit conduction through pins through radiation. user must ensure that other components metal vicinity SIL12F meet spacing requirements which system approved. resistance inductance layout traces should used where possible, particularly when high currents flowing (e.g. output side). impedance track should connect input ground output ground maximize efficiency unit. section 11.5 recommended land patterns.
Packaging Information
Packaging SIL12F iare packaged individually anti-static bags, then anti-static foam boxes pieces Labels Part Numbering Sequence units series will clearly marked allow ease identification user. Figure gives details models.
SERIES TYPE SIL12F
SIL12F05W3V3-VJ ZYWWBR
05W3V3-VJ ZYWWBR REV. WEEK CODE MAN.LOCATION/YEAR CODE MODEL TYPE
Figure Part Numbering
Safety Information
Safety Standards Approvals models have full international safety approval including EN60950 UL/cUL1950. Please refer datasheet file numbers. Fuse Information order comply with safety requirements user must provide fuse unearthed input line. This prevent earth being disconnected event failure. fast blow fuse should used. Recommended fuse: Bussman ABC-V-10. Safety Considerations converter must installed guidelines outlined various safety agency approvals, safety agency approval required overall system.
File Name: an_sil12f_05.pdf (02): 2006
www.artesyn.com
SIL12F Single Series
Operating Information
Over-temperature Protection (OTP) SIL12F equipped with non-latching over-temperature protection. temperature sensor monitors internal temperature. temperature exceeds threshold 150°C (typical) converter will shut down, disabling output. When case temperature decreased between 20°C 30°C converter will automatically restart. unit experience over-temperature conditions during persistent overload output. Overload conditions caused external faults. might also entered loss control environmental conditions (e.g. increase converter's ambient temperature failing fan). Short Circuit Protection event short circuit unit will enter fault protection mode. Once source short circuit been removed unit will auto-recover, will remain undamaged while short circuit mode. This design protected only against extreme short circuits. unit protected over-load condition overtemperature protection device. However recommend operating this unit heavy over-load condition reduce lifetime converter.
Feature
Trimming Output Voltage SIL12F factory setpoint default 3.3V. setpoint user, required voltage down 0.9V. When trimmed down user, unit deliver output load 12A. This achieved placing external resistor between Trim Ground demonstrated below.
Vout
SIL12F
Trim Rtrim
Load
Common
Figure Output Trim-up Resistor Ground
Where Rtrim resistor placed between trim ground, Vout resultant output setpoint. VOUT Rtrim down 41.60 48.25 63.46 92.70 133.8 171.9 352.6 Open
Table Trim Resistor Table Above table resistors that used trim some standard voltage output setpoints. Rtrim calculated from following formula
Care needs taken when placing external trim resistor. Poor grounding layout this resistor result increase load regulation unit. resistor should placed directly between trim respective unit.
File Name: an_sil12f_05.pdf (02): 2006
Remote ON/OFF remote ON/OFF input allows external circuitry SIL12F converter into dissipation sleep mode. this mode input current approximately 5Vin. Active-low remote ON/OFF available standard. remote ON/OFF low, left floating, unit will power normal. Pulling high will turn unit. This signal compatible threshold levels. simplify design external control circuit, logic signal thresholds specified over full temperature range. maximum remote ON/OFF input open circuit voltage, well acceptable leakage currents, specified short form datasheet. remote ON/OFF input driven described Figure some applications converters connected series obtain higher output voltage. However this unit designed such operation, even with another SIL12F doing result catastrophic failure mode SIL12F. such case, load will pull current through NMOS body diode side switch. Pulling many amps current through body diodes, especially extended periods time, obviously recommended might have measurable impact device reliability. Margin Down margin margin down pins support voltage margining module's voltage fixed percentage. When margin+ pulled high nominal output voltage increased When margin- pulled high nominal voltage decreased When both pins pulled LOW, module regulates nominal output voltage. Power Good This control signal indicates status output voltage. When voltage within regulation this HIGH. event output voltage going outside regulation output driven LOW. UVLO undervoltage lockout feature protects regulator load when supply voltage falls below 2.5V. this occurs module disabled. Normal operation resumed supply voltage rises above 2.8V.
SIL12F
Vout
Load ON/OFF
Common
Figure Remote ON/OFF Remote Sense remote sense compensation feature minimises effect resistance distribution system facilitates accurate voltage regulation load terminals another selected point. remote sense line will carry very little current hence does require large cross-sectional area. However, sense line routed PCB, should located close ground plane order minimise noise coupled onto lines that might impair control loop stability. small 100nF ceramic capacitor connected point load decouple noise sense wires. module will compensate maximum drop nominal output voltage. However, unit already trimmed available remote sense compensation range will correspondingly reduced. Remember that when using remote sense compensation resistance, parasitic inductance capacitance distribution system incorporated into feedback loop power module. This have effect module's compensation capabilities, affecting stability dynamic response. Parallel Series Operation Because tight load regulation this design, parallel operation multiple converters recommended. unavoidable, some decoupling technique must incorporated onto user's design. should noted that this measure would adversely effect power conversion efficiency. However, load sharing supplied standard modification required. This version will allow user operate units parallel larger load requirements. Please contact your local Artesyn Technologies representative details.
File Name: an_sil12f_05.pdf (02): 2006
www.artesyn.com
SIL12F Single Series
Thermal Information
10.1 Thermal Reference Point electrical operating conditions determine much power dissipated within converter. following parameters further influence thermal stresses experienced converter: Ambient temperature velocity Thermal efficiency system application Parts mounted system that block airflow Real airflow characteristics converter location
OUTPUT CURRENT
maximum acceptable temperature measured thermal reference point 120°C. thermal reference point shown Figure
AMBIENT TEMPERATURE
Figure Thermal Derating Curves (Vin 5.0V Vout 0.9V)
OUTPUT CURRENT
Thermal Reference Point
Direction Airflow
Figure Thermal Reference Point Location 10.2 Thermal Derating Curves Thermal characterisation data presented here Figures These derating graphs show load current versus ambient temperature velocity, maximum safe operating area (SOA) various line output setpoint set-ups. calculated noting case temperature components unit applying derating each part. velocity direction indicated arrow Figure
AMBIENT TEMPERATURE
Figure Thermal Derating Curves (Vin 3.3V Vout 0.9V) 10.3 Thermal Test Set-up data taken with converter soldered test board, which closely represents typical application. test board 1.6mm, eight layer with inner layers consisting power ground planes. bottom layers contain minimal amount metalization. board board spacing inch used. data represented 0m/s curve indicates natural convection condition i.e. forced air. However, since thermal performance heavily dependent upon final system application, user needs ensure thermal reference point temperatures kept within recommended temperature rating. recommended that thermal reference point temperature measured using either gauge thermocouples camera. order comply with stringent Artesyn derating criteria, ambient temperature should never exceed 85°C. Please contact Artesyn Technologies further support.
OUTPUT CURRENT
AMBIENT TEMPERATURE
Figure Thermal Derating Curves (Vin 5.0V Vout 3.3V)
File Name: an_sil12f_05.pdf (02): 2006
Manufacturing Environment
11.1 Resistance Solder Heat These converters intended mounting. Artesyn Technologies determined well product resist temperatures associated with soldering components without affecting performance reliability. method used verify this MIL-STD-202 method 210D. Within this method test conditions were specified, Soldering Iron condition Wave Solder Condition soldering iron test, placed with recommended layout pattern shown section soldering iron applied each terminal seconds. then removed from test examined under microscope reflow solder physical change terminations. None found. wave solder test, again mounted test PCB. unit wave soldered using conditions shown Table inspected after soldering physical change found terminations.
0.078 (1.98)
Applications
12.1 Optimum Layout acts heat sink draws heat from unit conduction through pins through radiation. user must ensure that other components metal vicinity SIL15F meet spacing requirements which system approved. resistance inductance layout traces should used where possible, particularly when high currents flowing (e.g. output side). impedance track should connect input ground output ground maximize efficiency unit. VIEW FROM COMPONENT (TOP) SIDE
0.000 (0.00) 0.100 (2.54) 0.200 (5.08) 0.300 (7.62) 0.500 (12.70) 0.600 (15.24) 0.400 (10.16) 0.700 (17.78) 0.800 (20.32) 0.900 (22.86) 1.000 (25.40) 1.100 (27.94) 1.200 (30.48) 1.400 (35.55)
0.050 (1.26)
Copper Size: 0.080 (2.03) Finished Hole Size: 0.040 (1.02) Places
Temperature 260°C±5°C
Time 10sec±1
Temperature Ramp Preheat 4°C/sec 160°C. 25mm/sec rate
0.047 (1.20)
CONVERTER
0.209 (5.32)
1.500 (38.10)
Table Wave Solder Test Conditions 11.2 Water Washing Where possible, no-clean solder paste system should used solder attaching SIL15F product onto application boards. Both suitable water washing applications, because does have entrapment areas where water residues become trapped long term. However, user must ensure that drying process sufficient remove water from converter after washing never power converter unless fully dried. user's process must clean soldered assembly accordance with ANSI/J-STD001. 11.3 Control Both converter units manufactured controlled environment supplied conductive packaging prevent damage occurring before during shipping. essential that they unpacked handled using approved control procedures. Failure could affect lifetime converter.
DIMENSIONS INCHES (mm) TOLERANCES ±0.004 (0.10) Figure Recommended Footprint Multilayer
Application Note Artesyn Technologies® 2006 information specifications contained this Application Note believed correct time publication. However, Artesyn Technologies accepts responsibility consequences arising from printing errors inaccuracies. information specifications contained described herein subject change manner time without notice. rights under patent accompany sale such product(s) information contained herein.
File Name: an_sil12f_05.pdf (02): 2006
www.artesyn.com

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