26V, 380kHz, Asynchronous Step-Down Converter Features Wide Input
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APW7080
26V, 380kHz, Asynchronous Step-Down Converter Features
Wide Input Voltage from 4.5V Output Current Adjustable Output Voltage from 0.8V 90%VIN 0.8V Reference Voltage ±2.5% System Accuracy Integrated P-Channel Power MOSFET High Efficiency Pulse-Skipping Mode (PSM) Mode Operation Current-Mode Operation Stable with Ceramic Output Capacitors Fast Transient Response Power-On-Reset Monitoring Fixed 380kHz Switching Frequency Mode Built-in Digital Soft-Start Output Current-limit Protection with Frequency Foldback Undervoltage Protection Over-Temperature Protection <5µA Quiescent Current during Shutdown Thermal-enhanced SOP-8P Package Lead Free Available (RoHS Compliant) Efficiency
APW7080 asynchronous, step-down converter with integrated P-channel MOSFET. device, with current-mode control scheme, convert 4.5~26V input voltage output voltage adjustable from provide excellent output voltage regulation. APW7080 regulates output voltage automatic PSM/PWM mode operation, depending output current, high efficiency operation over light full load current.The APW7080 also equipped with power-onreset, soft-start whole protections (undervoltage, over temperature current-limit) into single package. shutdown mode, supply current drops below 5µA. This device, available 8-pin SOP-8P package, provides very compact system solution with minimal external components good thermal conductance.
VOUT VOUT =3.3V
Simplified Application Circuit
0.001 0.01
Output Current, IOUT
10µF UGND
APW7080
Applications
Monitor Set-Top Portable Wireless ADSL, Switch Notebook Computer Step-down Converters Requiring High Efficiency Output Current
VOUT +3.3V
22µF
COMP
(Optional)
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev. Oct., 2007 www.anpec.com.tw
APW7080
Ordering Marking Information
APW7080 Lead Free Code Handling Code Temperature Range Package Code
APW7080 XXXXX
Package Code SOP-8P Operating Ambient Temperature Range Handling Code Tape Reel Lead Free Code Lead Free Device XXXXX Date Code
APW7080
Note: ANPEC lead-free products contain molding compounds/die attach materials 100% matte plate termination finish; which fully compliant with RoHS compatible with both SnPb lead-free soldering operations. ANPEC lead-free products meet exceed leadfree requirements IPC/JEDEC STD-020C classification lead-free peak reflow temperature.
Configuration
UGND
COMP
SOP-8P View must connected Exposed
Absolute Maximum Ratings (Note
Symbol Parameter Supply Voltage (VIN GND) Voltage 100ns 100ns 6.2V 6.2V Rating -0.3 VIN+0.3 VIN+6 -0.3 VIN+0.3 -0.3 VIN+0.3 -0.3 6.5V -0.3 -0.3 +0.3 Unit
VUGND_GND VVIN_UGND
Supply Voltage (VCC GND) UGND Voltage UGND Voltage Voltage COMP Voltage Maximum Junction Temperature
TSTG TSDR
Storage Temperature Maximum Lead Soldering Temperature, Seconds
Note Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device.
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Thermal Characteristics
Symbol Parameter Junction-to-Ambient Resistance free
(Note
Typical Value SOP-8P
Unit
Junction-to-Case Resistance free (Note SOP-8P
Note measured with component mounted high effective thermal conductivity test board free air. exposed SOP-8P soldered directly PCB. Note case temperature measured center exposed underside SOP-8P package.
Recommended Operating Conditions
Symbol VOUT IOUT Supply Voltage Supply Voltage Converter Output Voltage Converter Output Current Input Capacitor VIN-to-UGND Input Capacitor Ambient Temperature Junction Temperature Parameter
(Note
Range 0.22 0.22 Unit
Note Refer typical application circuits
Electrical Characteristics
Refer typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V 85oC, unless otherwise specified. regulated internal regulator. Typical values TA=25oC.
Symbol SUPPLY CURRENT IVIN IVIN_SD IVCC IVCC_SD
Parameter
Test Conditions
APW7080
Unit
Supply Current Shutdown Supply Current Supply Current Shutdown Supply Current
0.85V, VEN=3V, LX=Open VIN=26V 5.0V, VFB=0.85V 5.0V 26V, Threshold 26V, 10mA 10mA
4.2V LINEAR REGULATOR Output Voltage Load Regulation Current-Limit VIN-to-UGND 5.5V LINEAR REGULATOR Output Voltage (VVIN-UGND) Load Regulation Current-Limit
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Electrical Characteristics (Cont.)
Refer typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V 85oC, unless otherwise specified. regulated internal regulator. Typical values TA=25oC.
Symbol Parameter Test Conditions APW7080 Unit
POWER-ON-RESET (POR) LOCKOUT VOLTAGE THRESHOLDS Voltage Threshold Hysteresis Lockout Voltage Threshold Lockout Hysteresis VIN-to-UGND Lockout Voltage Threshold VIN-to-UGND Lockout Hysteresis REFERENCE VOLTAGE VREF Reference Voltage 25oC, IOUT=0A, VIN=12V Output Voltage Accuracy Line Regulation Load Regulation OSCILLATOR DUTY FOSC Free Running Frequency Foldback Frequency Maximum Converter' Duty Cycle Minimum Pulse Width CURRENT-MODE CONVERTER Error Amplifier Transconductance Error Amplifier Gain Current-Sense Resistance P-channel Power MOSFET Resistance PROTECTIONS ILIM P-channel Power MOSFET Current-limit Under-voltage Threshold Under-voltage Hysteresis Under-voltage Debounce TOTP Over-temperature Trip Point Over-temperature Hysteresis SOFT-START, ENABLE INPUT CURRENTS Soft-Start Interval Preceding Delay before Soft-start Shutdown Voltage Threshold Enable Voltage Threshold Clamped Voltage falling, rising, IEN=10mA 10.8 10.8 Peak Current falling
rising rising
0.15
VVIN-UGND rising
-1.0 -2.5 125oC, IOUT 4.5V 26V, IOUT IOUT
0.36
+1.0 +2.5
µA/V
COMP Open Between Exposed Pad, TJ=25oC
0.12
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Electrical Characteristics (Cont.)
Refer typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V 85oC, unless otherwise specified. regulated internal regulator. Typical values TA=25oC.
Symbol Parameter Test Conditions APW7080 Unit
SOFT-START, ENABLE INPUT CURRENTS (Cont.) P-channel Power MOSFET Leakage Current Input Current Input Current 0.8V -100 -500 +100 +500
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Typical Operating Characteristics
Reference Voltage Junction Temperature
0.816
Switching Frequency Junction Temperature
Switching Frequency, FOSC (kHz)
0.812
Reference Voltage, VREF
0.808 0.804 0.800 0.796 0.792 0.788 0.784
Junction Temperature,
Junction Temperature,
Output Voltage Supply Voltage
3.36 3.35 3.34
Output Voltage Output Current
3.36 3.35 3.34
Output Voltage, VOUT
3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 3.24
Output Voltage, VOUT
3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 3.24
Supply Voltage,
Output Current, IOUT
Input Current Supply Voltage
=0.85V
Current-Limit Level (Peak Current) Junction Temperature
Current-Limit Level, ILIM
Input Current, IVIN (mA)
Supply Voltage, Copyright ANPEC Electronics Corp. Rev. Oct., 2007
Junction Temperature, (oC) www.anpec.com.tw
APW7080
Typical Operating Characteristics (Cont.)
Efficiency Output Current
VOUT VOUT=5V VOUT=3.3V
Clamp Voltage Input Current
Clamp Voltage,
1000 10000
=-30oC
Efficiency
0.001
=25oC
=100oC
VIN=12v, L=10µH (DCR=50m) C1=10µF, C4=22µF
0.01
Output Current, IOUT
Input Current, (µA)
Operating Waveforms
(Refer application circuit section "Typical Application Circuits", VIN=12V, VOUT=3.3V, L1=10µH)
Load Transient Response
50mA 50mA rise/f time=10µs
Load Transient Response
0.5A 0.5A rise/f time=10µs
VOUT
VOUT
0.5A
VOUT, 200mV/Div, Voltage Offset 3.3V IL1, 1A/Div, Time 50µs/Div
VOUT, 100mV/Div, Voltage Offset 3.3V IL1, 1A/Div, Time 50µs/Div
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Operating Waveforms (Cont.)
(Refer application circuit section "Typical Application Circuits", VIN=12V, VOUT=3.3V, L1=10µH)
Power
Power
VOUT
VOUT
VIN, 5V/Div, VOUT, 2V/Div, IL1, 2A/Div, Time 5ms/Div
VIN, 5V/Div, VOUT, 2V/Div, IL1, 2A/Div, Time 5ms/Div
Enable Through
Shutdown Through
VOUT
VOUT
VEN, 5V/Div, VOUT, 2V/Div, IL1, 2A/Div, Time 5ms/Div
VEN, 5V/Div, VOUT, 2V/Div, IL1, 2A/Div, Time 5ms/Div
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Operating Waveforms (Cont.)
(Refer application circuit section "Typical Application Circuits", VIN=12V, VOUT=3.3V, L1=10µH)
Over Current
Short Circuit
VOUT shorted ground short wire
VOUT
VOUT
VOUT, 1V/Div, IL1, 2A/Div, Time 50µs/Div
VOUT, 1V/Div, IL1, 2A/Div, Time 50ms/Div
Switching Waveform
0.2A
Switching Waveform
VLX, 5V/Div, IL1, 1A/Div, Time 1.25µs/Div
VLX, 5V/Div, IL1, 2A/Div, Time 1.25µs/Div
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Operating Waveforms (Cont.)
(Refer application circuit section "Typical Application Circuits", VIN=12V, VOUT=3.3V, L1=10µH)
Line Transient Response
rise/f time=20µ
VOUT
VOUT, 50mV/Div, Voltage Offset 3.3V VIN, 5V/Div, Voltage Offset Time 50µs/Div
Descriptions
NAME FUNCTION Power Input. supplies power (4.5V 26V) control circuitry, gate driver step-down converter switch. Connecting ceramic bypass capacitor suitably large capacitor between eliminates switching noise voltage ripple input Enable Input. digital input that turns regulator off. Drive high turn regulator, drive turn off. Pull with 100k resistor automatic startup. Gate driver power ground P-channel Power MOSFET. linear regulator regulates 5.5V voltage between UGND supply power P-channel MOSFET gate driver. Connect ceramic capacitor (1µF typ.) between UGND noise decoupling stability linear regulator. Bias input 4.2V linear regulator' output. This supplies bias some control circuits. 4.2V linear regulator converts voltage 4.2V supply bias when external power supply connected with VCC. Connect ceramic capacitor (1µF typ.) between noise decoupling stability linear regulator. Power Switching Output. Connect this underside Exposed Pad. Output error amplifier. Connect series network from COMP compensate regulation control loop. some cases, additional capacitor from COMP required noise decoupling. Feedback Input. senses feedback voltage regulate voltage 0.8V. Connecting with resistor-divider from output output voltage range from 0.8V VIN. Power Signal Ground. Power Switching Output. Drain P-channel MOSFET supply power output. Exposed provides current with lower impedance than Connect output filter top-layer thermal PCBs. will heat sink
UGND
COMP
(Exposed Pad)
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Block Diagram
Current Sense Amplifier
4.2V Regulator Power-On-Reset
Current Limit
70%VREF Soft-Start Fault Logic Inhibit Gate Control VREF 0.8V Error Amplifier Gate Driver
Soft-Start
Current Compartor
UGND
COMP
ENOK 2.5V Slope Compensation Over Temperature Protection Oscillator 380kHz
5.5V
0.8V
Enable
VIN-to-UGND Linear Regulator
Typical Application Circuits
4.5~26V Single Power Input Step-down Converter (with Ceramic Input/Output Capacitors)
10µF
UGND
4.5~26V
100K APW7080
COMP
VOUT
0.8V~90%VIN
22µF
(Optional)
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Typical Application Circuits (Cont.)
Recommended Feedback Compensation Network Components List:
VOUT
(µH)
(µF)
46.9 46.9 46.9 46.9
(pF)
(pF)
1500 1500 1000 1000 2200 2200 3300 3300 1500 1500 2700 2700
(pF)
Dual Power Inputs Step-down Converter (VIN=4.5~26V)
Schottky Diode
UGND
10µF
4.5~26V
100K APW7080
COMP
VOUT
0.8V~90%VIN
22µF
(Optional)
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Typical Application Circuits (Cont.)
4.5~5.5V Single Power Input Step-down Converter
10µF
UGND
4.5~5.5V
VOUT
100K
APW7080 COMP
0.8V~90%VIN
22µF
(Optional)
+12V Single Power Input Step-down Converter (with Electrolytic Input/Output Capacitors)
2.2µF
UGND
+12V 470µF
100K APW7080
COMP
10uH
+3.3V/4A
46.9k 470µF (ESR=30m)
VOUT
22pF
4700pF
33pF
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Typical Application Circuits (Cont.)
Inverting Converter with 4.5~5.5V Single Power Input
4.5~5.5V
10µF
100K
UGND
APW7080
6.8µH
COMP
PGND
22pF
560pF
27pF
AGND 22µF
VOUT
-8V/4A
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Functional Descriptions
Main Control Loop APW7080 constant frequency current mode switching regulator. During normal operation, internal P-channel power MOSFET turned each cycle when oscillator sets internal latch would turned when internal current comparator (ICMP) resets latch. peak inductor current which ICMP resets latch controlled voltage COMP pin, which output error amplifier (EAMP). external resistive divider connected between VOUT ground allows EAMP receive output feedback voltage pin. When load current increases, causes slight decrease relative 0.8V reference, which turn causes COMP voltage increase until average inductor current matches load current. Power-On-Reset(POR) Undervoltage Lockout APW7080 keeps monitoring voltage prevent wrong logic operations which occur when voltage high enough internal control circuitry operate. rising threshold 3.9V (typical) with 0.15V hysteresis. external undervoltage lockout (UVLO) sensed programmed pin. UVLO rising threshold 2.5V with 0.2V hysteresis. UVLO should programmed connecting resistive divider from GND. After VCC, VIN-to-UGND voltages exceed their respective voltage thresholds, starts start-up process then ramps output voltage setting output voltage. Connect network from turn-on delay that used sequence output voltages multiple devices. 4.2V Linear Regulator output terminal internal 4.2V linear regulator which powered from provides power APW7080. linear regulator designed stable with low-ESR ceramic output capacitor powers internal control circuitry. Bypass with ceramic capacitor least 0.22µF. Place capacitor physically close provide good noise decoupling. linear regulator intended powering external loads. connect external loads VCC. linear regulator also equipped with current-limit protection protect itself during over-load short-circuit conditions pin. VIN-to-UGND 5.5V Linear Regulator built-in 5.5V linear regulator regulates 5.5V voltage between UGND pins supply bias gate charge P-channel Power MOSFET gate driver. linear regulator designed stable with low-ESR ceramic output capacitor least 0.22µF. also equipped with current-limit function protect itself during over-load short-circuit conditions between UGND. APW7080 shuts output converters when output voltage linear regulator below 3.5V (typical). resumes working initiating softstart process when linear regulator' output voltage above undervoltage lockout voltage threshold. Digital Soft-Start APW7080 built-in digital soft-start control output voltage rise limit input current surge during start-up. During soft-start, internal ramp, connected positive inputs error amplifier, rises from replace reference voltage (0.8V) until ramp voltage reaches reference voltage. device designed with preceding delay about 10.8ms (typical) before soft-start process. Output Undervoltage Protection process operation, short-circuit occurs, output voltage will drop quickly. Before current-limit circuit responds, output voltage will fall required regulation range. undervoltage continually monitors voltage after soft-start completed. load step strong enough pull output voltage lower than undervoltage threshold, shuts down converter' output. undervoltage threshold nominal output
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Functional Descriptions (Cont.)
Output Undervoltage Protection (Cont.) voltage. undervoltage comparator built-in noise filter prevent chips from wrong shutdown caused noise. undervoltage protection works hiccup mode without latched shutdown. will initiate soft-start process preceeding delay. Over-Temperature Protection (OTP) over-temperature circuit limits junction temperature APW7080. When junction temperature exceeds +150oC, thermal sensor turns power MOSFET, allowing devices cool. thermal sensor allows converter start start-up process regulate output voltage again after junction temperature cooled 50oC. designed with 50oC hysteresis lowers average during continuous thermal overload conditions, increasing life time Enable/Shutdown Driving ground places APW7080 shutdown. When shutdown, internal power MOSFET turns off, internal circuitry shuts down quiescent supply current reduces <1µA (typical). Current-Limit Protection APW7080 monitors output current, flowing through P-channel power MOSFET, limits current peak current-limit level prevent loads from damages during overload short-circuit conditions. Frequency Foldback When output shorted ground, frequency oscillator will reduced about 80KHz. This lower frequency allows inductor current safely discharge, thereby preventing current runaway. oscillator' frequency will gradually increase designed rate when feedback voltage again approaches 0.8V.
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Application Information
Power Sequencing
APW7080 operate with sigle dual power input(s). dual-power applications, voltage (VCC) applied must lower than voltage (VIN) pin. reason internal parasitic diode from will conduct forward-voltage between VIN. Therefore must provided before VCC. Setting Output Voltage regulated output voltage determined
ICOUT
IOUT VOUT COUT
T=1/F
VOUT
Suggested range from 20K. portable applications, resistor suggested prevent stray pickup, locate resistors close APW7080. Input Capacitor Selection necessary turn P-channel power MOSFET (Q1) each time when using small ceramic capacitors high frequency decoupling bulk capacitors supply surge current. Place small ceramic capcaitors physically close between anode Schottky diode (D1) important parameters bulk input capacitor voltage rating current rating. reliable operation, select bulk capacitor with voltage current ratings above maximum input voltage largest current required circuit. capacitor voltage rating should least 1.25 times greater than maximum input voltage voltage rating times conservative guideline. current (IRMS) bulk input capacitor calculated following equation:
IOUT
IOUT
ICOUT
VOUT
VOUT
Figure Converter Waveforms
Output Capacitor Selection output capacitor required filter output supply load transient current. filtering requirements function switching frequency ripple current (I). output ripple voltages, having phase shift, across ideal output capacitor. peak-to-peak voltage calculated following equations:
VOUT VOUT FOSC
IRMS IOUT
where duty cycle power MOSFET. through hole design, several electrolytic capacitors needed. surface mount designs, solid tantalum capacitors used, caution must exercised with regard capacitor surge current rating.
VESR
where forward voltage drop diode. peak-to-peak voltage ideal output capacitor calculated following equations:
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APW7080
Application Information (Cont.)
Output Capacitor Selection (Cont.) VCOUT FOSC COUT greater core losses. reasonable starting point setting ripple current IOUT(MAX) Remember, maximum ripple current occurs maximum input voltage. minimum inductance inductor calculated using following equation:
VOUT VOUT) 380000 VOUT VOUT 456000
applications using bulk capacitors, COUT much smaller than ignored. Therefore, peak-to-peak output voltage (VOUT shown below:
VOUT
applications using ceramic capacitors, VESR much smaller than COUT ignored. Therefore, peak-to-peak output voltage (VOUT close VCOUT load transient requirements function slew rate (di/dt) magnitude transient load current. These requirements generally with capacitors careful layout. High frequency capacitors initially supply transient slow current load rate seen bulk capacitors. bulk filter capacitor values generally determined (Effective Series Resistance) voltage rating requirements rather than actual capacitance requirements. High frequency decoupling capacitors should placed close power pins load physically possible. careful inductance circuit board wiring that could cancel usefulness these inductance components. aluminum electrolytic capacitor' value related case size with lower available larger case sizes. However, Equivalent Series Inductance (ESL) these capacitors increases with case size reduce usefulness capacitor high slew-rate transient loading. Inductor Value Calculation operating frequency inductor selection interrelated that higher operating frequencies permit smaller inductor same amount inductor ripple current. However, this expense efficiency increase MOSFET gate charge losses. equation shows that inductance value direct effect ripple current. Accepting larger values ripple current allows inductances, results higher output voltage ripple
where VIN(MAX)
Output Diode Selection Schottky diode carries load current during off-time. average diode current therefore dependent P-channel power MOSFET duty cycle. high input voltages diode conducts most time. approaches VOUT diode conducts only small fraction time. most stressful condition diode when output short-circuited. Therefore, important adequately specify diode peak current average power dissipation exceed diode ratings. Under normal load conditions, average current conducted diode
VOUT IOUT
APW7080 equipped with whole protections reduce power dissipation during short-circuit condition. Therefore maximum power dissipation diode calculated from maximum output current
PDIODE(MAX)
where
IOUT IOUT(MAX)
Remember keep lead length short observe proper grounding avoid ringing increased dissipation.
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Layout Considerations
high power switching regulator, correct layout important ensure proper operation regulator. general, interconnecting impedance should minimized using short, wide printed circuit traces. Signal power grounds kept separate finally combined using ground plane construction single point grounding. Figure illustrates layout, with bold lines indicating high current paths. Components along bold lines should placed close together. Below checklist your layout:
SOP-8P
Place decoupling ceramic capacitor near close possible. bulk capacitors also placed near VIN. wide power ground plane connect Schottky diode provide impedance path between components large high slew rate current.
Begin layout placing power components first. Orient power circuitry achieve clean power
flow path. possible make connections side with wide, copper filled areas. Figure loops with same color bold lines conduct high slew rate current. These interconnecting impedances should minimized using wide, short printed circuit traces. Keep sensitive small signal nodes (FB, COMP) away from switching nodes others) PCB. Therefore place feedback divider feedback compensation network close avoid switching noise. Connect ground feedback divider directly using dedicated ground trace. decoupling capacitor should right next pins. Capacitor should connected close UGND pins possible.
VOUT Load
Figure Recommended Layout Diagram
Thermal Considerations Figure SOP-8P cost-effective package featuring small size, like standard SOP-8, bottom exposed minimize thermal resistance package, being applicable high current applications. exposed must soldered plane. copper plane layer conducts heat into air. Please enlarge area plan reduces case-to-ambient resistance (CA).
UGND APW7080
Load VOUT
SOP-8P
COMP
Ambient
(Optional) Feedback Divider
Exposed
plane
Compensation Network
Figure Current Path Diagram
Figure
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Package Information
SOP-8P
VIEW
THERMAL
0.25 GAUGE PLANE SEATING PLANE VIEW SOP-8P INCHES MAX. 1.75 MIN. MAX. 0.069 0.000 0.049 0.51 0.25 0.012 0.007 0.193 3.56 0.236 0.154 2.54 0.090 0.050 0.50 1.27 0.010 0.016 0.020 0.050 0.100 0.020 0.010 0.006 0.15
MILLIMETERS MIN.
0.00 1.25 0.31 0.17 4.90 6.00 3.90 2.29 1.27 0.25 0.40
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Carrier Tape Reel Dimensions
SECTION SECTION
Application
SOP- 8(P)
330.0± 2.00 4.0± 0.10
MIN. 8.0± 0.10
5.5± 0.05
12.4+2.00 13.0+0.50 0.30 1.75± 0.10 MIN. 20.2 MIN. 12.0± -0.00 -0.20 2.0± 0.05 1.5+0.10 -0.00 MIN.
0.6+0.00 6.40± 0.20 5.20± 0.20 2.10± 0.20 -0.40
(mm)
Devices Unit
Package Type SOP-
Unit
Tape Reel
Quantity
2500
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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APW7080
Reflow Condition (IR/Convection Reflow)
Ramp-up Tsmax Critical Zone
Temperature
Tsmin Preheat Rampdown
25°C Peak
Time
Reliability Test Program
Test item SOLDERABILITY HOLT Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C, 1000 Bias @125°C Hrs, 100%RH, 121°C -65°C~150°C, Cycles VHBM 2KV, 200V 10ms, 100mA
Classification Reflow Profiles
Profile Feature Average ramp-up rate Preheat Temperature (Tsmin) Temperature (Tsmax) Time (min max) (ts) Time maintained above: Temperature (TL) Time (tL) Peak/Classification Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds table 10-30 seconds Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds table 20-40 seconds
6°C/second max. 6°C/second max. minutes max. minutes max. Time 25°C Peak Temperature Notes: temperatures refer topside package. Measured body surface.
Copyright ANPEC Electronics Corp. Rev. Oct., 2007 www.anpec.com.tw
APW7080
Classification Reflow Profiles (Cont.)
Table SnPb Eutectic Process Package Peak Reflow Temperatures Package Thickness Volume <350 <2.5 +0/-5°C +0/-5°C Volume +0/-5°C +0/-5°C
Table Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume Volume Volume <350 350-2000 >2000 <1.6 +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* *Tolerance: device manufacturer/supplier shall assure process compatibility including stated classification temperature (this means Peak reflow temperature +0°C. example 260°C+0°C) rated level.
Customer Service
Anpec Electronics Corp. Head Office No.6, Dusing Road, SBIP, Hsin-Chu, Taiwan 886-3-5642000 886-3-5642050 Taipei Branch Lane 218, Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan 886-2-2910-3838 886-2-2917-3838
Copyright ANPEC Electronics Corp. Rev. Oct., 2007
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