Synchronous Buck Controller Single Power Supply Required 0.6V Ref

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Synchronous Buck Controller Single Power Supply Required 0.6V Ref

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APW7073
Synchronous Buck Controller
Single Power Supply Required 0.6V Reference with Accurate Shutdown Soft-start Function Programmable Frequency Range from 1000kHz Voltage Mode Control Design 100% Duty Cycle Under-Voltage Protection Over-Current Protection SOP-14 Package Lead Free Available (RoHS Compliant)
General Description
APW7073 voltage mode, synchronous controller which drives dual N-channel MOSFETs. device integrates control, monitoring protecting functions into single package, provides controlled power output with under-voltage over-current protections. APW7073 provides excellent regulation output load variation. internal 0.6V temperature-compensated reference voltage designed meet requirement output voltage applications. device includes 200kHz free-running triangle-wave oscillator that adjustable from 50kHz 1000kHz. APW7073 with excellent protection functions: POR, UVP. Power-On-Reset (POR) circuit monitor VCC, OCSET voltage make sure supply voltage exceeds their threshold voltage while controller running. Over-Current Protection (OCP) monitors output current using voltage drop across upper MOSFET' RDS(ON). When output current reaches trip point, controller will soft-start function until fault events removed. Under-Voltage Protection (UVP) monitors voltage (VFB) short-circuit protection, when less than VREF, controller will shutdown directly.
Typical Application Circuit
ROCSET APW7073 VOUT
Applications
Graphic Cards
Ordering Marking Information
APW7073 Lead Free Code Handling Code Temperature Range Package Code APW7073
APW7073 XXXXX
Package Code Operating Ambient Temperature Range Handling Code Tube Tape Reel Lead Free Code Lead Free Device Blank Original Device XXXXX Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials 100% matte plate termination finish; which fully compliant with RoHS compatible with both SnPb lead-free soldiering operations. ANPEC lead-free products meet exceed leadfree requirements IPC/JEDEC STD-020C classification lead-free peak reflow temperature.
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev. Nov., 2006 www.anpec.com.tw
APW7073
Configuration
OCSET COMP PVCC SOP-14 LGATE PGND BOOT UGATE PHASE
Absolute Maximum Ratings
Symbol VCC, VPVCC VBOOT VUGATE VLGATE VPHASE VRT, VOCSET VFB, VCOMP VPGND TSTG TSDR VESD VCC, PVCC BOOT PHASE
(Note 1,2) Parameter Rating -0.3 -0.3 VBOOT -0.3 VBOOT +0.3 VPVCC -0.3 VPVCC +0.3 -0.3 VCC+0.3 -0.3 -0.3 +0.3 Unit
UGATE PHASE <400ns pulse width >400ns pulse width LGATE PGND <400ns pulse width >400ns pulse width PHASE <400ns pulse width >400ns pulse width OCSET COMP PGND Junction Temperature Range Storage Temperature Soldering Temperature Seconds) Minimum Rating
Note Absolute Maximum Ratings those values beyond which life device impaired. Exposure absolute maximum rating conditions extended periods affect device reliability. Note device sensitive. Handling precautions recommended.
Thermal Characteristics
Symbol Parameter Junction-to-Ambient Thermal Resistance Free SOP-14 Value Unit
Recommended Operating Conditions
Symbol VCC, VPVCC VOUT IOUT Supply Voltage Converter Input Voltage Converter Output Voltage Converter Output Current Ambient Temperature Range Junction Temperature Range
Parameter
Rating 10.8 13.2 13.2
Unit
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Copyright ANPEC Electronics Corp. Rev. Nov., 2006
APW7073
Electrical Characteristics
Symbol Parameter (Note Unless otherwise specified, these specifications apply over VCC=12V, =-20~70°C. Typical values TA=25°C. Test Conditions APW7073 open pin: resistor GND; resistor (nominal 1.35V 2.95V) 0.60 10k, 10pF (NOTE3) 10k, 10pF
(NOTE3)
10.0
Unit
INPUT SUPPLY CURRENT Supply Current (Shutdown mode) UGATE, LGATE Supply Current Rising Threshold Falling Threshold Rising VOCSET Threshold VOCSET Hysteresis Voltage Rising threshold Voltage Hysteresis Voltage OSCILLATOR Accuracy FOSC Free Running Frequency Adjustment Range VOSC Duty VREF Ramp Amplitude Duty Cycle Range Reference Voltage Reference Voltage Tolerance ERROR AMPLIFIER Gain GBWP VCOMP VCOMP ICOMP ICOMP IUGATE RUGATE ILGATE RLGATE Open Loop Gain Open Loop Bandwidth Slew Rate Input Current COMP High Voltage COMP Voltage COMP Source Current COMP Sink Current Upper Gate Source Current Upper Gate Sink Impedance Lower Gate Source Current Lower Gate Sink Impedance Dead Time VCOMP VCOMP VBOOT 12V, VUGATE -VPHASE VBOOT 12V, IUGATE 0.1A VPVCC 12V, VLGATE VPVCC 12V, ILGATE 0.1A 1.25 1.88 V/us 1000 UGATE LGATE Open
POWER-ON RESET
REFERENCE
ERROR AMPLIFIER (Cont.) 10k, 10pF (NOTE3) 0.6V
GATE DRIVERS
PROTECTION Under Voltage Level IOCSET OCSET Source Current Soft-Start Charge Current Percent VREF VOCSET 11.5V
ENABLE/SOFT START
Note Guaranteed design
Copyright ANPEC Electronics Corp. Rev. Nov., 2006
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APW7073
Typical Operating Characteristics
UGATE Source Current UGATE Voltage
VBOOT =12V VPHASE=0V
UGATE Sink Current UGATE Voltage
VBOOT =12V VPHASE=0V
UGATE Source Current
UGATE Sink Current
UGATE Voltage
UGATE Voltage
LGATE Source Current LGATE Voltage
PVCC=12V
LGATE Sink Current LGATE Voltage
LGATE Source Current
VPVCC=12V
LGATE Sink Current
LGATE Voltage
LGATE Voltage(V)
Switching Frequency Junction Temperature
Reference Voltage Junction Temperature
0.602 0.601
Switching Frequency(KHz)
Reference Voltage(V)
0.599 0.598 0.597 0.596 0.595
0.594
Junction Temperature (°C) Copyright ANPEC Electronics Corp. Rev. Nov., 2006
Junction Temperature (°C) www.anpec.com.tw
APW7073
Operating Waveforms
Power
Power
=12V, Vin=12V VOUT =1.5V, L=1uH
=12V, Vin=12V VOUT =1.5V, L=1uH
CH1: (5V/div) CH2: (2V/div) CH3: VOUT (1V/div) Time: 10ms/div
CH1: (5V/div) CH2: (2V/div) CH3: VOUT (1V/div) Time: 2ms/div
(VEN=VCC)
Shutdown (VEN=VGND)
=12V, Vin=12V VOUT =1.5V, L=1uH
=12V, Vin=12V VOUT =1.5V, L=1uH
CH1: (5V/div) CH2: (5V/div) CH3: VOUT (1V/div) Time: 10ms/div
CH1: (5V/div) CH2: (5V/div) CH3: VOUT (1V/div) Time: 10ms/div
Copyright ANPEC Electronics Corp. Rev. Nov., 2006
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APW7073
Operating Waveforms (Cont.)
UGATE Rising
UGATE Falling
=12V, Vin=12V VOUT =1.5V, L=1uH
=12V, Vin=12V VOUT =1.5V, L=1uH
CH1: VUGATE (20V/div) CH2: VLGATE (5V/div) CH3: VPHASE (10V/div) Time: 50ns/div
CH1: VUGATE (20V/div) CH2: VLGATE (5V/div) CH3: VPHASE (10V/div) Time: 50ns/div
Load Transient Response
=12V, Vin=12V VOUT =1.5V, L=1uH
Under Voltage Protection
=12V, Vin=12V VOUT =1.5V, L=1uH
CH1: VOUT (500mV/div) CH4: IOUT (5A/div) Time: 200us/div
CH1: (5V/div) CH2: IOUT (5A/div) CH3: VOUT (1V/div) CH4: VUGATE (10V/div) Time: 10ms/div
Copyright ANPEC Electronics Corp. Rev. Nov., 2006
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APW7073
Operating Waveforms (Cont.)
Over Current Protection
Short Test
=12V, Vin=12V, VOUT =1.5V, L=1uH OCSET DS(ON)=8m
=12V, Vin=12V VOUT =1.5V, L=1uH
CH1: (5V/div) CH2: (10A/div) CH3: VOUT (1V/div) CH4: VUGATE (20V/div) Time: 10ms/div
CH1: (5V/div) CH2: (10A/div) CH3: VOUT (1V/div) CH4: VUGATE (20V/div) Time: 10ms/div
Copyright ANPEC Electronics Corp. Rev. Nov., 2006
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APW7073
Function Descriptions
Power supply input pin. Connect nominal power supply this pin. power-on reset function monitors input voltage this pin. recommended that decoupling capacitor 10uF) connected noise decoupling. PVCC OCSET This provides supply voltage lower gate drive, connect this normal use. BOOT This provides bootstrap voltage upper gate driver driving N-channel MOSFET. PHASE This return path upper gate driver. Connect this upper MOSFET source. This also used monitor voltage drop across MOSFET over-current protection. This signal ground pin. Connect good ground plane. PGND This power ground lower gate driver. should tied board. COMP This output error amplifier. used compensation components. This inverting input error amplifier. used output voltage compensation components. This also monitored undervoltage protection; voltage under reference voltage, device will shut down. UGATE This gate driver upper MOSFET output. This serves functions: shutdown control setting over current limit threshold. Pulling this below 1.3V will shutdown controller, forcing UGATE LGATE signals low. resistor (Rocset) connected between this drain high side MOSFET will determine over current limit. internal 200uA current source will flow through this resistor, creating voltage drop, which will compared with voltage across high side MOSFET. threshold over current limit therefore given 200uA ROCSET IPEAK OCSET RDS(ON) Pull this above 1.3V enable device pull this below 1.2V disable device. shutdown, discharged UGATE LGATE pins held low. Note that don' leave this open. This allows adjusting switching frequency. Connect resistor from ground increase switching frequency. Conversely, connect resistor from decrease switching frequency. LGATE This gate driver lower MOSFET output. Connect capacitor 30uA current source charges this capacitor soft-start time.
Copyright ANPEC Electronics Corp. Rev. Nov., 2006
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APW7073
Block Diagram
OCSET
Power-On Reset IOCSET 200uA
BOOT UGATE
Soft Start
50%VREF
O.C.P Comparator U.V.P Comparator
PHASE
PVCC
Comparator VREF Error Gate Control
LGATE
PGND
Oscillator Sawtooth Wave
COMP
Typical Application Circuits
1N4148
PVCC
OCSET
2.37K 470uFx2 0.1uF APM2509 2.2uH 470uF
BOOT UGATE
22nF
VOUT
PHASE
1.5nF APM2506 SCD24 1000uFx2
LGATE COMP
33nF 8.2nF 2.7K
PGND
68nF
Copyright ANPEC Electronics Corp. Rev. Nov., 2006
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APW7073
Functional Descriptions
Power Reset (POR) Power-On Reset (POR) function APW7073 continually monitors input supply voltage (VCC), enable (EN) OCSET pin. supply voltage (VCC) must exceed rising threshold voltage. voltage OCSET equal less fixed voltage drop OCSET VIN- VROCSET). pulled high with connecting resistor VCC. function initiates soft-start operation after VCC, OCSET voltages exceed their thresholds. operation with single +12V power source, equivalent +12V power source must exceed rising threshold. function inhibits operation disabled status low). With both input supplies above their thresholds, device initiates soft-start interval. Soft-Start/EN SS/EN pins control soft-start enable disable controller. Connect soft-start capacitor from soft-start interval. Figure1. shows soft-start interval. When reaches PowerOn-Reset threshold (9.5V), internal 30uA current source starts charge capacitor. When reaches enabled threshold about 1.8V, internal 0.6V reference starts rise follows error amplifier output (VCOMP) suddenly raises 1.35V, which valley triangle wave oscillator, leads VOUT start Until reaches about 4.2V, internal reference completes soft-start interval reaches 0.6V; then VOUT regulation. still rises 5.5V then stops. TSoft Start Where: external Soft-Start capacitor Soft-Start current=30uA
Time 1.8V 4.2V Voltage
Figure Soft-Start Internal
Over-Current Protection (monitor upper MOSFET) APW7073 monitors voltage across upper MOSFET OCSET over-current trip point. resistor (ROCSET) connected between OCSET drain upper MOSFET will determine over current limit. internal 200uA current source will flow through this resistor, creating voltage drop, which will compared with voltage across upper MOSFET. When voltage across upper MOSFET exceeds voltage drop across ROCSET, over-current will detected. threshold over current limit therefore given
ILIMIT IOCSET OCSET
over-current never occurred normal operating load range; variation parameters above equation should determined. MOSFET' RDS(ON) varied temperature gate source voltage, user should determine maximum RDS(ON) manufacturer' datasheet. minimum IOCSET (170uA) minimum ROCSET should used above equation. Note that ILIMIT current flow through upper MOSFET; ILIMIT must greater than maximum output current half inductor ripple current.
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APW7073
Functional Descriptions (Cont.)
Over-Current Protection (Cont.) over current condition will shut down device discharge with 30uA sink current then
Resistance
1000
initiate soft-start sequence. over current condition removed during soft-start interval, device will shut down while over current detected still rises complete cycle. soft start function will cycled until over current condition removed. Both over-current protections have same behavior while over current condition detected. Under Voltage Protection monitored during converter operation their Under Voltage (UV) comparator. voltage drops below reference voltage (50% 0.6V 0.3V), fault signal internally generated,
Frequency (KHz)
1000
Figure2. Oscillator Frequency Resistance
1000
Resistance
device turns both high-side low-side MOSFET converter' output latched floating. Switching Frequency APW7073 provides oscillator switching frequency adjustment. device includes 200kHz free-running triangle wave oscillator. operating higher frequency than 200KHz, connect resistor from ground increase switching frequency. Conversely, operating lower frequency than 200KHz, connect resistor from decrease switching frequency. Figure shows select resistor desired frequency. Figure shows more detail higher frequencies Figure shows lower frequency detail.
1000
Frequency (KHz) Figure3. Oscillator Frequency Resistance (High Frequency)
1000
Resistance
Frequency (KHz) Figure4. Oscillator Frequency Resistance (Low Frequency) Copyright ANPEC Electronics Corp. Rev. Nov., 2006 www.anpec.com.tw
APW7073
Application Information
Output Voltage Selection output voltage programmed with resistive divider. better resistors resistive divider recommended. inverter input error amplifier, reference voltage 0.6V. output voltage determined VOUT Where ROUT resistor connected from VOUT RGND resistor connected from GND. Output Inductor Selection inductor value determines inductor ripple current affects load transient response. Higher inductor value reduces inductor' ripple current induces lower output ripple voltage. ripple current ripple voltage approximated IRIPPLE VOUT VOUT Output Capacitor Selection Higher capacitor value lower reduce output ripple load transient drop. Therefore, selecting high performance capacitors intended switching regulator applications. some applications, multiple capacitors have parallel achieve desired value. small decoupling capacitor parallel bypassing noise also recommended, voltage rating output capacitors also must considered. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufacturer. Input Capacitor Selection input capacitor chosen based voltage rating current rating. reliable operation, select capacitor voltage rating least times higher than maximum input voltage. maximum current rating requirement approximately OUT/2, where IOUT load current. During power input capacitors have handle large amount surge current. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufacturer. high frequency decoupling, ceramic capacitor connected between drain upper MOSFET source lower MOSFET. MOSFET Selection selection N-channel power MOSFETs determined RDS(ON), reverse transfer capacitance (CRSS) maximum output current requirement. There components loss MOSFETs: conduction loss transition loss. upper lower MOSFET, losses approximately given following: PUPPER IOUT TC)(RDS(ON))D (0.5)( IOUT)(VIN)( tSW)FS PLOWER IOUT TC)(RDS(ON))(1-D) Where IOUT load current temperature dependency RDS(ON) switching frequency switching interval duty cycle
VOUT IRIPPLE where switching frequency regulator. Although increase inductor value frequency reduces ripple current voltage, tradeoff will exist between inductor' ripple current regulator load transient response time. smaller inductor will give regulator faster load transient response expense higher ripple current. Increasing switching frequency (FS) also reduces ripple current voltage, will increase switching loss MOSFET power dissipation converter. maximum ripple current occurs maximum input voltage. good starting point choose ripple current approximately maximum output current. Once inductance value been chosen, select inductor that capable carrying required peak current without going into saturation. some types inductors, especially core that made ferrite, ripple current will increase abruptly when saturates. This will result larger output ripple voltage.
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APW7073
Application Information (Cont.)
MOSFET Selection (Cont.) Note that both MOSFETs have conduction loss while upper MOSFET include additional transition loss. switching internal, tSW, function reverse transfer capacitance (1+TC) term factor temperature dependency RDS(ON) extracted from "RDS(ON) Temperature" curve power MOSFET. Compensation output filter step down converter introduces double pole, which contributes with -40dB/decade gain slope degrees phase shift control loop. compensation network among COMP, VOUT should added. compensation network shown Figure output filter consists output inductor output capacitors. transfer function filter given FESR COUT double poles filter, FESR zero introduced output capacitor.
PHASE
modulator shown Figure input output error amplifier output PHASE node. transfer function modulator given GAINPWM VOSC
Driver Comparator PHASE
Output Error Amplifier Driver
Figure Modulator
compensation network shown Figure provides close loop transfer function with highest zero crossover frequency sufficient phase margin. transfer function error amplifier given VCOMP GAINAMP VOUT R1//
Figure Output Filter
-40dB/dec
GAIN (dB)
poles zeros transfer function are:
Figure Compensation Network www.anpec.com.tw
FESR
-20dB/dec
COMP
Frequency(Hz)
Figure Filter GAIN Frequency Copyright ANPEC Electronics Corp. Rev. Nov., 2006
APW7073
Application Information (Cont.)
Compensation (Cont.) closed loop gain converter written GAINLC GAINPWM GAINAMP Figure shows asymptotic plot closed loop converter gain, following guidelines will help design compensation network. Using below guidelines should give compensation similar curve plotted. stable closed loop -20dB/ decade slope phase margin greater than degree. 1.Choose value usually between 2.Select desired zero crossover frequency (1/5 1/10) >FO>FESR following equation calculate VOSC 3.Place first zero before output filter double pole frequency FLC. 0.75 Calculate equation: 0.75 4.Set pole zero frequency FESR: FESR Calculate equation: FESR 5.Set second pole half switching frequency also second zero output filter double pole FLC. compensation gain should exceed error amplifier open loop gain, check compensation gain with capabilities error amplifier. Combine equations will following component calculations: COUT GAINLC COUT COUT
GAIN (dB) 20log (R2/R1) Compensation Gain 20log (VIN/VOSC)
poles zero this transfer functions are:
COUT
FESR Filter Gain Frequency(Hz) Converter Gain
Figure Converter Gain Frequency
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APW7073
Layout Considerations
Layout Considerations high switching frequency converter, correct layout important ensure proper operation regulator. With power devices switching 300KHz,the resulting current transient will cause voltage spike across interconnecting impedance parasitic circuit elements. example, consider turn-off transition MOSFET. Before turn-off, MOSFET carrying full load current. During turn-off, current stops flowing MOSFET free-wheeling lower MOSFET parasitic diode. parasitic inductance circuit generates large voltage spike during switching interval. general, using short, wide printed circuit traces should minimize interconnecting impedances magnitude voltage spike. signal power grounds kept separate till combined using ground plane construction single point grounding. Figure illustrates layout, with bold lines indicating high current paths; these traces must short wide. Components along bold lines should placed lose together. Below checklist your layout: Keep switching nodes (UGATE, LGATE PHASE) away from sensitive small signal nodes since these nodes fast moving signals. Therefore, keep traces these nodes short possible. traces from gate drivers MOSFETs (UGATE, LGATE) should short wide. Place source high-side MOSFET drain low-side MOSFET close possible. Minimizing impedance with wide layout plane between pads reduces voltage bounce node. Decoupling capacitor, compensation component, resistor dividers, boot capacitors, capacitors should close their pins. (For example, place decoupling ceramic capacitor near drain high-side MOSFET close possible. bulk capacitors also placed near drain). input capacitor should near drain upper MOSFET; output capacitor should near loads. input capacitor should close output capacitor lower MOSFET GND. drain MOSFETs (VIN PHASE nodes) should large plane heat sinking.
APW7073 PVCC BOOT
UGATE PHASE LGATE VOUT
Figure Layout Guidelines
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APW7073
Package Information
VIEW
0.25 GAUGE PLANE SEATING PLANE VIEW
SOP-14 MILLIMETERS MIN. MAX. 1.75 0.10 1.25 0.31 0.17 8.65 6.00 3.90 1.27 0.25 0.40 0.50 1.27 0.010 0.016 0.51 0.25 0.25 0.004 0.049 0.012 0.007 0.341 0.236 0.154 0.050 0.020 0.050 0.020 0.010 MIN. INCHES MAX. 0.069 0.010
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APW7073
Carrier Tape Reel Dimensions
Application SOP-14 (150mil)
330REF
100REF 0.50
13.0 1.50 (MIN)
16.5REF
16.0 2.10
0.3±0.05
1.75
(mm)
Cover Tape Dimensions
Application SOP- Carrier Width Cover Tape Width 21.3 Devices Reel 2500
Copyright ANPEC Electronics Corp. Rev. Nov., 2006
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APW7073
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material: 90/10 63/37 SnPb), 100%Sn Meets Specification RSI86-91, ANSI/J-STD-002 Category
Reflow Condition
(IR/Convection Reflow)
Critical Zone Ramp-up
Temperature
Tsmax
Tsmin Ramp-down Preheat
25°C Peak
Time
Classification Reflow Profiles
Profile Feature Average ramp-up rate Preheat Temperature (Tsmin) Temperature (Tsmax) Time (min max) (ts) Time maintained above: Temperature (TL) Time (tL) Peak/Classificatioon Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-down Rate Time 25°C Peak Temperature Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds table 10-30 seconds 6°C/second max. minutes max. Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds table 20-40 seconds 6°C/second max. minutes max.
Notes: temperatures refer topside package. Measured body surface.
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APW7073
Classification Reflow Profiles (Cont.)
Table SnPb Entectic Process Package Peak Reflow Temperatures Package Thickness <2.5 Volume <350 +0/-5°C +0/-5°C
Volume +0/-5°C +0/-5°C
Table Pb-free Process Package Classification Reflow Temperatures Volume Volume Volume <350 350-2000 >2000 <1.6 +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* Tolerance: device manufacturer/supplier shall assure process compatibility including stated classification temperature (this means Peak reflow temperature +0°C. example 260°C+0°C) rated level. Package Thickness
Reliability Test Program
Test item SOLDERABILITY HOLT Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C, 1000 Bias @125°C Hrs, 100%RH, 121°C -65°C~150°C, Cycles VHBM 2KV, 200V 10ms, 100mA
Customer Service
Anpec Electronics Corp. Head Office No.6, Dusing Road, SBIP, Hsin-Chu, Taiwan, R.O.C. 886-3-5642000 886-3-5642050 Taipei Branch 137, Lane 235, Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, 886-2-89191368 886-2-89191369
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Synchronous Buck Controller Single Power Supply Required 0.6V Ref

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