Synchronous Buck Controller Features Single Power Supply Required
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APW7065A
Synchronous Buck Controller Features
Single Power Supply Required Fast Transient Response 0~90% Duty Ratio 0.8V Reference with Accuracy Shutdown Function Controlling COMP Voltage Internal Soft-Start (1.7ms) Function Voltage Mode Control Design Under-Voltage Protection Over-Current Protection Sense Side MOSFET' RDS(ON) 300KHz Fixed Switching Frequency SOP-8P Package Lead Free Available (RoHS Compliant)
APW7065A uses fixed 300KHz switching frequency, voltage mode, synchronous controller which drives dual N-channel MOSFETs. device integrates control, monitoring protection functions into single package, provides controlled power output with under-voltage over-current protections. APW7065A provides excellent regulation output load variation. internal 0.8V temperature-compensated reference voltage designed meet requirement output voltage applications. built-in digital soft-start with fixed soft-start interval prevents output voltage from overshoot well limiting input current. APW7065A with excellent protection functions: POR, UVP. Power-On Reset (POR) circuit monitor supply voltage exceeds threshold voltage while controller running, built-in digital soft-start provides output with controlled voltage rise. Over-Current Protection (OCP) monitors
Applications
Graphics Card Mother Board
output current using voltage drop across lower MOSFET' RDS(ON), comparing with internal VOCP (0.29V), when output current reaches trip point, shuts converter initiates soft-start process. After over-current events counted, device turns both high-side low-side MOSFETs converter's output latched floating. requires restart. UnderVoltage Protection (UVP) monitors voltage short-circuit protection, when less than
PHASE COMP
Configuration
BOOT UGATE LGATE
VREF (0.4V), controller will shutdown directly.
SOP-8P (APW7065A)
Thermal (Connect Plane better heat dissipation)
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev. Jul., 2007 www.anpec.com.tw
APW7065A
Ordering Marking Information
APW7065A Lead Free Code Handling Code Temp. Range Package Code APW7065A APW7065 XXXXX Package Code SOP-8P Operating Ambient Temp. Range Handling Code Tape Reel Tube Lead Free Code Lead Free Device XXXXX Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials 100% matte plate termination finish; which fully compliant with RoHS compatible with both SnPb lead-free soldering operations. ANPEC lead-free products meet exceed lead-free requirements IPC/JEDEC STD-020C classification lead-free peak reflow temperature.
Absolute Maximum Ratings
Symbol VBOOT VUGATE VLGATE VPHASE VCOMP, TSTG TSDR BOOT PHASE UGATE PHASE <400ns pulse width >400ns pulse width LGATE PHASE COMP, Junction Temperature Range Storage Temperature Maximum Lead Soldering Temperature, Seconds <400ns pulse width >400ns pulse width <200ns pulse width >200ns pulse width Parameter Rating -0.3 -0.3 VBOOT+5 -0.3 VBOOT+0.3 VCC+5 -0.3 VCC+0.3 -0.3 -0.3 Unit
Note Absolute Maximum Ratings those values beyond which life device impaired. Exposure absolute maximum rating conditions extended periods affect device reliability. Note device sensitive. Handling precautions recommended.
Thermal Characteristics
Symbol Parameter Junction-to-Ambient Thermal Resistance Free SOP-8P Junction-to-Case Thermal Resistance SOP-8P Value Unit
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APW7065A
Recommended Operating Conditions
Symbol VOUT IOUT Supply Voltage Converter Output Voltage Converter Input Voltage Converter Output Current Ambient Temperature Range Junction Temperature Range Parameter Range 10.8 13.2 13.2 Unit
Electrical Characteristics
Unless otherswise specified, these specifications apply over VCC=12V, =-20~70oC. Typlcal values TA=25oC.
APW7065A SUPPLY CURRENT IVCC Nominal Supply Current Shutdown Supply Current POWER-ON RESET Rising Threshold Falling Threshold COMP Shutdown Threshold COMP Shutdown Hysteresis OSCILLATOR FOSC VOSC VREF Free Running Frequency Ramp Amplitude VP-P UGATE LGATE Open UGATE, LGATE
Symbol
Parameter
Test Conditions
Unit
REFERENCE VOLTAGE Reference Voltage Accuracy ERROR AMPLIFIER Gain GBWP Open Loop Gain Open Loop Bandwidth Slew Rate Input Current VCOMP VCOMP ICOMP ICOMP COMP High Voltage COMP Voltage RL=10K, CL=10pF(Note3) RL=10K, CL=10pF(Note3) RL=10K, CL=10pF(Note3) 0.8V(Note3) V/µs Measured =-20~70°C -1.0 +1.0
ERROR AMPLIFIER (Cont.) COMP Source Current COMP Sink Current VCOMP=2V VCOMP=2V
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APW7065A
Electrical Characteristics (Cont.)
Unless otherswise specified, these specifications apply over VCC=12V, =-20~70oC. Typlcal values TA=25oC.
APW7065A Symbol GATE DRIVERS IUGATE IUGATE ILGATE ILGATE RUGATE RUGATE RLGATE RLGATE VOCP VUVP Upper Gate Source Current Upper Gate Sink Current Lower Gate Source Current Lower Gate Sink Current Upper Gate Source Impedance Upper Gate Sink Impedance Lower Gate Source Impedance Lower Gate Sink Impedance Dead Time VBOOT 12V, VUGATE -VPHASE VBOOT 12V, VUGATE -VPHASE 12V, VLGATE 12V, VLGATE VBOOT 12V, IUGATE 0.1A VBOOT 12V, IUGATE 0.1A 12V, ILGATE 0.1A 12V, ILGATE 0.1A 1.05 1.25 1.95 1.88 Parameter Test Conditions Unit
PROTECTIONS Over-Current Reference Voltage Under-Voltage Threshold Trip Point =-20~70°C Percent VREF 0.27 0.29 0.31
SOFT-START Tdelay Soft-Start Interval Delay Time (Note
Note Guaranteed design.
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Typical Operating Characteristics
Switching Frequency Junction Temperature
Reference Voltage Junction Temperature
0.804 VCC=12V
Switching Frequency(KHz)
VCC=12V
0.802
Reference Voltage(V)
0.798 0.796 0.794 0.792
Junction Temperature
Junction Temperature
UGATE Source Current UGATE Voltage
UGATE Sink Current UGATE Voltage
VBOOT=12V
UGATE Source Current
VBOOT=12V
UGATE Sink Current
UGATE Voltage
UGATE Voltage
LGATE Source Current LGATE Voltage
VCC=12V
LGATE Sink Current LGATE Voltage
LGATE Source Current
LGATE Sink Current
VCC=12V
LGATE Voltage
LGATE Voltage
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Typical Operating Characteristics
Power
CC=12V, IN=12V =1.2V, L=1µH
Power
CC=12V, IN=12V =1.2V, L=1µH
CH1: (5V/div) CH2: VOUT (1V/div) CH3: VCOMP (1V/div) CH4: VUGATE (20Vdiv) Time: 10ms/div
CH1: (5V/div) CH2: VOUT (1V/div) CH3: VCOMP (1V/div) CH4: VUGATE (20Vdiv) Time: 10ms/div
(EN=VCC)
CC=12V, IN=12V =1.2V, L=1µH
Shutdown (EN=GND)
CC=12V, IN=12V =1.2V, L=1µH
CH1: VCOMP (1V/div) CH2: VOUT (1V/div) CH3: VUGATE (20V/div) CH4: VLGATE (10Vdiv) Time: 2ms/div
CH1: VCOMP (1V/div) CH2: VOUT (1V/div) CH3: VUGATE (20V/div) CH4: VLGATE (10Vdiv) Time: 50µs/div
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APW7065A
Typical Operating Characteristics (Cont.)
UGATE Rising
CC=12V, =12V =1.2V, L=1µH
UGATE Falling
CC=12V, =12V =1.2V, L=1µH
CH1: VUGATE (20V/div) CH2: VLGATE (5V/div) CH3: VPHASE (10V/div) Time: 50ns/div
CH1: VUGATE (20V/div) CH2: VLGATE (5V/div) CH3: VPHASE (10V/div) Time: 50ns/div
Load Transient Response
CC=12V, =12V =1.2V, L=1µH
Under Voltage Protection
CC=12V, IN=12V =1.2V, L=4.7µH
CH1: VOUT (500mV/div) CH2: IOUT (5A/div) Time: 200µs/div
CH1: (10A/div) CH2: VOUT (1V/div) CH3: VUGATE (20V/div) CH3: VLGATE (10V/div) Time: 100µs/div
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Typical Operating Characteristics (Cont.)
Over Current Protection
CC=12V, IN=12V =1.2V, L=1µH
Short Test
CC=12V, IN=12V, =1.2V L_side:APM3023, Rds(ON)=17m
CH1: (10A/div) CH2: VOUT (1V/div) CH3: VUGATE (20V/div) CH3: VLGATE (10V/div) Time: 2ms/div
CH1: (10A/div) CH2: VOUT (2V/div) CH3: VUGATE (20V/div) CH3: VLGATE (10V/div) Time: 5ms/div
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Functional Description
BOOT (Pin bootstrap circuit with diode connected used create voltage suitable drive logic-level N-channel MOSFET. UGATE (Pin Connect this high-side N-channel MOSFET' gate. This provides gate drive high-side MOSFET. (Pin terminal provides return path bias current low-side MOSFET driver' pull-low current. Connect system ground very impedance layout PCBs. LGATE (Pin Connect this low-side N-channel MOSFET' gate. This provides gate drive low-side MOSFET. (Pin Connect this supply voltage. This provides bias supply control circuitry low-side MOSFET driver. voltage this monitored Power-On Reset (POR) purpose. recommended that decoupling capacitor 10µF) connected noise decoupling. (Pin This inverting input internal error amplifier. Connect this output (VOUT) converter external resistor divider closed-loop operation. output voltage resistor divider determined using following formula
VOUT
COMP (Pin This output error amplifier. used compensation components. addition, pulled below 1.2V, will disable device. PHASE (Pin This return path upper gate driver. Connect this upper MOSFET source. This also used monitor voltage drop across MOSFET over-current protection.
where resistor connected from VOUT resistor connected from GND. also monitored under voltage events.
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Block Diagram
BOOT PowerOn Reset Sense Side Digital Soft Start O.C.P Comparator 0.29V 50%VREF Error Comparator Gate Control LGATE U.V.P Comparator UGATE
PHASE
VREF Oscillator Sawtooth Wave FOSC 300KHz
COMP
Typical Application Circuit
2.2R BOOT UGATE PHASE LGATE 33nF 8.2nF 2.7K 0.1µF APM2509 APM2506 470µFx2 470µF 1N4148 (12V)
2N7002 ON/OFF COMP
VOUT (1.2V)
470µFx2
68nF
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Functional Description
Power Reset (POR) Power-On Reset (POR) function APW7065A continually monitors input supply voltage (VCC) COMP pin. supply voltage (VCC) must exceed rising threshold voltage. function initiates soft-start operation after COMP voltages exceed their thresholds. operation with single +12V power source, equivalent +12V power source must exceed rising threshold. function inhibits operation disabled status (VCOMP less than 1.2V). With both input supplies above their thresholds, device initiates soft-start interval. Soft-Start APW7065A built-in digital soft-start control output voltage rise limit current surge during start-up. Figure when exceeds rising threshold voltage, delay time counted from then soft-start will enabled. During soft-start, internal ramp connected positive inputs amplifier rises from replace reference voltage (0.8V) until ramp voltage reaches reference voltage. soft-start interval decided oscillator frequency (300KHz). formulation given Tsoft start 512/FOSC 1.7ms Figure shows more details voltage ramp. voltage soft-start ramp formed with many small steps voltage. voltage step about 12.5mV period step about 8/FOSC. This method provides controlled voltage rise prevents large peak current charge output capacitor.
Voltage
12.5mV Voltage(V)
8/Fosc
Time
Figure Controlled Stepped Voltage during Soft Start Over-Current Protection over-current protection monitors output current using voltage drop across lower MOSFET' RDS(ON) this voltage drop will compared with internal 0.29V reference voltage. voltage drop across lower MOSFET' DS(ON) larger than 0.29V, over-current condition detected. shuts converter initiates soft-start process. After over-current events counted, device turns both high-side low-side MOSFETs converter's output latched floating. requires restart. threshold over current limit given
ILimit 0.29 RDS(
over-current never occurred normal operating load range; variation parameters above equation should determined. MOSFET' RDS(ON) varied temperature gate source voltage, user should determine maximum RDS(ON) manufacturer' datasheet.
minimum Vocset should used above equation. Note that ILIMIT current flow through lower MOSFET; ILIMIT must greater than maximum output current half inductor ripple current.
VOUT
Time
Figure Soft Start Interval
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APW7065A
Functional Description (Cont.)
Shutdown Enable Pulling COMP voltage open drain transistor, shown Typical Application Circuit, shutdowns APW7065A controller. shutdown mode, UGATE LGATE turn pull PHASE respectively. Under Voltage Protection monitored during converter operation internal Under Voltage (UV) comparator. voltage drops below reference voltage (50% 0.8V 0.4V), fault signal internally generated, device turns both high-side low-side MOSFET converter' output latched floating.
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APW7065A
Application Information
Output Voltage Selection output voltage programmed with resistive divider. Using better resistors resistive divider recommended. inverter input error amplifier, reference voltage 0.8V. output voltage determined
Output Capacitor Selection Higher capacitor value lower reduce output ripple load transient drop. Therefore, selecting high performance capacitors intended switching regulator applications. some applications, multiple capacitors have parallel achieve desired value. small decoupling capacitor parallel bypassing noise also recommended, voltage rating output capacitors also must considered. tantalum capacitors used, make sure they have been done surge test manufactures. doubt, consult capacitors manufacturer. Input Capacitor Selection input capacitor chosen based voltage rating current rating. reliable operation, select capacitor voltage rating least times higher than maximum input voltage. maximum current rating requirement approximately IOUT/2, where IOUT load current. During power input capacitors have handle large amount surge current. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufacturer. high frequency decoupling, ceramic capacitor connected between drain upper MOSFET source lower MOSFET. MOSFET Selection selection N-channel power MOSFETs determined RDS(ON), which reverses transfer capacitance (CRSS) maximizes output current requirement. There components loss MOSFETs: conduction loss transition loss. upper lower MOSFET, losses approximately given following: PUPPER IOUT TC)(RDS(ON))D (0.5)( IOUT)(VIN)( tSW)FS PLOWER IOUT TC)(RDS(ON))(1-D) Where IOUT load current temperature dependency RDS(ON) switching frequency
where ROUT resistor connected from VOUT RGND resistor connected from GND. Output Inductor Selection inductor value determines inductor ripple current affects load transient response. Higher inductor value reduces inductor' ripple current induces lower output ripple voltage. ripple current ripple voltage approximated
IRIPPLE
VOUT
VOUT IRIPPLE
where switching frequency regulator. Although increase inductor value reduces ripple current voltage, tradeoff will exist between inductor' ripple current regulator load trans sient response time. smaller inductor will give regulator faster load transient response expense higher ripple current. maximum ripple current occurs maximum input voltage. good starting point choose ripple current approximately maximum output current. Once inductance value been chosen, select inductor that capable carrying required peak current without going into saturation. some types inductors, especially core that made ferrite, ripple current will increase abruptly when saturates. This will result larger output ripple voltage.
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APW7065A
Application Information (Cont.)
MOSFET Selection (Cont.) switching interval duty cycle Note that both MOSFETs have conduction loss while upper MOSFET, including additional transition loss. switching internal, function reverse transfer capacitance CRSS. (1+TC) term factor temperature dependency RDS(ON) extracted from "RDS(ON) Temperature" curve power MOSFET. Compensation output filter step down converter introduces double pole, which contributes with -40dB/decade gain slope degrees phase shift control loop. compensation network among COMP, VOUT should added. compensation network shown Figure output filter consists output inductor output capacitors. transfer function filter given GAINLC COUT COUT COUT
VOSC
-40dB/dec GAIN (dB)
FESR -20dB/dec
Frequency(Hz)
Figure Filter GAIN Frequency modulator shown Figure input output error amplifier output PHASE node. transfer function modulator given GAINPWM VOSC
Driver Comparator PHASE Output Error Amplifier Driver
poles zero this transfer functions are:
COUT
COUT
FESR
Figure Modulator compensation network shown Figure provides close loop transfer function with highest zero crossover frequency sufficient phase margin. transfer function error amplifier given
double poles filter, FESR zero introduced output capacitor.
PHASE OUTPUT
COUT
GAINAMP
VCOMP VOUT
R1//
Figure Output Filter
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APW7065A
Application Information (Cont.)
Compensation (Cont.)
poles zeros transfer function are:
3.Place first zero before output filter double pole frequency FLC. 0.75 Calculate equation: 0.75
(R1+
4.Set pole zero frequency FESR: FESR Calculate equation:
FESR
VOUT
5.Set second pole half switching frequency also second zero output filter double pole FLC. compensation gain should exceed error amplifier open loop gain, check
VCOMP
VREF
compensation gain with capabilities error amplifier. Combine equations will following com-
Figure Compensation Network closed loop gain converter written GAINLC GAINPWM GAINAMP Figure shows asymptotic plot closed loop converter gain, following guidelines will help design compensation network. Using below guidelines should give compensation similar curve plotted. stable closed loop -20dB/ decade slope phase margin greater than degree. 1.Choose value usually between 2.Select desired zero crossover frequency (1/5 1/10) >FO>FESR following equation calculate VOSC
ponent calculations:
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Application Information (Cont.)
Compensation (Cont.)
keep traces these nodes short possible. traces from gate drivers MOSFETs (UG, should short wide.
GAIN (dB)
Place source high-side MOSFET drain low-side MOSFET close possible.
Compensation Gain
20log (R2/R1)
20log (VIN/VOSC)
Minimizing impedance with wide layout plane between pads reduces voltage bounce node. Decoupling capacitor, compensation component,
FESR Filter Gain Frequency(Hz) Converter Gain
resistor dividers, boot capacitors should close their pins. (For example, place decoupling ceramic capacitor near drain high-side MOSFET close possible. bulk capacitors also placed near drain). input capacitor should near drain upper MOSFET; output capacitor should near loads. input capacitor should close output capacitor lower MOSFET GND. drain MOSFETs (VIN PHASE nodes) should large plane heat sinking.
Figure Converter Gain Frequency Layout Considerations high switching frequency converter, correct layout important ensure proper operation regulator. With power devices switching 300KHz,the resulting current transient will cause voltage spike across interconnecting impedance parasitic circuit elements. example, consider turn-off transition MOSFET. Before turn-off, MOSFET carrying full load current. During turn-off, current stops flowing MOSFET free-wheeling lower MOSFET parasitic diode. parasitic inductance circuit generates large voltage spike during switching interval. general, using short, wide printed circuit traces should minimize interconnecting impedances magnitude voltage spike. addtion, signal power grounds kept separate till combined using ground plane construction single point grounding. Figure illustrates layout, with bold lines indicating high current paths; these traces must short wide. Components along bold lines should placed lose together. Below checklist your layout: Keep switching nodes (UGATE, LGATE PHASE) away from sensitive small signal nodes since these nodes fast moving signals. Therefore,
APW7065A BOOT UGATE PHASE LGATE
VOUT
Figure Layout Guidelines
Copyright ANPEC Electronics Corp. Rev. Jul., 2007
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APW7065A
Package Information
SOP-8P
VIEW THERMAL
0.25 GAUGE PLANE SEATING PLANE VIEW
SOP-8P MILLIMETERS MIN. MAX. 1.75 0.00 1.25 0.31 0.17 4.90 1.50 6.00 3.90 1.00 1.27 0.25 0.40 0.50 1.27 0.010 0.016 3.00 0.039 0.050 0.020 0.050 4.00 0.059 0.236 0.154 0.118 0.51 0.25 0.15 0.000 0.049 0.012 0.007 0.193 0.157 0.020 0.010 MIN. INCHES MAX. 0.069 0.006
Note Followed from JEDEC MS-012 Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed side Dimension does include inter-lead flash protrusions. Inter-lead flash protrusions shall exceed side.
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APW7065A
Carrier Tape Reel Dimensions
Application
330±1
SOP-8P
12.75
12.4 +0.2
5.2±
2.1±
1.75± 0.3±0.013
1.55±0.1 1.55+ 0.25
(mm)
Devices Unit
Package Type SOP- Unit Tape Reel Quantity 2500
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APW7065A
Reflow Condition (IR/Convection Reflow)
Ramp-up Tsmax Critical Zone
Temperature
Tsmin Ramp-down Preheat
25°C Peak
Reliability Test Program
Test item SOLDERABILITY HOLT Latch-Up
Time
Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C, 1000 Bias @125°C Hrs, 100%RH, 121°C -65°C~150°C, Cycles VHBM 2KV, 200V 10ms, 100mA
Classification Reflow Profiles
Profile Feature Average ramp-up rate Preheat Temperature (Tsmin) Temperature (Tsmax) Time (min max) (ts) Time maintained above: Temperature (TL) Time (tL) Peak/Classification Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds table 10-30 seconds Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds table 20-40 seconds
6°C/second max. 6°C/second max. minutes max. minutes max. Time 25°C Peak Temperature Notes: temperatures refer topside package. Measured body surface.
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APW7065A
Classification Reflow Profiles (Cont.)
Table SnPb Eutectic Process Package Peak Reflow Temperatures Package Thickness Volume <350 <2.5 +0/-5°C +0/-5°C
Volume +0/-5°C +0/-5°C
Table Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume Volume Volume <350 350-2000 >2000 <1.6 +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* *Tolerance: device manufacturer/supplier shall assure process compatibility including stated classification temperature (this means Peak reflow temperature +0°C. example 260°C+0°C) rated level.
Customer Service
Anpec Electronics Corp. Head Office No.6, Dusing Road, SBIP, Hsin-Chu, Taiwan 886-3-5642000 886-3-5642050 Taipei Branch Lane 218, Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan 886-2-2910-3838 886-2-2917-3838
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