propagation delay through switch switch connection between ports Data

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V/3.3 2-Bit Common Control Level Translator Switch ADG3242
propagation delay through switch switch connection between ports Data rate Gbps V/3.3 supply operation Selectable level shifting/translation Level translation Small signal bandwidth 8-lead SOT-23 package
04309-001
Figure
APPLICATIONS
voltage translation voltage translation voltage translation switching isolation swap plug Analog switch applications
GENERAL DESCRIPTION
ADG3242 2-bit, 2-port, common control digital switch. designed voltage CMOS process, provides power dissipation, gives high switching speed very resistance. This allows inputs connected outputs without additional propagation delay generating additional ground bounce noise. These switches enabled means common enable (BE) input signal. This digital switch allows bidirectional signal switched when condition, signal levels supplies blocked. This device ideal applications requiring level translation. When operated from supply, level translation from inputs outputs allowed. Similarly, device operated from supply inputs applied, device translates outputs addition, level translating select (SEL) included. When low, reduced internally, allowing level translation between inputs outputs. This makes device suitable applications requiring level translation between different supplies, such converter DSP/microcontroller interfacing.
PRODUCT HIGHLIGHTS
supply operation. Extremely propagation delay through switch. switches connect inputs outputs. Level/voltage translation. Tiny SOT-23 package.
Rev.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. Specifications subject change without notice. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective owners.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. rights reserved.
ADG3242 TABLE CONTENTS
Features Applications. Functional Block Diagram General Description Product Highlights Revision History Specifications. Absolute Maximum Ratings. Caution. Configurations Function Descriptions Typical Performance Characteristics Terminology Timing Measurement Information Switch Applications Mixed Voltage Operation, Level Translation. Translation Translation Translation Isolation. Plug Swap Isolation. Analog Switching High Impedance during Power-Up/Power-Down. Outline Dimensions Ordering Guide.
REVISION HISTORY
9/06-Rev. Rev. Updated Format.Universal Added Table Changes Ordering Guide. 8/03-Revision Initial Version
Rev. Page
ADG3242 SPECIFICATIONS
specifications TMIN TMAX, unless otherwise noted. Table
Parameter ELECTRICAL CHARACTERISTICS Input High Voltage Input Voltage Input Leakage Current State Leakage Current State Leakage Current Maximum Pass Voltage Symbol VINH VINL Conditions VA/VB VA/VB VA/VB VA/VB VA/VB VCC, VCC, VCC, VCC, VCC, Digital inputs VCC; Digital inputs 0.01 0.15 Version Unit 0.225 Gbps
±0.01 ±0.01 ±0.01
CAPACITANCE Port Capacitance Port Capacitance Port Capacitance Control Input Capacitance SWITCHING CHARACTERISTICS3 Propagation Delay Propagation Delay Matching Enable Time
tPHL, tPLH tPZH, tPZL
Disable Time
tPHZ, tPLZ
Maximum Data Rate Channel Jitter DIGITAL SWITCH Resistance
Resistance Matching POWER REQUIREMENTS Quiescent Power Supply Current Increase Input
Temperature range follows: version: -40°C +85°C. Typical values 25°C, unless otherwise stated. Guaranteed design, subject production test. digital switch contributes propagation delay other than delay typical switch load capacitance when driven ideal voltage source. Because time constant much smaller than rise/fall times typical driving signals, adds very little propagation delay system. Propagation delay digital switch when used system determined driving circuit driving side switch interaction with load driven side. Propagation delay matching between channels calculated from resistance matching load capacitance Timing Measurement Information section. This current applies Control only. ports contribute significant currents they transition.
Rev. Page
ADG3242 ABSOLUTE MAXIMUM RATINGS
25°C, unless otherwise noted. Table
Parameter Digital Inputs Input Voltage Output Current Operating Temperature Range Industrial Version) Storage Temperature Range Junction Temperature Thermal Impedance Lead Temperature, Soldering sec) Reflow, Peak Temperature (<20 sec) Rating -0.5 +4.6 -0.5 +4.6 -0.5 +4.6 channel -40°C +85°C -65°C +150°C 150°C 206°C/W 300°C 235°C
Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Only absolute maximum rating applied time.
CAUTION
Rev. Page
ADG3242 CONFIGURATIONS FUNCTION DESCRIPTIONS
MARK
04309-002
ADG3242
VIEW (Not Scale)
ADG3242
VIEW (Not Scale)
Figure Configuration
Figure Configuration (Die size:
Table Function Descriptions
Mnemonic Description Enable (Active Low). Port Input Output. Port Input Output. Ground Reference. Port Input Output. Port Input Output. Level Translation Select. Positive Power Supply Voltage.
Table Coordinates (Measured from Center Die)
Mnemonic X(m) +102 +168 +126 -168 -111 Y(m) +303 +150 -139 -266 -247 +121 +279 +303
Table Truth Table
Function Level Shifting. V/2.5 Level Shifting. Disconnect.
only when 10%.
Rev. Page
04309-100
ADG3242 TYPICAL PERFORMANCE CHARACTERISTICS
25°C 3.3V
3.3V
+85°C +25°C
3.6V
-40°C
04309-003 04309-006 04309-008 04309-007
VA/VB
VA/VB
Figure Resistance Input Voltage
25°C 2.3V
Figure Resistance Input Voltage Different Temperatures
2.5V
2.5V 2.7V
+85°C -40°C +25°C
VA/VB
04309-004
VA/VB
Figure Resistance Input Voltage
25°C
Figure Resistance Input Voltage Different Temperatures
25°C -5µA 3.6V
VOUT
3.3V 3.6V
3.3V
VA/VB
04309-005
VA/VB
Figure Resistance Input Voltage
Figure Pass Voltage
Rev. Page
ADG3242
25°C -5µA 2.7V 25°C
VOUT
VOUT
2.3V
2.5V
3.3V; 3.3V
2.5V
04309-009
VA/VB
Figure Pass Voltage
25°C -5µA 3.6V
Figure Output Characteristic
25°C
VOUT
3.3V
VOUT
3.3V
2.5V
3.3V;
04309-013
04309-010
-0.10
-0.08
-0.06
-0.04
-0.02
VA/VB
Figure Pass Voltage
25°C
Figure Output High Characteristic
25°C ONOFF
-0.2
2.5V
QINJ (pC)
(µA)
3.3V;
3.3V
-0.4 3.3V
-0.6
-0.8
2.5V
-1.0
04309-011
ENABLE FREQUENCY (MHz)
VA/VB
Figure Enable Frequency
Figure Charge Injection Source Voltage
Rev. Page
04309-014
-1.2
04309-012
0.02
0.04
0.06
0.08
0.10
ADG3242
3.3V ENABLE
ATTENUATION (dB)
TIME (ns)
0.03 25°C 3.3V/2.5V 0dBm ANALYZER:
04309-015
DISABLE 3.3V;
FREQUENCY (MHz)
1000
TEMPERATURE (°C)
Figure Bandwidth Frequency
25°C 3.3V/2.5V 0dBm ANALYZER:
Figure Enable/Disable Time Temperature
ENABLE 2.5V
ATTENUATION (dB)
TIME (ns)
DISABLE
04309-016
FREQUENCY (MHz)
1000
TEMPERATURE (°C)
Figure Crosstalk Frequency
25°C 3.3V/2.5V 0dBm ANALYZER:
Figure Enable/Disable Time Temperature
3.3V 1.5V 20dB ATTENUATION
ATTENUATION (dB)
JITTER p-p)
04309-017
FREQUENCY (MHz)
1000
DATA RATE (Gbps)
Figure Isolation Frequency
Figure Jitter Data Rate; PRBS
Rev. Page
04309-020
-100
04309-019
-100 0.03
04309-018
ADG3242
3.3V 1.5V 20dB ATTENUATION
WIDTH
WIDTH ((CLOCK PERIOD JITTER p-p)/CLOCK PERIOD) 100%
04309-021
DATA RATE (Gbps)
Figure Width Data Rate; PRBS
Figure Pattern; 1.244 Gbps, PRBS
Figure Pattern; Gbps, PRBS
04309-022
50mV/DIV 200ps/DIV
3.3V 3.3V 1.5V
20dB ATTENUATION 25°C
Rev. Page
04309-023
20mV/DIV 200ps/DIV
2.5V 2.5V 1.5V
20dB ATTENUATION 25°C
ADG3242 TERMINOLOGY
Positive power supply voltage. Ground reference. VINH Minimum input voltage Logic VINL Maximum input voltage Logic Input leakage current control inputs. state leakage current. maximum leakage current switch state. state leakage current. maximum leakage current switch state. Maximum pass voltage. maximum pass voltage relates clamped output voltage NMOS device when switch input voltage equal supply voltage. Ohmic resistance offered switch state. measured given voltage forcing specified amount current through switch. resistance match between channels, that min. switch capacitance. switch capacitance. Control input capacitance. This consists SEL. Quiescent power supply current. This current represents leakage current between ground pins. measured when control inputs logic high level switches off. Extra power supply current component control input when input driven supplies. tPLH, tPHL Data propagation delay through switch state. Propagation delay related time constant where load capacitance. tPZH, tPZL enable times. These times taken cross response control signal, tPHZ, tPLZ disable times. These times taken place switch high impedance state response control signal. They measured time taken output voltage change from original quiescent level, with reference logic level transition control input. (See Figure enable disable times.) Data Rate Maximum rate which data passed through switch. Channel Jitter Peak-to-peak value deterministic random jitter switch channel.
Rev. Page
ADG3242 TIMING MEASUREMENT INFORMATION
following load circuit waveforms, notation that used VOUT where: VOUT VOUT
VOUT 2VCC ENABLE CONTROL INPUT DISABLE VINH
tPZL
tPLZ
Figure Enable Disable Times
NOTES PULSE GENERATOR PULSES: 2.5ns, 2.5ns, FREQUENCY 10MHz. INCLUDES BOARD, STRAY, LOAD CAPACITANCES. TERMINATION RESISTOR, SHOULD EQUAL ZOUT PULSE GENERATOR.
Table Switch Position
Test tPLZ, tPZL tPHZ, tPZH
04309-024
Figure Load Circuit
CONTROL INPUT
tPLH
VOUT
tPLH
04309-025
Figure Propagation Delay
Table Test Conditions
Symbol (SEL VCC) (SEL VCC) (SEL Unit
Rev. Page
04309-026
PULSE GENERATOR
VOUT
VOUT
tPZH
tPHZ
ADG3242 SWITCH APPLICATIONS
MIXED VOLTAGE OPERATION, LEVEL TRANSLATION
switches provide ideal solution interfacing between mixed voltage systems. ADG3242 suitable applications where voltage translation from technology lower voltage technology needed. This device translates from from from bidirectional directly Figure shows block diagram typical application which user needs interface between microprocessor. microprocessor does have tolerant inputs, therefore, placing ADG3242 between devices allows devices communicate easily. switch directly connects blocks, therefore introducing minimal propagation delay, timing skew, noise.
3.3V 3.3V 2.5V
TRANSLATION
When (SEL input signal range VCC, maximum output signal also clamped within voltage threshold below supply. this case, output limited approximately shown Figure
2.5V
2.5V
ADG3242
1.8V
04309-030
Figure Voltage Translation,
VOUT 1.8V 2.5V SUPPLY 2.5V
ADG3242
TRANSLATION
When (SEL input signal range VCC, maximum output signal clamped within voltage threshold below supply. this case, output limited shown Figure This device used translation from devices also between devices.
3.3V
SWITCH INPUT
2.5V
Figure Voltage Translation,
TRANSLATION
ADG3242 offers option interfacing between device device. This possible through pin. active control pin. activates internal circuitry ADG3242 that allows voltage translation between devices devices. When input signal range VCC, maximum output signal clamped shown Figure this, must tied Logic unused, tied directly VCC.
3.3V
3.3V
2.5V
ADG3242
2.5V 2.5V
04309-028
Figure Voltage Translation,
VOUT 2.5V 3.3V SUPPLY 3.3V
3.3V
ADG3242
04309-031
Figure Level Translation Between Microprocessor
04309-027
3.3V
2.5V MICROPROCESSOR
SWITCH OUTPUT
1.8V
04309-032
SWITCH OUTPUT
Figure Voltage Translation,
04309-029
SWITCH INPUT 3.3V
VOUT 1.8V
3.3V SUPPLY
SWITCH OUTPUT
Figure Voltage Translation,
SWITCH INPUT
3.3V
Figure Voltage Translation,
Rev. Page
04309-033
ADG3242
ADG3242 ADG3242
ISOLATION
common requirement architectures capacitance loading bus. Such systems require bridge devices that extend number loads without exceeding specifications. Because ADG3242 designed specifically applications that need drive, require simple logic functions, solves this requirement. device isolates access bus, thus minimizing capacitance loading.
PLUG-IN CARD
CARD
PLUG-IN CARD
CARD
Figure ADG3242 Plug Application
LOAD LOAD
BUS/ BACKPLANE
04309-034
SWITCH LOCATION
LOAD
LOAD
Figure Location Switched Isolation Application
PLUG SWAP ISOLATION
ADG3242 suitable swap plug applications. output signal ADG3242 limited voltage that below supply, shown Figure Figure Figure Thus, switch acts like buffer take impact from insertion, protecting vital expensive chipsets from damage. plug applications, system cannot shut down when hardware being added. overcome this, switch positioned backplane between devices plug connectors. switch turned during plug. Figure shows typical example this type application.
There many systems, such docking stations, boards servers, line cards telecommunications switches, that require ability handle swapping. isolated prior insertion removal, there more control over swap event. This isolation achieved using switches. switches positioned swap card between connector devices. During swap, ground swap card must connect ground backplane before connecting other signal power pins.
ANALOG SWITCHING
switches used many analog switching applications, example, video graphics. switches have lower resistance, smaller channel capacitance, better frequency performance than their analog counterparts. switch channel itself, consisting solely NMOS switch, limits operating voltage (see Figure typical plot), many cases, this does present issue.
HIGH IMPEDANCE DURING POWER-UP/POWERDOWN
ensure high impedance state during power-up powerdown, must tied through pull-up resistor. minimum value resistor determined current sinking capability driver.
Rev. Page
04309-035
ADG3242 OUTLINE DIMENSIONS
2.90
1.60
2.80
INDICATOR 0.65 1.30 1.15 0.90 1.95
1.45 0.38 0.22
0.22 0.08
0.15
SEATING PLANE
0.60 0.45 0.30
COMPLIANT JEDEC STANDARDS MO-178-BA
Figure 8-Lead Small Outline Transistor Package [SOT-23] (RJ-8) Dimensions shown millimeters
ORDERING GUIDE
Model ADG3242BRJ-R2 ADG3242BRJ-REEL ADG3242BRJ-REEL7 ADG3242BRJZ-REEL71 ADG3242BCZ-SF31
Temperature Range -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C
Package Description 8-Lead Small Outline Transistor [SOT-23] 8-Lead Small Outline Transistor [SOT-23] 8-Lead Small Outline Transistor [SOT-23] 8-Lead Small Outline Transistor [SOT-23]
Package Option RJ-8 RJ-8 RJ-8 RJ-8 Chip
Branding
Pb-free part.
Rev. Page
ADG3242 NOTES
Rev. Page
ADG3242 NOTES
©2006 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners. C04309-0-9/06(A)
Rev. Page

propagation delay through switch switch connection between ports Data

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