Features multilayer ceramic chip capacitors electrical characteri
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Multilayer Ceramic Chip Capacitors
Features multilayer ceramic chip capacitors
electrical characteristics multi-layer ceramic chip capacitors essentially same disk-type capacitors since same ceramic dielectric principles apply. However, provide large capacitance, laminated ceramic-chip capacitor made with ceramic dielectric that much thinner, micrometers, than standard disk type capacitor (0.1mm larger). result, Class II/III, differ voltage related characteristics, such bias effects, when compared single layer types. laminated ceramic-chip capacitor also structure that makes vastly different from disk type capacitor several areas. Laminate structures numerous thin layers provide high capacitance small packages. structure completely monolithic which affords superior mechanical strength high reliability. Precisely-controlled dimensions critical accurate, high-speed automated placement. Constructed ceramic material metal, chip capacitors extremely stable, deteriorate, even under extreme environmental conditions. Lack device polarity lateral symmetry simplify handling, placement, inspection. Stray capacitance kept minimum achieving output close theoretical model. Surface mount (leadless) components have very parasitic inductance providing excellent frequency characteristics. Even with aforementioned advantages, important recognize limitations ceramic component. chip capacitors mounted directly onto printed circuit boards subjected many mechanical thermal stresses. These adverse conditions damage product alter characteristics. Therefore, well-maintained process controls mounting soldering surface mount components necessary. full understanding these proper application methods will lead more reliable products.
Dimensions multilayer ceramic chip capacitors
Type C1005 C1608 C2012 C3216 C3225 C4532 C5750
1.0±0.05 1.6±0.1 2.0±0.2 3.2±0.2 3.2±0.4 4.5±0.4 5.7±0.4
0.5±0.05 0.8±0.1 1.25±0.2 1.6±0.2 2.5±0.3 3.2±0.4 5.0±0.4
0.55max. 0.9max. 1.45max. 1.9max. 2.8max. 3.6max. 5max.
millimeters 0.1min. 0.2min. 0.2min. 0.2min. 0.2min. 0.2min. 0.2min.
more details, product catalog.
Termination composition kinds terminations available. composed Ag-Pd, with electroplated nickel barrier layer with tin-lead) layer solderable finish (see Fig. other copper base with electroplated layers nickel tin-lead) (Fig.
Ag-Pd Sn(Sn-Pb) Sn(Sn-Pb)
Dimensions construction
Dimensions construction Model structure laminated ceramic chip capacitor
Ag-Pd-based system internal electrode) Cu-based system (BME technology) prevent phenomenon termination leaching, solder barrier layer nickel electroplated termination with layer tin-lead) that excellent solderability characteristics. table below shows soldering techniques used with each type.
Termination
Internal electrode layers
Ceramic dielectrie
Multilayer Ceramic Chip Capacitors
Soldering technique chip shape
Type Reflow Flow C1005 C1608 C2012 C3216 C3225 C4532 C5750 applicable non-applicable Soldering iron
Tape dimensions
Tape form dimensions
1.75±0.1
Paper carrier Embossed carrier
3.5±0.05
+0.1
Pitch hole
1.1max.
0.3max.
8±0.3
Reel packaging Taping material
Paper carrier Type C1005 C1608 C2012 C3216 C3225 C4532 C5750
4±0.1 2±0.05
Section insertion chips
5max.
Differs according parts thicknesses
Tape cover
Sprocket holes Removal holes
0.62+0.05 -0.10 1.1±0.2 1.5±0.2 1.9±0.2 2.9±0.2 3.6±0.2 5.4±0.2
1.15 +0.05 -0.10 1.9±0.2 2.3±0.2 3.5±0.2 3.6±0.2 4.9±0.2 6.1±0.2
millimeters) 2±0.05 4±0.1 4±0.1 4±0.1 4±0.1 8±0.1 8±0.1
Bottom tape
Paper tape
Embossed tape
Tape Cover Empty section Sprocket holes Indented slots 160mm greater Chip insertion section
Leader Empty section 400mm greater 160mm greater
Plastic tape
Offset pitch hole positions must within ±0.3mm accumulative 10-pitch.
Feeding direction
Tape-loading status
Pitch hole
Reel shape dimensions
E:2±0.5 F:R1 W:9±0.3 (3225 smaller) W:13±0.3 (4532 5750) t:2±0.5
Component Taping condition Tape cover
millimeters
180°
Carrier
Peel cover tape 0.05 0.7N direction arrow.
Multilayer Ceramic Chip Capacitors
Storage
multilayer ceramic chip capacitors will lose their electrical characteristics ambient conditions. However, solderability taping properties change during extended storage. Therefore, following precautionary measures recommended.
Distance between adjacent terminations
Storage environment
packaging chip capacitors designed have long shelf life, order minimize aging packaging materials, storage conditions should less than 40°C under relative humidity. multilayer ceramic chip capacitors within months receiving.
Solder land Solder resist Solder Solder land
Solder
Atmosphere
Chlorine sulfuric acid adversely affect solderability termination, therefore, avoid exposure this environment.
Solder quantity appropriate Chip capacitor close adjacent chip capacitor
Rapid temperature changes.
When removing multilayer ceramic chip capacitors from their storage place,l make sure that they subjected differences temperature that would cause moisture condensation.
Land width
Surface mount technology
Solder design solder filet volume will directly affect strength chip capacitor.
Solder land
Solder land
larger amount solder used multilayer ceramic chip capacitors, greater stress capacitors which results weakened condition. Solder land dimensions shall designed ensure that appropriate solder amounts used. Avoid using common solder land multiple terminations provide individual solder land each termination.
Solder
Solder
Foot print size solder amount
Component span
Solder resist Solder resist
Solder quantity appropriate Excessive solder when lands wide.
Example recommend land shape dimensions
Land dimensions Since there differences between appropriate solder volume, depending soldering method selected, recommend land shape dimensions shown below. Recommend land pattern reflow
Solder land Solder resist Solder Solder
Solder land Solder resist
Solder quantity appropriate Solder resist away from chip termination allowing much soldering space.
Type C1005 C1608 C2012 C3216 C3225 C4532 C5750
0.35 0.45
millimeters)
Multilayer Ceramic Chip Capacitors
Land pattern recommended flow
Example Common land with other
Locations avoided Example improvement
Missing solder
Excess solder
Solder resist
Type C1608 C2012 C3216
millimeters)
land dimensions differ reflow flow uses (points observe) Dimension Reason that reflow flow flow use, component held temporarily place glue dot, sizes little larger flow than reflow prevent adhesive from flowing onto lands. Dimension Reason that reflow flow flow dimensions made larger prevent defects from lack solder during spray soldering. Dimension Reason that reflow flow dimension reduced flow down amount solder buildup minimize direct flex stress circuit board. Land dimensions micro-chips (type 1005 1608) Extremely small chip capacitors increase rate generation tombstone effect reflow soldering. prevent tombstone effect, reduce land dimensions decrease amount solder buildup.
Important points designing land patterns Solder buildup will excess more than chip capacitor placed same land capacitor shares land with some other part. Caution must used when more than chip capacitor shares same land because that narrows space between chips, makes easier some sections soldered, require repairs with soldering iron. above diagram example improvement shows that using solder resist processing provide land each chip improves level soldering reliability.
Adhesive
Otherwise, there danger deterioration chip characteristics. Check these elements prototype stage, before mass production, there questions details, please contact TDK.
Methods basic conditions required adhesives
Please consider following requirement when selecting adhesives. High adherent strength components will drop skew during mounting while handling. Adhesive strength must deteriorate when subjected high heat soldering. Long shelf life Rapid curing Non-corrosive Non-conductive Non-toxic
Placement circuit board
Example placement avoided layout recommendations (processing land divisions) Example Soldering chassis
Locations avoided Chassis Solder (ground solder) Example improvement Chassis Solder (ground solder) Solder resist
Printing/dispensing
When chip capacitors glued circuit board with adhesive, elements such land pattern dimensions, type adhesive, quantity adhesive coating, curing temperature curing time must compatible. Applying much adhesive coating presents danger coating flowing into land patterns causing soldering defective. guide optimum application, next page, which shows amount shape coating C2012 C3216 types. Adequately investigate amount shape coating other types before using them.
l1<l2
Example common solder land with components
Locations avoided Leads Solder Example improvement Leads Solder Solder resist
l1<l2
Multilayer Ceramic Chip Capacitors
Recommended conditions adhesives quantities (example C2012 C3216)
Mounting
Mounting head
a:0.2mm min.
c:No contact with pattern
b:70 100µm
recommend following coating patterns when using adhesives that combine heat curing.
Points adhesive coating
Crack promote effective curing, coat 2points that away from center mounting position hold chip position with adheisive from sides.
Force
Curing adhesive
prevent terminal electrodes oxidizing, keep curing conditions within minutes less than 160°C. Caution: Certain types adhesives reduce insulation resistance. differences coefficients thermal expansion (CTE) between adhesives multilayer ceramic chip capacitors cause chip develop cracks. caution when applying adhesives because either much little cause problems.
Mounting head pressure
amount mounting pressure applied chip capacitor will differ according shape mounting nozzle. diameter 1.8mm, usual amount mounting force 3000 8000 erg. head smaller same amount mounting force applied, increase shock energy square millimeter (eg/mm2) will such that caution must used when handling extremely small chips like C1005 C1608 types.
Mounting
When installing multilayer ceramic chip capacitors circuit boards make sure that excessive force applied capacitors. Make sure that periodic maintenance installer equipment performed regularly.
Maintenance inspection installers
When centering worn, excessive localized shock loaded chip capacitor during positioning cracking occur. prevent problems like this from occurring, carefully monitor centering ensure that periodic maintenance inspection performed.
Pressure installation head
stronger pressure installation head, more stable installation, pressure greater than necessary applied, multilayer ceramic chip capacitors crack. drop point suction nozzle low, excessive forces will applied chip during installation that cause breaks. Realign circuit board slide adjust bottom dead center over circuit board.
Torsion stress printed circuit boards during double sided mounting
After soldering both surfaces dual-sided circuit board then performing installation, surfaces, pressure from installation head causes circuit board bend, this will apply large amount mechanical stress multilayer ceramic chip capacitors that have been already soldered opposite side. prevent this, recommend installation support pins back surface circuit board. (see model diagram next page.)
Multilayer Ceramic Chip Capacitors
Model cracks generated dual-surface mounted board time.
Requirements selecting flux
Recommended flux more active flux, better soldering finish, materials that added cleanliness making flux more active reduce insulation performance multilayer ceramic chip capacitors. prevent this from happening, recommend rosin flux with activity (containing 0.2% less chlorine).
Flux types
recommended that mildly-activated rosin flux used. There flat lustrous types. Water soluble flux: These made from activators organic compounds that dissolve water, that have superior soldering properties comparison with rosin fluxes.
Flux control
coating quantity Amount flux coated differs according specific gravity flux. Make adequate checks prior use. Periodic replacement moisture absorption oxidation properties flux result degradation solder characteristics. recommends replacement solder after been four weeks.
Termination peeling
Cracks
Cautions using flux
Flux more important elements affecting performance multilayer ceramic chip capacitors. Before selecting using flux, check items shown below best flux. flux that chlorine content 0.1wt% less. strong flux. flux with large amounts chlorine compounds added activation strong oxide flux will lead large amounts dross after soldering, which invite lowering chip surface insulation corrosion terminal electrodes. When soldering, keep amount flux coating minimized. Coat with flux when flow soldering improve soldering characteristics large amounts flux used this time will result occurrence flux which presents danger impeding soldering properties. recommend foam method limiting amount flux coating. When using water soluble flux, clean thoroughly. dross from water soluble flux property melting when exposed moisture, high humidity conditions, insulation resistance will lowered dross that adheres chip surface that will have adverse effects reliability. Therefore, when using water soluble flux, make sure that capabilities cleaning method cleaning equipment well-maintained.
Support
Even shock energy same, smaller span circuit board diagram below) greater shock applied chip capacitor higher rate crack occurrence. Therefore, when installing support pins, their positions that there will little shock energy possible.
Magnitude stress location support pins
Soldering
Span
Vibrating parts feeder
parts feeder subjected vibrations long periods time, multilayer ceramic chip capacitors have their terminal electrodes warn because contact friction with interior walls parts feeder. This lead degradation solderability. Moreover, termination material adhere surface component, resulting degradation insulation resistance. Controlled quantities chip capacitors should used feeder
Because multilayer ceramic chip capacitors will direct contact with molten solder during soldering, there will stresses caused rapid rise heat, there will also danger such things flux residue dissolution terminal electrode materials. Therefore, most important point soldering process when installing circuit board that attention given following items when assigning conditions.
Multilayer Ceramic Chip Capacitors
Reflow soldering
reflow soldering method places components dispensed solder amounts printed circuit board. chips then attached using heat melt solder. method heating melting solder overall heating method local heating method. Infrared plate heating Laser Light beam
Recommended soldering profile reflow method
there rapid increase heat molten solder temperature, tombstoning effects more common. there rapid temperature change during soldering operation, thermal cracks more common. Generally recommended temperature conditions reflow soldering
Pre-heating Temperature (°C) Soldering Cooling(natural cooling)
Overall heating method Reflow method Local heating method
With this method, adhesives usually used temporarily hold chip capacitors place. This prevents skewing tombstoning effects. Also there rapid temperature curve heat treatment, there danger thermal cracks appearing chips, recommend soldering conditions shown below (temperature profile).
Skewing
Before soldering
60sec. more 20sec.
Soldering method C3216 under C3225 over
Change temperature(°C) T<190 T<130
After soldering
Multilayer Ceramic Chip Capacitors
Important points selecting cream solder
Compatible with consistent printing dispensing volume dimensions. solder surface area must spread more than necessary reflow preheating process after printing dispensing. Adequate solderability. flux residue must minimized solder balls must eliminated. Flux residue must adversely affect circuit other electronic parts. Must have adhesion that allows parts mounting stable state with high reliability change contact resistance. Position which occurrence tombstone effect high (temperature both terminal electrodes easily gets balance).
Reflow direction
tombstone effect (Tombstone effect)
multilayer ceramic chip capacitors small lightweight, tombstone effect, standing capacitors that occurs during reflow soldering, must addressed. This effect reduced employing such measures reducing land dimensions, applying adequate preheat, optimizing solder volume, ensuring accurate placement, providing equal heating both terminations during soldering. tombstone effect (drawbridge effect) Before soldering
Relation between placement parts with large heat capacity Reflow direction circuit board direction When installing parts with large heat capacity same circuit board multilayer ceramic chip capacitors. Orient circuit board that parts with high heat capacity into reflow furnace first that will help suppress rate tombstone effect occurrence. Circuit board direction which rate tombstone effect occurrence (reduced difference temperature between both terminal electrodes)
Reflow direction
Circuit board direction which rate tombstone effect occurrence high (imbalance temperatures between both terminal electrodes).
Reflow direction
After soldering
Distance between parts with large heat capacity reduce rate tombstone effect occurrence, design patterns that parts with large heat capacity close possible multilayer ceramic chip capacitors.
Recommended steps prevent tombstone effect
Accurate chip placement: Give consideration reducing offset position with relation board pattern. tombstone effect occurs more frequently when direction chip position offset same reflow direction (direction forward circuit board movement). Orientation component: Give consideration when designing P.C. board pattern ensure direction chip mounting (lengthwise direction) right angles reflow direction. Position which tombstone effect rate (both terminal electrode temperatures balanced)
Relation positions between parts with large heat capacity occurrence tombstone effect held down placing multilayer ceramic chip capacitors proximity with sides parts with large heat capacity. this time, too, place capacitors close possible parts with large heat capacity make sure that chip orientation right angles reflow direction. Position which tombstone effect (small difference temperature between both terminal electrodes)
Reflow direction
Position which tombstone effect high (imbalance easily occurring temperature between both terminal electrodes)
Reflow direction Reflow direction
P.C. dimension area Design dimensions that land area small possible that each land positioned such that receives uniform quantity solder.
Multilayer Ceramic Chip Capacitors
Flow soldering
flow soldering method involves first temporarily gluing multilayer ceramic chip capacitors with adhesives appropriate positions printed circuit board, then coats with flux dips into preheated molten solder bath. multilayer ceramic chip capacitors tested with solder 250°C that adequate measures must taken prevent thermal cracks. Caution: multilayer ceramic chip capacitors used that exceed range delivery specifications given specifications catalog, cracks occur within chips that presents danger reduced reliability. Rapid temperature changes local heating during soldering also causes cracks. Please refer soldering methods below optimum soldering benefits. (temperature profile) Height spraying single wave method (distance from spray nozzle solder surface) When value diagram below increases (that there large flow unit time flow speed fast), surface pressure circuit board governed force horizontal direction flatness solder surface impaired, that increases rate occurrence solder defects. when value low, surface pressure circuit board governed force vertical direction flow solder uniformly maintained. Recommend value: recommend value less. Setting spray height single wave method
Dire
h:Height flow
Cooling
Recommended flow soldering temperature conditions
Recommended temperatures flow soldering
Pre-heating Soldering
ction
Appropriate quantity solder
otion
Temperature (°C)
Molten solder
60seconds more 3seconds 60seconds more
Depth single wave method value diagram below large, rate occurrence bridges increases. value low, there rate occurrence unsolder sections increases. Recommended value: Recommend appropriate value Setting depth single wave method
t:Depth
Soldering method C3216 under
Change temperature(°C) T<150
Cautions when setting preheat temperatures
When setting preheat temperatures, recommend preheat conditions high temperatures which pass following points test circuit boards Check points when preheat temperature a:Flux flows easily b:Possibility thermal cracks Check points when preheat temperature high Flux deteriorates reoxidizes even when oxide film removed. (especially temperatures 160°C above) large warp circuit board Loss reliability chips other parts
Dire
Molten solder
ction otion
nozzle
Examples conditions avoid: When depth high.
Dire ction
Excess quantity solder
Cautions spray soldering
flow method, pump constantly spraying molten solder that there fluctuation quantity solder supplied over unit time, there danger unsoldered locations bridges occurring. There soldering defects caused flux gas. avoid this danger, attention following points when selecting spray equipment setting spray height
otion
Molten solder
Multilayer Ceramic Chip Capacitors
Recommended conditions soldering iron temperatures
moti
Temperature(°C)
Solder depth double wave method Setting depth double wave method
Direc
tion
Appropriate quantity solder
Secondary solder
Molten solder
Primary solder
Pre-heating
Important points Primary solder: Greater immersion (prevents soldered portions) Second solder: shallower (draws excess solder prevents solder bridges)
Soldering method C3216 under C3225 over
Extremely short(within seconds, possible)
Change temperature(°C)
Solder amount Soldering solder iron
Special attention must given handling temperature soldering iron shape soldering iron. This because easy soldering iron come into direct contact with terminal electrodes multilayer ceramic chip causing multiple cracking opportunities. Make sure that soldering iron does come into contact with ceramic dielectric, only terminations. much little solder cause serious consequences circuit reliability such cracks from solder stress parts falling circuit board. Check diagram make sure provide right amount solder.
Excess amount solder
Increased occurrence solder stress cracks Maximum layer quantity
apply soldering iron Recommended conditions soldering iron Rated Soldering iron temperature (°C) Soldering iron shape (mm) 20max. 300max.
Right amount solder
Minimum layer quantity
Insufficient amount solder
Adhesive strength weak producing danger defective contacts parts coming board.
Cooling
recommend natural cooling air, parts will dipped solvent cleaning purposes, temperature difference should 100°C less.
Cleaning Selection cleaning fluid
When using rosin flux, cleaning usually necessary. When using active flux, cleaning fluid will separate chlorine component from flux that will have effect devices. Always cleaning fluid cleaning.
Ultrasonic cleaning
ultrasonic energy output high during ultrasound cleaning that will affect adhesion terminal electrodes recommend following conditions ultrasound cleaning: Frequency: 28kHz Output: 20W// cleaning time: min. less
Multilayer Ceramic Chip Capacitors
Cautions removing from double-sided circuit board
Double-sided circuit boards singulated into separate unit circuit boards, excess flex stress placed circuit boards that time, cracks occur multilayer ceramic chip capacitors. diagram below ensure that stress suppression during board separation adequate. Relationship between chip position flex stress during board separation Point Locations avoid Recommended locations Direction which chip mounting surface bent.
Chip thickness
Solder amount flex strength
Test method
Pressure
R230 much solder Right amount solder little solder meter
Circuit board thickness (t=1.6) Flex
Hold chip mounting surface upward bend upward
Holding chip mounting surface downward bending downward.
Glass epoxy circuit board millimeters
Chip orientation vertically relationship slit horizontally relationship slit
Relation between solder amount flex strength (C1005X7R1C103K)
Remaining Right amount solder much solder little solder
Distance from slit Installing close slit Installing center circuit board units
Flex (mm)
Cautions when resin coating
After installing multilayer ceramic chip capacitors circuit board, resin coated device-mounting surface purposes preventing damage from moisture dust, when potting, follow items below selecting resin. Take full precautions ensure that curing process natural drying state which decomposing gases reactive gases present. Being placed such environments cause destruction chips because metals that part chip capacitor structure will react (such hydrogen absorption effect palladium) with gas. producing large amounts stress (this trend generally pronounced hard polymer resins) thermal expansion contraction resin curing process destroy multilayer ceramic chip capacitors. Soft polymers should used under coating.
Relation between solder amount flex strength (C1608X7R1C103K)
little solder Remaining Right amount solder much solder Flex (mm)
Relation between solder amount flex strength (C2012X7R1H103K)
little solder Right amount solder much solder Flex (mm)
Effects conditions other operations
stress multilayer ceramic chip capacitors when they installed will differ according solder quantity, board material other conditions, below shown examples data conditions stress that occurs multilayer ceramic chip capacitors. Please this improve circuit reliability.
Remaining
Multilayer Ceramic Chip Capacitors
Printed circuit board thickness flex strength Relation between board thickness flex strength (C1005X7R1C103K)
Board thickness t=0.8mm
Chip shape flex strength Relation between chip shape flex strength
C1005X7R1C103K t=0.5mm C1608X7R1C103K t=0.8mm C2012X7R1C103K t=0.85mm
Remaining
Board thicknesst =1.6mm Flex (mm)
Remaining
Flex (mm)
Relation between board thickness flex strength (C1608X7R1C103K)
Board thicknesst =0.8mm Remaining(%)
Relation between chip thickness flex strength (C2012X7R1H103)
Chip thickness t=1.25mm
Remaining
Board thicknesst =1.6mm Flex (mm)
Chip thickness t=0.85mm
Chip thickness t=0.6mm Flex (mm)
Relation between board thickness flex strength (C2012X7R1H103K)
Remaining(%) Flex (mm) Board thicknesst =1.6mm Board thicknesst =0.8mm
Multilayer Ceramic Chip Capacitors
Solder quantity heat shock
Land dimensions printed circuit boards used determined C6429.
Circuit board material heat shock Rate thermal expansion circuit board material
Material Glass epoxy Paper phenol Composite Alumina Rate thermal expansion (mm/°C) 1.4!10-5 2.2!10-5 2.4!10-5 6.5!10-5
Test conditions (assigning solder amount)
much solder little solder Adequate solder amount
Glass epoxy circuit board
Test conditions (thermal shock)
cycle
+125°C
Test conditions (thermal shock)
cycle
+125°C
Room temperature
-55°C 30minutes Room temperature 30minutes
-55°C 30minutes 30minutes
Standards decision defects
Determine defective following condition satisfied. Capacitance change ±7.5%max. Dielectric dissipation factor 0.025max. Insulation resistance 10000M min. External appearance damage
Failure criteria
Determine defective following condition satisfied. Capacitance change ±7.5%max. Dielectric dissipation factor 0.025max. Insulation resistance 10000M min. External appearance damage
Relationship between circuit board material thermal shock resistance (C2012X7R1H102K)
Remaining
alumina composite paper phenol glass epoxy
Relationship between solder amount resistance thermal shock (C2012X7R1H102K)
Remaining Adequate solder amount
little solder much solder
Number cycles
1000
Number cycles
1000
Multilayer Ceramic Chip Capacitors
Chip break strength
Test method Conduct tests using tools shown below
Load rate 30mm/min.
R0.5
S:1.4mm(type 2012) millimeters
Chip break strength (Type C2012)
Break strength (kg)
0.85 Product thickness (mm) 1.25
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