LA72702NV Monolithic Linear LA72702NV Overview LA7

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LA72702NV Monolithic Linear LA72702NV Overview LA7

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Ordering number ENA0979
LA72702NV
Monolithic Linear
LA72702NV
Overview
LA72702NV BTSC Decoder.
BTSC Decoder
Features
With circuit, alignment-free* STEREO channel separation. When base band signal input, separation adjusted input level. Dual slave address(80h, 84h).
Functions
FM-Demodulator STEREO detection STEREO decoder STEREO detection sensitivity change function Noise Reduction demodulator detection output select 2-levels detection sensitivity change function
Specifications
Maximum Ratings 25°C
Parameter Maximum power supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCCH Topr Tstg Ta85°C, Mounted specified board* Conditions Ratings +150 Unit
Mounted specified board: glass epoxy board
Operating Conditions 25°C
Parameter Recommended operating voltage Allowable operating voltage range Symbol vacate VCCH Conditions Ratings Unit
SANYO Semiconductor Co.,Ltd. products described contained herein are, with regard "standard application", intended general electronics equipment (home appliances, equipment, communication device, office equipment, industrial equipment etc.). products mentioned herein shall intended "special application" (medical equipment whose purpose sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level reliability directly threaten human lives case failure malfunction product cause harm human bodies, shall they grant guarantee thereof. should intend products applications outside standard applications customer considering such and/or outside scope intended standard applications, please consult with prior intended use. there consultation inquiry before intended use, customer shall solely responsible use. Specifications SANYO Semiconductor Co.,Ltd. products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer' products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer' products equipment.
N2807 20070112-S00005 No.A0979-1/10
LA72702NV
Electrical Characteristics 25°C, 5.0V
Parameter Current dissipation input level (Reference) Symbol VILIM Conditions signal Inflow current default condition 4.5MHz Deviation MONO (300Hz, 100%, Pre-emphasis ±25kHz Base band input level (Reference) VILIMB 100% Modulation MONO(L+R) 530mVp-p (300Hz, Pre-emphasis SUB(L-R) MONO output level MONO distortion MONO frequency characteristics MONO ratio STEREO output level STEREO distortion STEREO frequency characteristics STEREO ratio STEREO separation STEREO separation STEREO Detection level-1 VOMON THDMON FCM1 VOST THDS FCS1 STSE1 STSE2 VINSD1 380mVp-p (300Hz, dbx-NR ON), Pilot 110mVp-p 300mVp-p (300Hz, dbx-NR -7.0 -5.5 0.15 -7.0 -5.5 -4.5 -4.5 (80) Ratings (90) (100) Unit
fm=1kHz, 100% Mod, 15kHz fm=1kHz, 100% Mod, 15kHz fm=3kHz, Mod, Pre-emphasis Measure ratio from fm=1kHz level. S=VOMON, N=0% Mod, 15kHz fm=1kHz, 100% Mod, 15kHz fm=1kHz, 100% Mod, 15kHz fm=3kHz, Mod, 15kHz Measure ratio from fm=1kHz level. S=VOST, N=0% Mod, 15kHz f=300Hz (R/L), Mod, 15kHz f=3kHz (R/L), Mod, 15kHz Except Stereo Detection Measure pilot level. Stereo Detection
Serial control "SENS Pilot (fH)=15.73kHz STEREO Detection level-2 STEREO Detection hysteresis output level-1 output level-2 distortion ratio detection level-1 VINSD2 HYST VOSA1 VOSA2 THDSA SNSA VINSA1 Except Stereo Detection Serial control "SENS Input Mod. Difference Stereo/Except Stereo Det. Serial control "SENS fm=1kHz, 100% Mod, 15kHz SAP-1 (serial control) fm=1kHz, 100% Mod, 15kHz SAP-2 (serial control) fm=1kHz, 100% Mod, 15kHz S=VOSA2, N=0% Mod, 15kHz Except Det. Serial control "SENS Carrier=5fH only Measure output level. detection level-2 VINSA2 Except Det. Serial control "SENS Measure output level. detection hysteresis HYSA Input Mod. Difference SAP/Except Det. carrier only. Serial control "SENS MODE output MONO MODE output MODE output STEREO MODE output Stereo detect speed (Reference MODMO MODSA MODST MODSS STDT Input=MONO f=1kHz, Input=SAP Carrier Input=STEREO Pilot Input=STEREO Pilot, Carrier Input=STEREO Pilot data no-send Measure voltage change 2.8V timing from Power detect speed (Reference SAPDT Carrier data no-send Measure voltage change 1.9V timing from Power Normally measurement condition Input mode (90dBV) Reference Items reference levels, their specs no-guarantee. (350) (1000) (480) (1000) -7.5 -5.5 -3.5 -14.0 -11.0 -8.0 Stereo Detection
No.A0979-2/10
LA72702NV
Package Dimensions
unit (typ) 3175C
0.65 (0.33) 0.22
0.15
SANYO SSOP24(275mil)
Mode Condition
data Signal Stereo BASE band Stereo Mono MONO care STEREO SENS SENS F-MONO F-MONO F-MONO MUTE Stereo Stereo Stereo F-MONO F-MONO F-MONO MUTE MONO SAP-1 SAP-2 MULTI-1 MULTI-2 MUTE MONO MONO MONO MUTE 1.0V 1.9V 2.8V pin18 pin17 Mode condition Stereo SAP-1 SAP-2 MULTI-1 MULTI-2 Mode pin20 3.8V Output mode
(1.3)
1.5max
No.A0979-3/10
LA72702NV
Control Table
Grp-1 (Normally group-1 only)
Shows Initial condition Condition Stereo Both MUTE Normal (Auto DET) Forced Mono SENS SENS Stereo SENS Stereo SENS Level-1 Level-2 mode Base Band mode Prohibit (TEST MODE)
Read data
Condition Fixed Normal Normal Stereo
Test mode condition(Reference) When STOP condition transform Grp-1 data-end, controlled NORMAL mode. Grp-2 only test condition. Usually, these data no-need. Their data guarantee, except condition.
Blank Bits no-care Condition/Monitor position Normal (Usually, Fixed) TEST-1 output TEST-2 TEST-3 (reserved) TEST-4 TEST-5 (reserved) TEST-6 monitor TEST-7 monitor TEST-8 Pilot cancel monitor TEST-9 2.19k TEST-10 TEST-11 TEST-12 SPEC 7.6k TEST-13 SPEC output TEST-14 L+R/lL-R monitor TEST-15 2.09k
Slave addresses (1000 000*, pin8 Open/GND) (1000 010*, pin8
No.A0979-4/10
MODE Monitor OUT(L) OUT(R) 100F 4.7F 4.7F MODE MUTE MATRIX REGULATOR
Spectral Offset Cancel Wide
0.1F 2.2F 4.7F 0.1F 0.033F 0.033F
4.7k
Block Diagram Application
-6dB MUTE DEMOD ST/SAP DEMOD Address L-R/SAP
PILOT LEVEL PILOT CANCELLER
processor
STEREO
Offset Cancell Control SYSTEM CONTROL
Spectral
LA72702NV
DEMOD
DECODE
4.7F 0.1F 4.5M 0.33F
*560k 0.1F
2.2F Address Control DATA CLOCK
Sensitivity only pin7. Resistor remove.
SIGNAL from Tuner
SLAVE ADDRESS (1000 Pin8 OPEN/GND SLAVE ADDRESS (1000 Pin8
Spectral
PILOT
No.A0979-5/10
LA72702NV
Functions
Name PCPLDET Function Pilot level detect stero detection voltage level 2.4V Equivalent Circuit
160k
PC_DC_IN coupling (Input) 2.4V 2.4Vp-p
PC_DCOUT
coupling (Output)
2.4V 2.4Vp-p
offset cancel
2.6V
PISIF
Signal input Common input SIF, Base band
3.7V
CSAPDET carrier level detect detection 2.8V
ADDSEL
Slave address change control OPEN/GND
100k
Continued next page.
No.A0979-6/10
LA72702NV
Continued from preceding page. Name Serial data input Function voltage level Equivalent Circuit
Serial clock input
DBXIN Offset cancel feedback filter 2.4V
PCDETSPE
Spectral band detect
2.3V
PCTIMSPE spectral detect 2.4V
PCTNWID
Wide band detect
2.4V
PCSPECIN main signal convert filter 2.4V
KE6B
Offset cancel feedback filter
2.4V 220mVp-p
Continued next page.
No.A0979-7/10
LA72702NV
Continued from preceding page. Name PORCH Line Function voltage level 2.4V 1.4Vp-p Equivalent Circuit
POLCH
Line
2.4V 1.4Vp-p
POLED Mode MONO STEREO 0.9V 2.0V 3.0V Right Test only
STEREO 3.8V
PCREG
Reference voltage
2.4V
9.6k
PMAINOUT
Offset cancel feedback filter
1.6V
450k
PCPLC
Pilot level detect pilot canceller
2.4V
160k
Continued next page.
No.A0979-8/10
LA72702NV
Continued from preceding page. Name PCPTFILT Function Pilot level detect filter voltage level 2.4V Equivalent Circuit
160k
Serial Interface Specification
Data transfer manual This adopts control method (I2C-BUS) with serial data, controlled terminals which called (serial clock) (serial data).At first, up*1 condition starting data transfer, after that, input data terminal with synchronized terminal clock. order transferring first, (the Most Scale Bit), save order. takes (Acknowledge) period, during terminal takes `H', this pull down terminal. After transferred necessary data, terminals lead data transfer stop condition, thus transfer comes close. Defined rise down during period. Defined rise during period. Transfer data format After transfer start condition, transfers slave address (1000 000*) terminal, control data, then, stop condition (See figure Slave address made 7bits, *38th shows direction transferring data, takes write mode this side, this input operation mode), case reading mode this side, this output operation mode). Data works with bit, transfer stop condition before stop 8bit transfer, stop transfer, will canceled transfer dates. called bit. Fig.1 DATA STRUCTURE "WRITE" mode
START Condition Slave Address Control data STOP condition
Fig.2 DATA STRUCTURE "READ" mode
START condition Slave Address Internal Data STOP condition
output data synchronizes with clock pin. Then, output made after output data. bit8 result STERO STEREO) bit7 result SAP) bit6 bit1 fixed Initialize This initialized circuit protection. Initial condition (All bits)
No.A0979-9/10
LA72702NV
Reference
Parameter level input voltage HIGH level input voltage level output current clock frequency Set-up time repeated START condition Hold time START condition. After this period, first clock pulse generated period clock Rise time both signals HIGH period clock Fall time both signals Data hold time Data set-up time Set-up time STOP condition free time between STOP START condition Symbol fSCL tLOW tHIGH tBUF -0.5 unit
Definition timing
SANYO Semiconductor Co.,Ltd. assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO Semiconductor Co.,Ltd. products described contained herein. SANYO Semiconductor Co.,Ltd. strives supply high-quality high-reliability products, however, semiconductor products fail malfunction with some probability. possible that these probabilistic failures malfunction could give rise accidents events that could endanger human lives, trouble that could give rise smoke fire, accidents that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO Semiconductor Co.,Ltd. products described contained herein controlled under applicable local export control laws regulations, such products require export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written consent SANYO Semiconductor Co.,Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO Semiconductor Co.,Ltd. product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. Upon using technical information products described herein, neither warranty license shall granted with regard intellectual property rights other rights SANYO Semiconductor Co.,Ltd. third party. SANYO Semiconductor Co.,Ltd. shall liable claim suits with regard third party's intellectual property rights which resulted from technical information products mentioned above.
This catalog provides information November, 2007. Specifications information herein subject change without notice.
No.A0979-10/10

LA72702NV Monolithic Linear LA72702NV Overview LA7

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