Shadi Hawawini Introduction recent years, most popular, readily a

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Platform Solution SDRAM Power Management
Shadi Hawawini
Introduction recent years, most popular, readily available solution memory been JEDEC SDRAM standard. (double-data-rate) standard offers superior performance compared previous memory technologies such single-data-rate SDRAM, because transfers data both rising falling edges clock signal. comparable solution many other alternatives such Rambus RDRAM, however widely used manufactured numerous companies easy integrate, whereas RAMBUS difficult implement, therefore impractical most applications. problem that arises with SDRAM that often times separate power regulator required manage specific power requirements needed properly operate SDRAM, adding both, extra cost complexity design, well reducing overall system integration. This application note written show memory integrated into system, without addition separate power regulator. example, memory shall integrated into system consisting Graphics Processing Unit, GPU, single device shall manage power both devices, creating single, simple, platform solution. device that will used implement this platform solution Summit Microelectronics SMB113A, highly integrated flexible power manager, primarily used wide range portable applications. SMB113A integrates synchronous buck converters, whose outputs ±1.5% accurate better using proprietary ADOC technology. Additionally, SMB113A versatile easily configurable part Windows based that programs output voltages, margining, sequencing, power on/off options, various monitoring triggering features, among abundance others, thus simplifying reducing development time.
Vagp 1.5V Vgcore 1.2V
SMB113A
VDDQ 2.5V 2.5A VREF 1.25V 1.5A
Figure Typical Applications Block Diagram
SUMMIT Microelectronics, Inc. 2006 Mary Ave, Sunnyvale, 94085 Phone 408-523-1000 408-523-1266 www.summitmicro.com 2116 10/05/07
Overview Specifications Currently there SDRAM standards available market, DDR2, with DDR3 standard currently works. three using same basic power requirements operation with notable exceptions, which being that Output Supply Voltage, VDDQ 2.5V, DDR2 uses VDDQ 1.8V DDR3 tentatively 1.5V help reduce power consumption. However, aside from that, SDRAM's using three Voltages, Output Supply Voltage, VDDQ; Input Reference Voltage, VREF; Termination Voltage, VTT. rules that power converted must follow proper operation follows: VREF 0.5*VDDQ VREF must able track variations VDDQ must equal VREF 40mV Ripple Voltage VREF must exceed DDR2, VDD=VDDL=VDDQ Power voltage ramp 20ms Must able source sink current channel requires significant amount current, driving larger FETs supply that current output possible strong drive capability SMB113A. memory, using SDRAM example, Channel SMB113A supply VDDQ 2.5V Channel supply VREF 1.25V, thus satisfying conditions three. Using proper compensation values, well 22µF output ceramic capacitor parallel with 0.1µF bypass ceramic capacitor, other capacitors, will reduce ripple output channels satisfy condition four. general rule, larger capacitor lower ESR, better output ripple will satisfy condition six, make programmable Slew Rate control Windows adjust rate which each channel power manger turns meet requirements, Slew Rate should either 200V/s greater achieve desired power time. Slew Rate dependent resistor divider therefore, increasing (decreasing will also increase slew rate. Additionally, ability source sink current done intrinsically nature synchronous buck topology used SMB113A.
Implementation Many these requirements already satisfied using SMB113A without modifications additions. power GPU, assign Channel SMB113A output voltage 1.5V, Channel voltage 1.2V. Although 1.2V
Summit Microelectronics,
2116 10/5/2007
Programmable Output Voltage
Programmable Slew Rate
Resistor Divider
Figure Programmable Output Voltage Slew Rate using Windows based final requirement that must satisfied condition that VREF must able track variations VDDQ. This accomplished addition high-speed operational amplifier resistor divider, seen Figure operational amplifier will serve bypass error amplifier within SMB113. When configuring amplifier, reference voltage must applied positive non-inverting input. This reference voltage will portion voltage VDDQ tracked. While VDDQ voltage could divided equaly using resistor divider with equal upper lower resistors, reduce impedance negative terminal resistor divider ratio will used. Assuming that using DDR, VDDQ 2.5V resistor ratio will result 1.0V reference non-inverting terminal operational amplifier. Next, output tracked voltage, VREF, divided down from 1.25V 1.0V using resistor internal SMB113A. utilizing internal resistor divider within SMB113A effectively reduce input impedance inverting terminal amplifier, subsequently reducing impedance this node reducing noise susceptibility converter. variations VDDQ "sensed" noninverting terminal operational amplifier, which then being "compared" divided down version VREF inverting terminal. output amplifier then into comparator (COMP2), which internally adjusts duty cycle enable VREF track VDDQ. When selecting operational amplifier critical that function Rail-to-Rail (within 50mV either supply rail) that specified slew rate exceeds 100V/us.
Summit Microelectronics,
2116 10/5/2007
HSDRV
10uH
VREF
LSDRV
10uF
0.1uF
COMP1 COMP2 680pF
0.499K 330pF
22pF
VDDQ
Figure VDDQ Variation tracking circuit Conclusion Through addition single hi-speed Op-Amp, compatibility added Summit Microelectronics SMB113A integrated 4-channel synchronous buck power manager, while maintaining high level integration simplicity reducing overall system cost. Using this technique possible manage several devices, including memory, seen Figure using single power manager, creating highly integrated, simple adaptable platform solution most design needs.
Summit Microelectronics,
2116 10/5/2007
NOTICE
SUMMIT Microelectronics, Inc. reserves right make changes products contained this publication order improve design, performance reliability. SUMMIT Microelectronics, Inc. assumes responsibility circuits described herein, conveys license under patent other right, makes representation that circuits free patent infringement. Charts schedules contained herein reflect representative operating parameters, vary depending upon user's specific application. While information this publication been carefully checked, SUMMIT Microelectronics, Inc. shall liable damages arising result error omission. SUMMIT Microelectronics, Inc. does recommend products life support aviation applications where failure malfunction product reasonably expected cause failure either system significantly affect their safety effectiveness. Products authorized such applications unless SUMMIT Microelectronics, Inc. receives written assurances, satisfaction, that: risk injury damage been minimized; user assumes such risks; potential liability SUMMIT Microelectronics, Inc. adequately protected under circumstances.
Revision This document supersedes previous versions. Please check Summit Microelectronics Inc. site http://www.summitmicro.com data sheet updates. Copyright 2006 SUMMIT MICROELECTRONICS, Inc. ADOC
PROGRAMMABLE POWER GREEN PLANET
registered trademarks Summit Microelectronics Inc., trademark Philips Corporation.
Summit Microelectronics,
2116 10/5/2007

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