LC87F75C8A CMOS FROM 128K byte, 4096 byte on-chip 8-bit 1-ch

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LC87F75C8A CMOS FROM 128K byte, 4096 byte on-chip 8-bit 1-ch

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Ordering number ENA0413
LC87F75C8A
CMOS FROM 128K byte, 4096 byte on-chip
8-bit 1-chip Microcontroller
SANYO LC87F75C8A 8-bit microcomputer that, centered around running minimum cycle time 83.3ns, integrates single chip number hardware features such 128K-byte flash (onboard programmable), 4096-byte RAM, on-chip debugger, controller/driver, sophisticated 16-bit timer/counter (may divided into 8-bit timers), 16-bit timer/counter (may divided into 8-bit timers/counters 8-bit PWMs), four 8-bit timers with prescaler, 16-bit timer with prescaler (may divided into 8-bit timers), base timer serving timeof-day clock, time counter, synchronous interface (with automatic block transmission/reception capabilities), asynchronous/synchronous interface, UART interface (full duplex), 8-bit 15-channel converter, 12-bit channels, high-speed clock counter, system clock frequency divider, small signal detector, correction function, remote control receive function, 28-source 10-vector interrupt feature.
Features
Flash Capable on-board-programming with wide range, 5.5V, voltage source. Block-erasable 128-byte units 131072 bits (LC87F75C8A) 4096 bits (LC87F75C8A) Minimum Cycle Time 83.3ns (12MHz) VDD=3.0 5.5V 125ns (8MHz) VDD=2.5 3.0V 250ns (4MHz) VDD=2.2 2.5V Note: cycle time here refers read speed. Minimum Instruction Cycle Time (tCYC) 250ns (12MHz) VDD=3.0 5.5V 375ns (8MHz) VDD=2.5 3.0V 750ns (4MHz) VDD=2.2 2.5V
This production produced sold SANYO under license Silicon Storage Technology Inc. Specifications information herein subject change without notice.
SANYO Semiconductor products described contained herein have specifications that handle applications that require extremely high levels reliability, such life-support systems, aircraft's control systems, other applications whose failure reasonably expected result serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest before usingany SANYO Semiconductor products described contained herein such applications. SANYO Semiconductor assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO Semiconductor products described contained herein.
Ver.1.01
N0106HKIM B8-9234 No.A0413-1/26
LC87F75C8A
Ports Normal withstand voltage ports Ports whose direction designated units (P1n, P35, P73, P8n, XT2) Ports whose direction designated units (P0n) (When N-channel open drain output selected, data input units.) Normal withstand voltage input port (XT1) ports Segment output (S00 S47) Common output (COM0 COM3) Bias terminals driver Other functions Input/output ports (PAn, PBn, PCn, PDn, PEn, PFn,) Input ports (PLn) Dedicated oscillator ports (CF1, CF2) Reset (RES) Power pins (VSS1 VSS3, VDD1 VDD3) Controller Seven display modes available (static, 1/2, 1/3, duty 1/2, bias) Segment output common output switched general-purpose input/output ports Small Signal Detection (MIC signals etc) Counts pulses with level which greater than preset value 2-bit counter Timers Timer 16-bit timer/counter with capture registers. Mode 8-bit timer with 8-bit programmable prescaler (with 8-bit capture registers) channels Mode 8-bit timer with 8-bit programmable prescaler (with 8-bit capture registers) 8-bit counter (with 8-bit capture registers) Mode 16-bit timer with 8-bit programmable prescaler (with 16-bit capture registers) Mode 16-bit counter (with 16-bit capture registers) Timer 16-bit timer/counter that supports PWM/toggle outputs Mode 8-bit timer with 8-bit prescaler (with toggle outputs) 8-bit timer/counter with 8-bit prescaler (with toggle outputs) Mode 8-bit with 8-bit prescaler channels Mode 16-bit timer/counter with 8-bit prescaler (with toggle outputs) (toggle outputs also possible from lower-order bits) Mode 16-bit timer with 8-bit prescaler (with toggle outputs) (The lower-order bits used PWM.) Timer 8-bit timer with 6-bit prescaler Timer 8-bit timer with 6-bit prescaler Timer 8-bit timer with 6-bit prescaler (with toggle output) Timer 8-bit timer with 6-bit prescaler (with toggle output) Timer 16-bit timer Mode 8-bit timer with 8-bit prescaler channels (with toggle output) Mode 16-bit timer with 8-bit prescaler (with toggle output) Base timer clock selectable from subclock (32.768kHz crystal oscillation), system clock, timer prescaler output. Interrupts programmable different time schemes time counter Using with base timer, used 65000 minute second counter. High-speed Clock Counter count clocks with maximum clock rate 20MHz main clock 10MHz). generate output real-time.
No.A0413-2/26
LC87F75C8A
SIO0: 8-bit synchronous serial interface first/MSB first mode selectable Built-in 8-bit baudrate generator (maximum transfer clock cycle tCYC) Automatic continuous data transmission bits specifiable 1-bit units, suspension resumption data transmission possible 1-byte units) SIO1: 8-bit asynchronous/synchronous serial interface Mode Synchronous 8-bit serial 3-wire configuration, tCYC transfer clocks) Mode Asynchronous serial (half-duplex, 8-data bits, 1-stop bit, 2048 tCYC baudrates) Mode mode (start bit, 8-data bits, tCYC transfer clocks) Mode mode (start detect, 8-data bits, stop detect) UART Full duplex 7/8/9 data bits selectable stop (2-bit continuous data transmission) Built-in baudrate generator Converter: bits channels PWM: Multi frequency 12-bit channels Remote Control Receiver Circuit (sharing pins with P73/INT3/T0IN/RMIN) Noise rejection function (Units noise rejection filter: about 120µs, when selecting 32.768kHz crystal oscillator clock.) Supporting reception formats with guide-pulse half-clock/clock/none. Determines reception detecting no-signal periods carrier). (Supports same reception format with different length.) X'tal HOLD mode release function Watchdog Timer External watchdog timer Interrupt reset signals selectable Clock Output Function Able output selected oscillation clock 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 system clock. Able output oscillation clock clock.
No.A0413-3/26
LC87F75C8A
Interrupts sources, vector addresses Provides three levels (low (L), high (H), highest (X)) multiplex interrupt control. interrupt requests level equal lower than current interrupt accepted. When interrupt requests more vector addresses occur same time, interrupt highest level takes precedence over other interrupts. interrupts same level, interrupt into smallest vector address takes precedence.
Vector Address 00003H 0000BH 00013H 0001BH 00023H 0002BH 00033H 0003BH 00043H 0004BH Level INT0 INT1 INT2/T0L/INT4/remote control receiver INT3/base timer/INT5 T0H/INT6 T1L/T1H/INT7 SIO0/UART1 receive/T8L/T8H SIO1/UART1 transmit ADC/MIC/T6/T7/PWM4, Port 0/T4/T5 Interrupt Source
Priority levels interrupts same level, with smallest vector address takes precedence. IFLG (List interrupt source flag function) Shows list interrupt source flags that caused branching particular vector address (shown diagram above). Subroutine Stack Levels: 2048 levels (The stack allocated RAM.) High-speed Multiplication/Division Instructions bits bits tCYC execution time) bits bits tCYC execution time) bits bits tCYC execution time) bits bits tCYC execution time) Oscillation Circuits oscillation circuit (internal): system clock oscillation circuit: system clock, with internal Crystal oscillation circuit: low-speed system clock, with internal Frequency variable oscillation circuit (internal): system clock Adjustable (typ.) step from selected center frequency. Measures oscillation clock using input signal from reference. System Clock Divider Function current. minimum instruction cycle selectable from 300ns, 600ns, 1.2µs, 2.4µs, 4.8µs, 9.6µs, 19.2µs, 38.4µs, 76.8µs main clock rate 10MHz).
No.A0413-4/26
LC87F75C8A
Standby Function HALT mode: Halts instruction execution while allowing peripheral circuits continue operation. (Some parts serial transfer function stops operation.) Oscillation halted automatically. Canceled system reset occurrence interrupt HOLD mode: Suspends instruction execution operation peripheral circuits. X'tal, frequency variable oscillators automatically stop operation. There three ways resetting HOLD mode. Setting reset level Setting least INT0, INT1, INT2, INT4, INT5 pins specified level Having interrupt source established port X'tal HOLD mode: Suspends instruction execution operation peripheral circuits except base timer remote control receiver circuit. frequency variable oscillators automatically stop operation. state crystal oscillation established when X'tal HOLD mode entered retained. There five ways resetting X'tal HOLD mode. Setting reset level Setting least INT0, INT1, INT2, INT4, INT5 pins specified level Having interrupt source established port Having interrupt source established base timer circuit Having interrupt source established remote control receiver circuit Correction Function Executes correction program detection match with program counter value. Correction program area size: bytes On-chip Debugger Supports software debugging with mounted target board. Package Form
Lead-free type Lead-free type
Development Tools On-chip debugger: TCB87-TypeA TCB87-TypeB LC87F75C8A Flash Programming Boards
Package Programming boards W87FQ100 W87FSQ100
Flash Programmer
Maker Single Flash Support Group, Inc. (Formerly Ando Electric Co., Ltd.) Gang Model AF9708/AF9709/ AF9709B AF9723 (Main body) AF9833 (Unit) SANYO (SANYO FWS) Supported version (Note) After 02.35 After 02.04 After 01.83 After 1.02A LC87F75C8A LC87F5JC8A FAST Device
Note: Please check latest version. Same Package Assignment Mask Version. LC877500 series options using flash data. Thus board used mass production used debugging evaluation without modifications. program mask version used, usable ROM/RAM capacity same mask version.
No.A0413-5/26
LC87F75C8A
Package Dimensions
unit (typ) 3151A
23.2
14.0
20.0
0.65 (0.58)
(2.7)
0.15
3.0max
SANYO QIP100E(14X20)
Package Dimensions
unit (typ) 3274
16.0 14.0
17.2
(1.0)
(1.0)
0.125
1.2max
SANYO TQFP100(14X14)
14.0 16.0
No.A0413-6/26
Assignments
V2/PL5/AN13/DBGP1 V1/PL4/AN12/DBGP0 COM0/PL0 COM1/PL1 COM2/PL2 COM3/PL3 P30/INT4/T1IN/INT6/T0LCP1/PWM4 P31/INT4/T1IN/PWM5 VSS3 VDD3 P32/INT4/T1IN/UTX1 P33/INT4/T1IN/URX1 P34/INT5/T1IN/INT7/T0HCP1 P35/INT5/T1IN P02/T8LO P03/T8HO P05/CKO
LC87F75C8A
LC87F75C8A
SANYO:
view
P06/T6O P07/T7O P10/SO0 P11/SI0/SB0 P12/SCK0 P13/SO1 P14/SI1/SB1 P15/SCK1 P16/T1PWML P17/T1PWMH/BUZ XT1/AN10 XT2/AN11 VSS1 VDD1 P80/AN0 P81/AN1 P82/AN2 P83/AN3 P84/AN4 P85/AN5 P86/AN6 P87/AN7/MICIN P70/INT0/T0LCP/AN8 P71/INT1/T0HCP/AN9 P72/INT2/T0IN/NKIN P73/INT3/T0IN/RMIN S0/PA0
V3/PL6/AN14/DBGP2 S47/PF7 S46/PF6 S45/PF5 S44/PF4 S43/PF3 S42/PF2 S41/PF1 S40/PF0 S39/PE7 S38/PE6 S37/PE5 S36/PE4 S35/PE3 S34/PE2 S33/PE1 S32/PE0 S31/PD7 S30/PD6 S29/PD5 S28/PD4 S27/PD3 S26/PD2 S25/PD1 S24/PD0 VSS2 VDD2 S23/PC7 S22/PC6 S21/PC5
"Lead-free Type"
No.A0413-7/26
S20/PC4 S19/PC3 S18/PC2 S17/PC1 S16/PC0 S15/PB7 S14/PB6 S13/PB5 S12/PB4 S11/PB3 S10/PB2 S9/PB1 S8/PB0 S7/PA7 S6/PA6 S5/PA5 S4/PA4 S3/PA3 S2/PA2 S1/PA1
LC87F75C8A
S46/PF6 S45/PF5 S44/PF4 S43/PF3 S42/PF2 S41/PF1 S40/PF0 S39/PE7 S38/PE6 S37/PE5 S36/PE4 S35/PE3 S34/PE2 S33/PE1 S32/PE0 S31/PD7 S30/PD6 S29/PD5 S28/PD4 S27/PD3 S26/PD2 S25/PD1 S24/PD0 VSS2 VDD2 S47/PF7 V3/PL6/AN14/DBGP2 V2/PL5/AN13/DBGP1 V1/PL4/AN12/DBGP0 COM0/PL0 COM1/PL1 COM2/PL2 COM3/PL3 P30/INT4/T1IN/INT6/T0LCP1/PWM4 P31/INT4/T1IN/PWM5 VSS3 VDD3 P32/INT4/T1IN/UTX1 P33/INT4/T1IN/URX1 P34/INT5/T1IN/INT7/T0HCP1 P35/INT5/T1IN P02/T8LO P03/T8HO P05/CKO P06/T6O P07/T7O P10/SO0
LC87F75C8A
S23/PC7 S22/PC6 S21/PC5 S20/PC4 S19/PC3 S18/PC2 S17/PC1 S16/PC0 S15/PB7 S14/PB6 S13/PB5 S12/PB4 S11/PB3 S10/PB2 S9/PB1 S8/PB0 S7/PA7 S6/PA6 S5/PA5 S4/PA4 S3/PA3 S2/PA2 S1/PA1 S0/PA0 P73/INT3/T0IN/RMIN
P11/SI0/SB0 P12/SCK0 P13/SO1 P14/SI1/SB1 P15/SCK1 P16/T1PWML P17/T1PWMH/BUZ XT1/AN10 XT2/AN11 VSS1 VDD1 P80/AN0 P81/AN1 P82/AN2 P83/AN3 P84/AN4 P85/AN5 P86/AN6 P87/AN7/MICIN P70/INT0/T0LCP/AN8 P71/INT1/T0HCP/AN9 P72/INT2/T0IN/NKIN
view
SANYO:
"Lead-free Type"
No.A0413-8/26
LC87F75C8A
System Block Diagram
Interrupt control
correct Standby control Flash VMRC X'tal Clock generator
SIO0
interface
SIO1
Port
register
Timer (High speed clock counter)
Port
register
Timer
Port
Base timer
Port
Controller
Port
INT0 Noise Rejection Filter
Timer
Small signal detector
Timer
Timer
Stack pointer
UART1
Timer
Watchdog timer
PWM4/5
Timer
On-chip debugger
Remote control receiver circuit
time counter
No.A0413-9/26
LC87F75C8A
Description
Name VSS1 VSS2 VSS3 VDD1 VDD2 VDD3 Port 8-bit port specifiable 4-bit units Pull-up resistors turned 4-bit units. Input HOLD release Input port interrupt Shared pins P02: Timer toggle output P03: Timer toggle output P05: Clock output (system clock/can selected from clock) P06: Timer toggle output P07: Timer toggle output Port 8-bit port specifiable 1-bit units Pull-up resistors turned 1-bit units. Shared pins P10: SIO0 data output P11: SIO0 data input/bus P12: SIO0 clock P13: SIO1 data output P14: SIO1 data input/bus P15: SIO1 clock P16: Timer 1PWML output P17: Timer 1PWMH output/beeper output Port 6-bit port specifiable 1-bit units Pull-up resistors turned 1-bit units. Shared pins P33: INT4 input/HOLD release input/timer event input/timer capture input/ timer capture input P35: INT5 input/HOLD release input/timer event input/timer capture input/ timer capture input P30: PWM4 output/INT6 input/timer capture input P31: PWM5 output P32: UART1 transmit P33: UART1 receive P34: INT7 input timer capture input Interrupt acknowledge type Rising INT4 INT5 INT6 INT7 enable enable enable enable Falling enable enable enable enable Rising Falling enable enable enable enable level disable disable disable disable level disable disable disable disable power supply Description Option
power supply
Continued next page.
No.A0413-10/26
LC87F75C8A
Continued from preceding page.
Name Port 4-bit port specifiable 1-bit units Pull-up resistors turned 1-bit units. Shared pins P70: INT0 input/HOLD release input/timer capture input/watchdog timer output P71: INT1 input/HOLD release input/timer capture input P72: INT2 input/HOLD release input/timer event input/timer capture input/ high speed clock counter input P73: INT3 input (with noise filter)/timer event input/timer capture input/ remote control receiver input converter input ports: (P70), (P71) Interrupt acknowledge type Rising INT0 INT1 INT2 INT3 enable enable enable enable Falling enable enable enable enable Rising Falling disable disable enable enable level enable enable disable disable level enable enable disable disable Description Option
Port
8-bit port specifiable 1-bit units Shared pins converter input ports: (P80) (P87) Small signal detector input port: MICIN (P87)
S0/PA0 S7/PA7 S8/PB0 S15/PB7 S16/PC0 S23/PC7 S24/PD0 S31/PD7 S32/PE0 S39/PE7 S40/PF0 S47/PF7 COM0/PL0 COM3/PL3 V1/PL4 V3/PL7
Segment output used general-purpose port (PA) Segment output used general-purpose port (PB) Segment output used general-purpose port (PC) Segment output used general-purpose port (PD) Segment output used general-purpose port (PE) Segment output used general-purpose port (PF) Common output used general-purpose input port (PL) output bias power supply used general-purpose input port (PL) Shared pins converter input ports: AN12 (V1) AN14 (V3) On-chip debugger pins: DBGP0 (V1) DBGP2 (V3)
Input Input
Reset 32.768kHz crystal oscillator input Shared pins General-purpose input port converter input port: AN10 Must connected VDD1 used. 32.768kHz crystal oscillator output Shared pins General-purpose port converter input port: AN11 Must oscillation kept open used.
Input Output
Ceramic resonator input Ceramic resonator output
No.A0413-11/26
LC87F75C8A
Port Output Types
table below lists types port outputs presence/absence pull-up resistor. Data read into input port even output mode.
Port Name Option Selected Units each Option Type each each S0/PA0 S47/PF7 COM0/PL0 COM3/PL3 V1/PL4 V3/PL6 Input 32.768kHz crystal oscillator (Input only) Output 32.768kHz crystal oscillator (Nch-open drain when general-purpose output mode) Input only Input only CMOS Nch-open drain CMOS Nch-open drain CMOS Nch-open drain Nch-open drain CMOS Nch-open drain CMOS Output Type Pull-up Resistor Programmable (Note) Programmable Programmable Programmable Programmable Programmable Programmable Programmable
Note: Programmable pull-up resistors port controlled units (P00 07). Connect shown below minimize noise input VDD1 pin. sure electrically short VSS1, VSS2, VSS3 pins.
VDD1 Power supply
backup
VDD2 VDD3
VSS1
VSS2 VSS3
internal memory sustained VDD1. none VDD2 VDD3 backed high level output ports unstable HOLD backup mode, allowing through current flow into input buffer thus shortening backup time. Make sure that port outputs held level HOLD backup mode.
No.A0413-12/26
LC87F75C8A
Absolute Maximum Ratings 25°C, VSS1 VSS2 VSS3
Parameter Maximum supply voltage supply voltage Input voltage Input/output voltage VI(1) VIO(1) VLCD V1/PL4, V2/PL5, V3/PL6 Port XT1, CF1, Ports Ports Ports Peak output current IOPH(2) IOPH(3) IOPH(4) Mean output High level output current current (Note 1-1) IOMH(2) IOMH(3) IOMH(4) Total output current IOAH(1) IOAH(2) IOAH(3) IOAH(4) IOAH(5) IOAH(6) IOAH(7) Peak output current IOPL(1) IOPL(2) IOPL(3) IOPL(4) Mean output level output current current (Note 1-1) IOML(1) IOML(2) IOML(3) IOML(4) Total output current IOAL(1) IOAL(2) IOAL(3) IOAL(4) IOAL(5) IOAL(6) IOAL(7) Maximum power dissipation Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ports Ta=-20 +70°C Ta=-20 +70°C Total pins Total pins Total pins Total pins Total pins Total pins Total pins Current each Current each Current each Current each Current each Current each Current each Current each Total pins Total pins Total pins Total pins Total pins Total pins Total pins IOMH(1) Ports Ports Ports Ports Ports CMOS output selected Current each CMOS output selected Current each Current each Current each IOPH(1) Ports CMOS output selected Current each CMOS output selected Current each Current each Current each -7.5 -0.3 VDD+0.3 VDD1=VDD2=VDD3 Symbol Pin/Remarks VDD1, VDD2, VDD3 Conditions VDD[V] VDD1=VDD2=VDD3 -0.3 -0.3 -0.3 Specification +6.5 VDD+0.3 unit
Note 1-1: mean output current mean value measured over 100ms.
Continued next page.
No.A0413-13/26
LC87F75C8A
Continued from preceding page.
Parameter Operating ambient temperature Storage ambient temperature Tstg Symbol Topr Pin/Remarks Conditions VDD[V] Specification +125 unit
Allowable Operating Range -20°C +70°C, VSS1 VSS2 VSS3
Parameter Operating supply voltage (Note 2-1) Memory sustaining supply voltage High level input voltage VIH(2) VIH(1) Ports Ports Port Port Ports port input/ interrupt side VIH(3) VIH(4) VIH(5) VIH(6) level input voltage VIL(1) interrupt side small signal input side watchdog timer side XT1,XT2,CF1, Ports Ports Port VIL(2) Port Ports port input/ interrupt side VIL(3) VIL(4) VIL(5) VIL(6) Instruction cycle time (Note 2-2) External system clock frequency FEXCF(1) open System clock frequency division ratio=1/1 External system clock duty=50±5% open System clock frequency division ratio=1/2 24.4 tCYC interrupt side small signal input side watchdog timer side XT1,XT2,CF1,RES Output disabled When INT1VTSL=1 Output disabled Output disabled When INT1VTSL=0 (P71 only) Output disabled Output disabled Output disabled When INT1VTSL=1 Output disabled 0.85VDD 0.75VDD 0.9VDD 0.75VDD 0.237 0.356 0.712 0.15VDD +0.4 0.2VDD 0.1VDD +0.4 0.2VDD 0.45VDD 0.25VDD 0.8VDD -1.0 0.25VDD Output disabled When INT1VTSL=0 (P71 only) 0.3VDD +0.7 Output disabled 0.3VDD +0.7 VDD1=VDD2=VDD3 Symbol VDD(1) Pin/Remarks VDD1=VDD2=VDD3 Conditions VDD[V] 0.237µs tCYC 200µs 0.356µs tCYC 200µs 0.712µs tCYC 200µs register contents sustained HOLD mode. Specification unit
Note 2-1: must held greater than equal 3.0V flash onboard programming mode. Note 2-2: Relationship between tCYC oscillation frequency 3/FmCF division ratio 6/FmCF division ratio 1/2.
Continued next page.
No.A0413-14/26
LC87F75C8A
Continued from preceding page.
Parameter Oscillation frequency range (Note 2-3) FmCF(3) FmRC FmVMRC(1) CF1, FmCF(2) CF1, Symbol FmCF(1) Pin/Remarks CF1, Conditions VDD[V] 12MHz ceramic oscillation Fig. 8MHz ceramic oscillation Fig. 4MHz ceramic oscillation Fig. Internal oscillation Frequency variable source oscillation When VMRAJ2 0=4, VMFAJ2 0=0, VMSL4M=0 FmVMRC(2) Frequency variable source oscillation When VMRAJ2 0=4, VMFAJ2 0=0, VMSL4M=1 FsX'tal Frequency variable oscillation usable range Frequency variable oscillation adjustment range VmADJ(2) VmADJ(1) Each step VMRAJn (Wide range) Each step VMFAJn (Small range) OpVMRC(1) OpVMRC(2) XT1, 32.768kHz crystal oscillation Fig. When VMSL4M=0 When VMSL4M=1 32.768 Specification unit
Note 2-3: Tables oscillation constants.
Electrical Characteristics -20°C +70°C, VSS1 VSS2 VSS3
Parameter High level input current Symbol IIH(1) Pin/Remarks Ports Ports Ports Port IIH(2) IIH(3) IIH(4) IIH(5) XT1, small signal input side level input current IIL(1) Ports Ports Ports Port IIL(2) IIL(3) IIL(4) IIL(5) XT1, small signal input side Conditions VDD[V] Output disabled Pull-up resistor VIN=VDD (Including output Tr's leakage current) VIN=VDD input port specification VIN=VDD VIN=VDD VIN=VBIS+0.5V (VBIS: Bias voltage) Output disabled Pull-up resistor VIN=VSS (Including output Tr's leakage current) VIN=VSS input port specification VIN=VSS VIN=VSS VIN=VBIS-0.5V (VBIS Bias voltage) -8.5 -5.5 -4.2 -1.5 Specification unit
Continued next page.
No.A0413-15/26
LC87F75C8A
Continued from preceding page.
Parameter High level output voltage Symbol VOH(1) VOH(2) VOH(3) VOH(4) VOH(5) VOH(6) VOH(7) VOH(8) VOH(9) VOH(10) VOH(11) level output voltage VOL(1) VOL(2) VOL(3) Ports Ports 30,31 (PWM function output mode) VOL(4) VOL(5) VOL(6) VOL(7) VOL(8) VOL(9) VOL(10) output voltage regulation VODLS Ports (Port function output mode) Ports Ports Ports IOL=30mA IOL=5mA IOL=2.5mA IOL=1.6mA IOL=1mA IOL=1.6mA IOL=1mA IO=0mA VLCD, 2/3VLCD,1/3VLCD level output Fig. VODLC COM0 COM3 IO=0mA VLCD, 2/3VLCD,1/2VLCD, 1/3VLCD level output Fig. bias resistor RLCD(1) RLCD(2) Resistance bias resister Resistance bias resister 1/2R mode Resistance pull-up Hysterisis voltage Rpu(1) Rpu(2) VHYS(1) VHYS(2) capacitance Ports Ports Ports Ports small signal input side pins pins other than that under test: VIN=VSS f=1MHz Ta=25°C Input sensitivity Vsen small signal input side 0.12VDD Vp-p 0.1VDD 0.1VDD VOH=0.9VDD Fig. Fig. ±0.2 ±0.2 Ports Ports Ports Ports Pin/Remarks Ports IOH=-1mA IOH=-0.4mA IOH=-0.2mA IOH=-10mA IOH=-1.6mA IOH=-1mA IOH=-0.4mA IOH=-0.2mA IOH=-1mA IOH=-0.4mA IOH=-0.2mA IOL=10mA IOL=1.6mA IOL=1mA Conditions VDD[V] VDD-1 VDD-0.4 VDD-0.4 VDD-1.5 VDD-0.4 VDD-0.4 VDD-0.4 VDD-0.4 VDD-1 VDD-0.4 VDD-0.4 Specification unit
No.A0413-16/26
LC87F75C8A
Serial Characteristics -20°C +70°C, VSS1 VSS2 VSS3
SIO0 Serial Characteristics (Note 4-1-1)
Parameter Frequency level Input clock pulse width High level pulse width tSCKHA(1) Continuous data transmission/reception mode Serial clock Fig. (Note 4-1-2) Frequency level Output clock pulse width High level pulse width tSCKHA(2) Continuous data transmission/reception mode CMOS output selected Fig. Data setup time Serial input tsDI(1) SB0(P11), SI0(P11) Data hold time thDI(1) Must specified with respect rising edge SIOCLK. Fig. Output delay Input clock time tdD0(2) tdD0(1) SO0(P10), SB0(P11) Continuous data transmission/reception mode (Note 4-1-3) Synchronous 8-bit mode (Note 4-1-3) tdD0(3) (Note 4-1-3) (1/3)tCYC +0.05 0.03 0.03 tSCKH(2) +2tCYC tSCKH(2) tSCK(2) tSCKL(2) SCK0(P12) CMOS output selected Fig. tSCK tSCKH(2) +(10/3) tCYC tCYC tSCKH(1) Symbol tSCK(1) tSCKL(1) Pin/Remarks SCK0(P12) Conditions VDD[V] Fig. tCYC Specification unit
(1/3)tCYC +0.05 1tCYC +0.05
Serial output
Note 4-1-1: These specifications theoretical values. margin depending use. Note 4-1-2: serial-clock-input continuous trans/rec mode, time from SI0RUN being when serial clock first negative edge serial clock must longer than tSCKHA. Note 4-1-3: Must specified with respect falling edge SIOCLK. Must specified time beginning output state change open drain output mode. Fig.
Output clock
No.A0413-17/26
LC87F75C8A
SIO1 Serial Characteristics (Note 4-2-1)
Parameter Frequency Input clock level pulse width High level pulse width Frequency Output clock level pulse width High level pulse width Data setup time Serial input tsDI(2) SB1(P14), SI1(P14) Data hold time thDI(2) Must specified with respect rising edge SIOCLK. Fig. Output delay time Serial output tdD0(4) SO1(P13), SB1(P14) Must specified with respect falling edge SIOCLK. Must specified time beginning output state change open drain output mode. Fig. (1/3)tCYC +0.05 0.03 0.03 tSCKH(4) tSCK(4) tSCKL(4) SCK1(P15) CMOS output selected Fig. tSCKH(3) Symbol tSCK(3) tSCKL(3) Pin/Remarks SCK1(P15) Conditions VDD[V] Fig. tCYC tSCK Specification unit
Serial clock
Note 4-2-1: These specifications theoretical values. margin depending use.
No.A0413-18/26
LC87F75C8A
Pulse Input Conditions -20°C +70°C, VSS1 VSS2 VSS3
Parameter High/low level pulse width Symbol tPIH(1) tPIL(1) Pin/Remarks INT0(P70), INT1(P71), INT2(P72), INT4(P30 P33), INT5(P34 P35), INT6(P30), INT7(P34) tPIH(2) tPIL(2) tPIH(3) tPIL(3) tPIH(4) tPIL(4) tPIH(5) tPIL(5) tPIH(6) tPIL(6) tPIL(7) RMIN(P73) INT3(P73) when noise filter time constant INT3(P73) when noise filter time constant 1/32 INT3(P73) when noise filter time constant 1/128 MICIN(P87) Interrupt source flag set. Event inputs timer enabled. Interrupt source flag set. Event inputs timer enabled. Interrupt source flag set. Event inputs timer enabled. Condition that signal accepted small signal detection counter. Condition that signal accepted remote control receiver circuit. Resetting enabled. RMCK (Note5-1) tCYC Conditions VDD[V] Interrupt source flag set. Event inputs timer enabled. Specification unit
Note 5-1: RMCK unit base clock (40tCYC/50tCYC/Sub-Clock) remote control receiver circuit.
Converter Characteristics -20°C +70°C, VSS1 VSS2 VSS3
Parameter Resolution Absolute accuracy Conversion time tCAD Symbol Pin/Remarks AN0(P80) AN7(P87), AN8(P70), AN9(P71), AN10(XT1), AN11(XT2), AN12(V1), AN13(V2), AN14(V3) conversion (When ADCR2=1) (Note 6-2) conversion (When ADCR2=0) (Note 6-2) 15.20 (tCYC= 0.475µs) 22.78 (tCYC= 0.712µs) 18.24 (tCYC= 0.285µs) 45.56 Analog input voltage range Analog port input current IAINH IAINL VAIN=VDD VAIN=VSS VAIN (tCYC= 0.712µs) (Note 6-1) Conditions VDD[V] Specification ±1.5 100.80 (tCYC= 3.15µs) 100.80 (tCYC= 3.15µs) 100.80 (tCYC= 1.57µs) 100.80 (tCYC= 1.57µs) unit
Note 6-1: quantization error (±1/2LSB) excluded from absolute accuracy value. Note 6-2: conversion time refers interval from time instruction starting converter issued till time complete digital value corresponding analog input value loaded required register.
No.A0413-19/26
LC87F75C8A
Consumption Current Characteristics -20°C +70°C, VSS1 VSS2 VSS3
Parameter Normal mode consumption current (Note 7-1) IDDOP(2) Symbol IDDOP(1) Pin/ Remarks VDD1 =VDD2 =VDD3 Conditions VDD[V] FmCF=12MHz ceramic oscillation mode FmX'tal=32.768kHz crystal oscillation mode System clock 12MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio IDDOP(3) IDDOP(4) IDDOP(5) IDDOP(6) IDDOP(7) IDDOP(8) IDDOP(9) IDDOP(10) IDDOP(11) IDDOP(12) FmCF=8MHz ceramic oscillation mode FmX'tal=32.768kHz crystal oscillation mode System clock 8MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio FmCF=4MHz ceramic oscillation mode FmX'tal=32.768kHz crystal oscillation mode System clock 4MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio FmCF=0Hz (oscillation stopped) FmX'tal=32.768kHz crystal oscillation mode System clock internal oscillation Frequency variable oscillation stopped. frequency division ratio FmCF=0Hz (oscillation stopped) FmX'tal=32.768kHz crystal oscillation mode Internal oscillation stopped. IDDOP(13) System clock 10MHz with frequency variable oscillation frequency division ratio IDDOP(14) IDDOP(15) IDDOP(16) IDDOP(17) IDDOP(18) IDDOP(19) FmCF=0Hz (oscillation stopped) FmX'tal=32.768kHz crystal oscillation mode Internal oscillation stopped. System clock 4MHz with frequency variable oscillation frequency division ratio FmCF=0Hz (oscillation stopped) FmX'tal=32.768kHz crystal oscillation mode System clock 32.768kHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio 11.5 0.28 1.35 0.75 16.5 12.5 Specification unit
Note 7-1: consumption current value includes none currents that flow into output internal pull-up resistors.
Continued next page.
No.A0413-20/26
LC87F75C8A
Continued from preceding page.
Parameter HALT mode consumption current (Note 7-1) IDDHALT(2) Symbol IDDHALT(1) Pin/ Remarks VDD1 =VDD2 =VDD3 HALT mode FmCF=12MHz ceramic oscillation mode FmX'tal=32.768kHz crystal oscillation mode System clock 12MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio IDDHALT(3) HALT mode FmCF=8MHz ceramic oscillation mode IDDHALT(4) FmX'tal=32.768kHz crystal oscillation mode System clock 8MHz side Internal oscillation stopped. IDDHALT(5) Frequency variable oscillation stopped. frequency division ratio IDDHALT(6) HALT mode FmCF=4MHz ceramic oscillation mode IDDHALT(7) FmX'tal=32.768kHz crystal oscillation mode System clock 4MHz side Internal oscillation stopped. IDDHALT(8) Frequency variable oscillation stopped. frequency division ratio IDDHALT(9) IDDHALT(10) IDDHALT(11) IDDHALT(12) HALT mode FmCF=0Hz (oscillation stopped) FmX'tal=32.768kHz crystal oscillation mode System clock internal oscillation Frequency variable oscillation stopped. frequency division ratio HALT mode FmCF=0Hz (oscillation stopped) FmX'tal=32.768kHz crystal oscillation mode IDDHALT(13) Internal oscillation stopped. System clock 10MHz with frequency variable oscillation frequency division ratio IDDHALT(14) HALT mode FmCF=0Hz (oscillation stopped) IDDHALT(15) FmX'tal=32.768kHz crystal oscillation mode Internal oscillation stopped. System clock 4MHz with IDDHALT(16) frequency variable oscillation frequency division ratio IDDHALT(17) HALT mode FmCF=0Hz (oscillation stopped) IDDHALT(18) FmX'tal=32.768kHz crystal oscillation mode System clock 32.768kHz side Internal oscillation stopped. IDDHALT(19) Frequency variable oscillation stopped. frequency division ratio HOLD mode consumption current Timer HOLD mode consumption current IDDHOLD(1) IDDHOLD(2) IDDHOLD(3) IDDHOLD(4) IDDHOLD(5) IDDHOLD(6) Timer HOLD mode CF1=VDD open (External clock mode) FmX'tal=32.768kHz crystal oscillation mode VDD1 HOLD mode CF1=VDD open (External clock mode) 0.05 0.03 0.02 18.5 0.37 0.13 0.75 0.54 1.15 2.65 Conditions VDD[V] Specification unit
Note 7-1: consumption current value includes none currents that flow into output internal pull-up resistors.
No.A0413-21/26
LC87F75C8A
F-ROM Write Characteristics +10°C +55°C, VSS1 VSS2 VSS3
Parameter Onboard programming current Programming time tFW(1) 128-byte programming Erasing current included Time setting 128-byte data excluded. 22.5 Symbol IDDFW(1) Pin/Rem arks VDD1 Conditions VDD[V] 128-byte programming Erasing current included Specification unit
UART (Full Duplex) Operating Conditions +70°C, VSS1 VSS2 VSS3
Parameter Transfer Symbol Pin/Remarks UTX(P32), URX(P33) Conditions VDD[V] 16/3 Specification 8192/3 unit tCYC
Data length: 7/8/9 bits (LSB first) Stop bits: (2-bit continuous data transmission) Parity bits: None Example 8-bit Data Transmission Mode Processing (Transmit Data=55H)
Start Start transmission Transmit data (LSB first) Stop transmission
Example 8-bit Data Reception Mode Processing (Receive Data=55H)
Stop Receive data (LSB first) reception
Start Start reception
No.A0413-22/26
LC87F75C8A
Characteristics Sample Main System Clock Oscillation Circuit
Given below characteristics sample main system clock oscillation circuit that measured using SANYO-designated oscillation characteristics evaluation board external components with circuit constant values with which oscillator vendor confirmed normal stable oscillation. Table Characteristics Sample Main System Clock Oscillator Circuit with Ceramic Oscillator
Nominal Frequency Vendor Name Circuit Constant Oscillator Name [pF] 12MHz MURATA CSTCE12M0G52-R0 CSTCE8M00G52-R0 CSTLS8M00G53-B0 4MHz MURATA CSTCR4M00G53-R0 CSTLS4M00G53-B0 (10) (10) (15) (15) (15) [pF] (10) (10) (15) (15) (15) Open Open Open Open Open 2.2k 3.3k 3.3k Operating Voltage Range Oscillation Stabilization Time [ms] 0.05 0.05 0.05 0.05 0.05 [ms] 0.15 0.15 0.15 0.15 0.15 Internal Internal Internal Remarks
8MHz
MURATA
oscillation stabilization time refers time interval that required oscillation stabilized after goes above operating voltage lower limit (see Figure
Characteristics Sample Subsystem Clock Oscillator Circuit
Given below characteristics sample subsystem clock oscillation circuit that measured using SANYOdesignated oscillation characteristics evaluation board external components with circuit constant values with which oscillator vendor confirmed normal stable oscillation. Table Characteristics Sample Subsystem Clock Oscillator Circuit with Crystal Oscillator
Nominal Frequency Vendor Name Oscillator Name [pF] 32.768kHz SEIKO EPSON MC-306 Circuit Constant [pF] Open 560k Operating Voltage Range Oscillation Stabilization Time Applicable value= 12.5pF Remarks
oscillation stabilization time refers time interval that required oscillation stabilized after instruction starting subclock oscillation circuit executed time interval that required oscillation stabilized after HOLD mode reset (see Figure Note: components that involved oscillation should placed close another possible because they vulnerable influences circuit pattern.
X'tal
Figure Oscillator Circuit
Figure Oscillator Circuit
0.5VDD
Figure Timing Measurement Point
No.A0413-23/26
LC87F75C8A
Power supply
Operating lower limit Reset time
Internal oscillation tmsCF CF1,
tmsX'tal XT1,
Operating mode
Unpredictable
Reset
Instruction execution
Reset Time Oscillation Stabilization Time
HOLD reset signal
HOLD reset signal absent
HOLD release signal VALID
Internal oscillation tmsCF CF1,
tmsX'tal XT1,
State
HOLD
HALT
HOLD Reset Signal Oscillation Stabilization Time
Figure Oscillation Stabilization Times
No.A0413-24/26
LC87F75C8A
RRES
CRES
Note: Determine value CRES RRES that reset signal present period 200µs after supply voltage goes beyond lower limit IC's operating voltage.
Figure Reset Circuit
SIOCLK:
DATAIN:
DATAOUT:
Data transfer period (SIO0 only)
tSCK tSCKL SIOCLK: tsDI DATAIN: tdDO DATAOUT: Data transfer period (SIO0 only) tSCKL SIOCLK: tsDI DATAIN: tdDO DATAOUT: thDI tSCKHA thDI tSCKH
Figure Serial Waveforms
tPIL
tPIH
Figure Pulse Input Timing Signal Waveform
No.A0413-25/26
LC87F75C8A
ON/OFF (programmable)
RLCD RLCD RLCD RLCD VLCD RLCD RLCD 2/3VLCD RLCD 1/2VLCD RLCD 1/3VLCD RLCD RLCD (VLCD=VDD)
Figure Bias Resistor
Specifications SANYO Semiconductor products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer's products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer's products equipment. SANYO Semiconductor Co., Ltd. strives supply high-quality high-reliability products. However, semiconductor products fail with some probability. possible that these probabilistic failures could give rise accidents events that could endanger human lives, that could give rise smoke fire, that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO Semiconductor products (including technical data,services) described contained herein controlled under applicable local export control laws regulations, such products must exported without obtaining export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written permission SANYO Semiconductor Co., Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO Semiconductor product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO Semiconductor believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties.
This catalog provides information November, 2006. Specifications information herein subject change without notice.
No.A0413-26/26

LC87F75C8A CMOS FROM 128K byte, 4096 byte on-chip 8-bit 1-ch

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