1.8V-3.3V PicoPLL World's Smallest Programmable Clock Lowest-powe

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1.8V-3.3V PicoPLL World's Smallest Programmable Clock Lowest-powe

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PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
Lowest-power, smallest Programmable Very Jitter Phase Noise Output Frequency 133MHz 1.8V operation 166MHz 2.5V operation 200MHz 3.3V operation Input Frequency: Fundamental Crystal: 10MHz 50MHz Reference Clock: 1MHz 200MHz Accepts >0.1V reference signal input voltage configured Output Enable (OE), Frequency switching (FSEL), Power Down (PDB) input, CLK1 output. <10µA current consumption with active. Single 1.8V 3.3V, power supply Operating temperature range from -40C Available 6-pin DFN, SOT23, SC70 GREEN/RoHS compliant packages.
DESCRIPTION
PL611s-02 low-power, small form factor, high performance OTP-base programmable frequency synthesizer member PhaseLink's PicoPLL Factory Programmable `Quick Turn Clocks. Designed small DFN, SC70, SOT23 package broad range applications, PL611s-02 offers best phase noise jitter performance, power consumption rivals. addition, programmable configured Output Enable (OE), Frequency switching (FSEL), Power Down (PDB) input, CLK1 output. power down feature PL611s-02, when activated, allows consume less than 10µA power, while programming flexibility allows generating output, 200MHz using low-cost crystal reference input.
PACKAGE CONFIGURATION
XIN/FIN PDB, FSEL, CLK1 XOUT CLK0 PDB, FSEL, CLK1 XIN/FIN
611s-02
CLK0 XOUT
PDB, FSEL, CLK1 XIN/FIN
PL611s-02
CLK0 XOUT
PL611s-02
DFN-6L
(2.0mmx1.3mmx0.6mm)
SC70-6L
(2.3mmx2.25mmx1.0mm)
SOT23-6L
(3.0mmx3.0mmx1.35mm)
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page
PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
PROGRAMMING PARAMETERS
Output Frequency Where CLK0 (2*P) CLK1 CLK0 CLK0/2 Output Drive Strength Three optional drive strengths choose from: Low: Std: (default) High: 16mA Programmable Input/Output output configured input input FSEL input CLK1 output
PACKAGE ASSIGNMENT
Name Assignment SOT23 SC70 Pin# Pin# Type Description
This programmable configured Output Enable (OE) input, Power Down input (PDB), On-the-Fly Frequency Switching Selector (FSEL), CLK1 clock output This internal pull resistor FSEL. State FSEL (default) XIN, XOUT CLK0 Tri-State Normal mode Power Down Mode Normal mode Frequency Frequency
PDB, FSEL, CLK1
connection Crystal Reference Clock input Crystal Output Connect (DNC when present connection Programmable Clock Output
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page
PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
FUNCTIONAL DESCRIPTION
PL611s-02 highly featured, very flexible, advanced programmable design high performance, lowpower, small form-factor applications. PL611s-02 accepts fundamental input crystal 10MHz 50MHz reference clock input 1MHz 200MHz capable producing outputs 200MHz. This flexible design allows PL611s-02 deliver generated frequency, (Crystal Clk) frequency /(2*P) CLK0 and/or CLK1. Some design features PL611s-02 mentioned below: Programming PL611s-02 fully programmable. equipped with 8-bit input frequency divider (R-Counter), 11-bit frequency feedback loop divider (M-Counter). output transferred 5-bit post divider (PCounter). output frequency determined following formula Clock Output (CLK0) CLK0 main clock output. output CLK0 configured output /(2*P)), (Crystal Clk) output, /(2*P) output. output drive level programmed Drive (4mA), Standard Drive (8mA) High Drive (16mA). maximum output frequency determined Power Supply Voltage; 200MHz 3.3V, 166MHz 2.5V 133MHz 1.8V. Clock Output (CLK1) CLK1 feature allows PL611s-02 have additional clock output programmed following: Reference (Crystal Clk) Frequency CLK0 CLK0 Output Enable (OE) Output Enable feature allows user enable disable clock output(s) toggling pin. incorporates pull resistor giving default condition logic "1". Power-Down Control (PDB) Power Down (PDB) feature allows user PL611s-02 into "Sleep Mode". When activated (logic `0'), `Disables PLL, oscillator circuitry, counters, other active circuitry. Power Down mode consumes <10µA power. incorporates pull resistor giving default condition logic "1". Frequency Select (FSEL) Frequency Select (FSEL) feature allows PL611s-02 switch between pre-programmed outputs allowing device Fly" frequency switching. FSEL incorporates pull resistor giving default condition logic "1".
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page
PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS PARAMETERS
Supply Voltage Range Input Voltage Range Output Voltage Range Soldering Temperature (Green package) Data Retention Storage Temperature Ambient Operating Temperature*
SYMBOL
MIN.
-0.5 -0.5 -0.5
MAX.
+0.5 +0.5
UNITS
Year
Exposure device under conditions beyond limits specified Maximum Ratings extended periods cause permanent damage device affect product reliability. These conditions represent stress rating only, functional operations device these other conditions above operational limits noted this specification implied. *Operating temperature guaranteed design. Parts tested commercial grade only.
SPECIFICATIONS
PARAMETERS
Crystal Input Frequency (XIN)
CONDITIONS
Fundamental Crystal =3.3V
MIN.
TYP.
MAX.
UNITS
Input (FIN) Frequency
=2.5V =1.8V
Input (FIN) Signal Amplitude Input (FIN) Signal Amplitude
Internally coupled (High Frequency) Internally coupled (Low Frequency) 3.3V <50MHz, 2.5V <40MHz, 1.8V <15MHz =3.3V =2.5V =1.8V
Output Frequency
Settling Time Output Enable Time Sensitivity Output Rise Time Output Fall Time Duty Cycle
power-up (after increases over 1.62V) Function; 15pF Load Function; 15pF Load Frequency +/-10% 15pF Load, 10/90% VDD, High Drive, 3.3V 15pF Load, 90/10% VDD, High Drive, 3.3V Enabled,
Period Jitter, Pk-to-Pk* With capacitive decoupling between (measured from 10,000 samples) GND. Note: Jitter performance depends programming parameters.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page
PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
SPECIFICATIONS
PARAMETERS
Supply Current, Dynamic, with Loaded CMOS Outputs Supply Current, Dynamic, with Loaded CMOS Outputs Supply Current, Dynamic with Loaded CMOS Outputs Off: Supply Current, Dynamic, with Loaded CMOS Output Off: Supply Current, Dynamic, with Loaded CMOS Output Off: Supply Current, Dynamic with Loaded CMOS Output Supply Current, Dynamic, with Loaded Outputs Operating Voltage Output Voltage Output High Voltage Output Current, Drive Output Current, Standard Drive Output Current, High Drive
SYMBOL
CONDITIONS
=3.3V,30MHz, load=15pF =2.5V,30MHz, load=15pF =1.8V,30MHz, load=15pF =3.3V,30MHz, load=15pF =2.5V,30MHz, load=15pF =1.8V,30MHz, load=5pF When PDB=0
MIN.
TYP.
6.0* 3.9* 2.1* 2.0* 1.6* 0.8*
MAX.
UNITS
1.62 3.63
+4mA Standard Drive -4mA Standard Drive 0.4V, 2.4V 0.4V, 2.4V 0.4V, 2.4V
Note: Please contact PhaseLink, super low-power required.
CRYSTAL SPECIFICATIONS
PARAMETERS
Fundamental Crystal Resonator Frequency Crystal Loading Rating (The programmed value this range.) Maximum Sustainable Drive Level Operating Drive Level Metal Crystal Shunt Capacitance Shunt Capacitance
SYMBOL
(xtal)
MIN.
TYP.
MAX.
UNITS
Small Crystal
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page
PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
LAYOUT RECOMMENDATIONS
following guidelines assist with performance optimized design: Keep traces PL611s-02 short possible, well keeping other traces away from possible. Place 0.01µF~0.1µF decoupling capacitor between GND, component side PCB, close pin. recommended place this component backside PCB. Going through vias will reduce signal integrity, causing additional jitter phase noise. highly recommended keep traces short possible. When connecting long traces inch) CMOS output, important design traces transmission line `stripline', avoid reflections ringing. this case, CMOS output needs matched trace impedance. Usually `striplines' designed impedance CMOS outputs usually have lower than impedance matching achieved adding resistor series with CMOS output `stripline' trace. Please contact PhaseLink additional information design outputs driving long traces Gerber files PL611s-02 eval board shown.
DFN-6L Evaluation Board
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page
PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT)
SOT23-6 Symbol SC70-6L Symbol DFN-6L
Dimension Min. Max. 1.05 1.35 0.05 0.15 1.00 1.20 0.30 0.50 0.08 0.20 2.80 3.00 1.50 1.70 2.60 0.35 0.55 0.95
Pin1
Dimension Min. Max. 0.80 1.00 0.00 0.09 0.80 0.91 0.15 0.30 0.08 0.25 1.85 2.25 1.15 1.35 2.00 2.30 0.21 0.41 0.65BSC
Pin1
Symbol
Dimension Min. Max. 0.50 0.60 0.00 0.05 0.152 0.152 0.15 0.25 0.40BSC 1.25 1.35 1.95 2.05 0.75 0.85 0.95 1.05 0.20 0.30
Chamfer
Pin1
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page
PL611s-02
1.8V-3.3V PicoPLL World's Smallest Programmable Clock
ORDERING INFORMATION (GREEN PACKAGE COMPLIANT)
part ordering, please contact Sales Department: 47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
order number this device combination following: Part number, Package type Operating temperature range
PL611s-02-XXX
PART NUMBER DIGIT Code (will assigned programming time) PACKAGE TYPE G=DFN-6L U=SC70-6L T=SOT23-6L NONE= TUBE R=TAPE REEL TEMPERATURE C=COMMERCIAL (0°C 70°C) INDUSTRIAL (-40°C 85°C)
PhaseLink will assign unique 3-digit code each approved programmed part number.
Part/Order Number
PL611s-02-XXXGC-R PL611s-02-XXXUC-R PL611s-02-XXXTC-R
Marking
02XXX
Package Option
6-Pin (Tape Reel) 6-Pin SC70 (Tape Reel) 6-Pin SOT23 (Tape Reel)
Note: `XXX' designates marking identifier that, times, could independent part number. Please consult your PhaseLink sales representative marking information.
PhaseLink Corporation, reserves right make changes products specifications, both time without notice. information furnished Phaselink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from relian upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
Solder reflow profile available
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 9/25/07 Page

1.8V-3.3V PicoPLL World's Smallest Programmable Clock Lowest-powe

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