Spread-Compatible 3.3V Zero Delay Buffer Zero input-output propag

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Spread-Compatible 3.3V Zero Delay Buffer Zero input-output propag

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PL123S-08
Spread-Compatible 3.3V Zero Delay Buffer
Zero input-output propagation delay, adjustable capacitive load input Multiple configurations, "Available Configurations" table Multiple low-skew outputs banks four outputs, three-stateable select inputs operating range cycle-to-cycle jitter TSSOP packages 3.3V operation Commercial industrial temperature available Spread-compatible with spread-spectrum input clock modulation
DESCRIPTION
PL123S-08 PLL-based zero-delay buffer family, used distribute eight outputs. Select inputs control state output banks. external feedback enables removing delay from external components. also provides adjustable inputto-output delay varying loading relative output loading. Various options available multiply input frequency 0.5, (see Available Configuration table details). Standard High drive strengths also ordered. special case when S2:S1 1:0, bypassed output from maximum frequency, thus behaving like (non-zero delay) fan-out buffer. These parts intended input-tolerant applications.
BLOCK DIAGRAM
Extra Divider (-083)
CLKA1 CLKA2 CLKA3 CLKA4
Bank
CLKA1 CLKA2 CLKB1 CLKB2
CLKA4 CLKA3 CLKB4 CLKB3
PL123S-08
Extra Divider (-082, -083)
CLKB1 CLKB2 CLKB3 CLKB4
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
Bank
Selector Decoding
PL123S-08
Spread-Compatible 3.3V Zero Delay Buffer
DESCRIPTION
Name REF[1] CLKA1[2] CLKA2[2] CLKB1[2] CLKB2[2] S2[3] S1[3] CLKB3[2] CLKB4[2] CLKA3[2] CLKA4[2] Type Input reference frequency Clock output, Bank Clock output, Bank 3.3V supply Ground Clock output, Bank Clock output, Bank Select input, Select input, Clock output, Bank Clock output, Bank Ground 3.3V supply Clock output, Bank Clock output, Bank feedback input Description
SELECT INPUT DECODING
A1-A4 Three-State Driven Driven[4] Driven B1-B4 Three-State Three-State Driven[4] Driven Output Source Reference Shutdown
AVAILABLE CONFIGURATIONS
Device PL123S-08 PL123S-08H PL123S-082 PL123S-082 PL123S-083 PL123S-083 Feedback From Bank Bank Bank Bank Bank Bank Bank Bank Bank Frequency Reference Reference Reference Reference Reference Reference Bank Frequency Reference Reference Reference Reference Reference Inverted Reference Reference
Notes: Weak pull-down. Weak pull-down outputs. Weak pull-up these inputs. Outputs inverted PL123S-082 -083 bypass mode (S2=1, S1=0). Output phase indeterminant 180° from input clock). phase integrity required, PL123S-082.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
Spread-Compatible 3.3V Zero Delay Buffer
ZERO-DELAY SKEW CONTROL
PLL's feedback path must closed connecting available eight outputs. output driving will drive (internal) output load plus additional loading placed this output pin. zero-delay applications, outputs, including connected output pin, must loaded equally. Varying loading between output pins adjust input-to-output delay.
SPREAD COMPATIBLE
Many products today utilize spread-spectrum modulation clocking reduce electromagnetic interference (EMI) pass regulations. This product designed pass spread-spectrum input clock modulation frequencies output. When buffer designed pass spread spectrum, there will exist significant tracking jitter between input output clocks, which result problems with system timing synchronization.
MAXIMUM RATINGS
Supply Voltage Ground Potential.-0.5V 4.6V Input Voltage (Except REF).-0.5V VDD+0.5V Input Voltage REF.-0.5V 4.6V Storage Temperature.-65 Junction Temperature.150 Static Discharge Voltage (MIL-STD-883, Method 3015).>
OPERATING CONDITIONS
Parameter Description Supply Voltage Commercial Operating Temperature (ambient temperature) Industrial Operating Temperature (ambient temperature) Load Capacitance, below Load Capacitance, above Input Capacitance Power-up time VDDs reach minimum specified voltage (power ramps must monotonic) Min. 0.05 Max. Unit
Notes: Applies both clock inputs.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
3.3V Zero Delay Buffer
LAYOUT RECOMMENDATIONS
following guidelines assist with performance optimized design: Signal Integrity Termination Considerations Keep traces short Trace Inductor. With capacitive load, equals ringing Long trace Transmission Line. Without proper termination this will cause reflections (causing ringing). Design long traces "striplines" "microstrips" with defined impedance. Terminate traces with characteristic impedance trace avoid reflections (see figure below). Decoupling Power Supply Considerations Place decoupling capacitors close possible pin(s) bypass noise from power supply Multiple pins should decoupled separately best performance. Value decoupling capacitor frequency dependant. Typical values 0.1F designs supporting frequencies below 50MHz (0.01F designs supporting frequencies above 50MHz).
Typical CMOS termination Place Series Resistor close possible CMOS output
CMOS Output Buffer Typical buffer impedance line CMOS Input
Series Resistor Adjust value match output buffer impedance trace. Typical value
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
Max. 50.0 100.0 12.0 25.0 45.0 70.0 (-08H) 32.0 18.0 35.0 20.0 Unit
3.3V Zero Delay Buffer
ELECTRICAL HARACTERISTICS
Parameter mode) Description Input Voltage Input HIGH Voltage Input Current Input HIGH Current Output Voltage[7] Output HIGH Voltage[7] Power Down Supply Current (-08, -082, -083) (-08H) (-08, -082, -083) (-08H) MHz, Commercial Temp. MHz, Industrial Temp. 100-MHz Select inputs 66-MHz (-08, -082, -083), Commercial 33-MHz (-08, -082, -083), Commercial 66-MHz (-08, -082, -083), Industrial Temp. 33-MHz (-08, -082, -083), Industrial Temp. Test Conditions Min.
Supply Current (Unloaded Outputs)
Notes: Parameter guaranteed design characterization. 100% tested production.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
3.3V Zero Delay Buffer
SWITCHING CHARACTERISTICS
PaName rameter Output Frequency Output Frequency Output Frequency Duty Cycle Duty Cycle
Test Conditions 30-pF load, devices 20-pF load, -08H devices 15-pF load, -08, -082, -083 devices Measured 1.4V, FOUT 66.66 30-pF load Measured 1.4V, FOUT <50.0 15-pF load Measured between 0.8V 2.0V, 30-pF load Commercial Temperature Measured between 0.8V 2.0V, 30-pF load Industrial Temperature Measured between 0.8V 2.0V, 15-pF load Measured between 0.8V 2.0V, 30-pF load
Min. -250
Typ.
Max. 2.20 2.50 1.50 1.50 2.20 2.50 1.50 1.25
Unit V/ns
Rise Time (-08, -082, -083)
Rise Time (-08H)
Measured between 0.8V 2.0V, 30-pF load Commercial Temperature (-08, -082, -083) Measured between 0.8V 2.0V, 30-pF load Fall Time Industrial Temperature Measured between 0.8V 2.0V, 15-pF load Fall Time (-08H) Output Output Skew same Bank (-08) Output Output Skew same Bank (-08H, -082, -083) Output Bank Output Bank Skew (-08,-082,-083) Output Bank Output Bank Skew (-08H) Delay, Rising Edge Rising Edge Device Device Skew
Measured between 0.8V 2.0V, 30-pF load outputs equally loaded outputs equally loaded outputs equally loaded outputs equally loaded Measured VDD/2 Measured VDD/2 pins devices Measured between 0.8V 2.0V -08H device using Test Circuit 66.67 MHz, loaded outputs, 15-pF load 133.3 MHz, loaded outputs, 15-pF load 66.67 MHz, loaded outputs 30-pF load 66.67 MHz, loaded outputs 15-pF load 66.67 MHz, loaded outputs 15-pF load, load Stable power supply, valid clocks presented pins
tLOCK
Output Slew Rate Cycle Cycle Jitter (-08, -08H) Cycle Cycle Jitter (-082) Cycle Cycle Jitter (-083) Lock Time
Notes: parameters specified with loaded outputs.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
3.3V Zero Delay Buffer
SWITCHING WAVEFORMS
Duty Cycle Timing
1.4V
1.4V
Outputs Rise/Fall Time OUTPUT Output-Output Skew OUTPUT
2.0V 0.8V
2.0V 0.8V
3.3V
1.4V
OUTPUT
1.4V
Input-Output Propagation Delay OUTPUT VDD/2
VDD/2
Device-Device Skew FBK, Device VDD/2
FBK, Device
VDD/2
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
3.3V Zero Delay Buffer
TEST CIRCUITS
Test Circuit
Test Circuit
OUTPUTS
OUTPUTS
LOAD
PACKAGE DRAWINGS
Narrow SOP, TSSOP
Symbol Min. 1.35 0.10 0.33 0.19 9.80 3.80 5.80 0.40 1.27 Max. 1.75 0.25 0.51 0.25 10.00 4.00 6.20 1.27 0.45 Min. 0.05 0.19 0.09 4.90 4.30 TSSOP Max. 1.20 0.15 0.30 0.20 5.10 4.50 6.40 0.75 0.65
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
3.3V Zero Delay Buffer
ORDERING INFORMATION
part ordering, please contact Sales Department: 47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER order number this device combination following: Part number, Package type Operating temperature range
Part/Order Number PL123S-08HOC PL123S-08HOC-R PL123S-08SC PL123S-08SC-R PL123S-08HSC PL123S-08HSC-R PL123S-082SC PL123S-082SC-R PL123S-083SC PL123S-083SC-R
Marking
Package Option
Operating Range Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial
Green (Lead-Free) Package P123S-08H 16-Pin TSSOP Tube P123S-08H 16-Pin TSSOP (Tape Reel) P123S-08 16-Pin Tube P123S-08 16-Pin (Tape Reel) P123S-08H 16-Pin Tube P123S-08H 16-Pin (Tape Reel) P123S-082 16-Pin Tube P123S-082 16-Pin (Tape Reel) P123S-083 16-Pin Tube P123S-083 16-Pin (Tape Reel) Continued next page
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123S-08
3.3V Zero Delay Buffer
(Continued) PART NUMBER Part/Order Number PL123S-08HOCA PL123S-08HOCA-R PL123S-08SCA PL123S-08SCA-R PL123S-08HSCA PL123S-08HSCA-R PL123S-082SCA PL123S-082SCA-R PL123S-083SCA PL123S-083SCA-R PL123S-08SIA PL123S-08SIA-R PL123S-08HSIA PL123S-08HSIA-R PL123S-082SIA PL123S-082SIA-R PL123S-083SIA PL123S-083SIA-R Marking P123S-08H P123S-08H P123S-08 P123S-08 P123S-08H P123S-08H P123S-082 P123S-082 P123S-083 P123S-083 P123S-08 P123S-08 P123S-08H P123S-08H P123S-082 P123S-082 P123S-083 P123S-083 Package Option Green Package 16-Pin TSSOP Tube 16-Pin TSSOP (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) 16-Pin Tube 16-Pin (Tape Reel) Operating Range Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial Industrial Industrial Industrial Industrial
PhaseLink Corporation, reserves right make changes products specifications, both time without notice. information furnished Phaselink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
Solder reflow profile available
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page

Spread-Compatible 3.3V Zero Delay Buffer Zero input-output propag

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