2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer Zero in
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PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
Zero input-output propagation delay, adjustable capacitive load input maximum operating range Multiple low-skew outputs output-output skew input drives eight outputs, grouped banks four outputs, three-stateable select inputs cycle-to-cycle jitter period jitter Standard high drive strength options TSSOP packages 2.5V 3.3V operation Commercial industrial temperature available
DESCRIPTION
PL123E-08 PLL-based zero-delay buffer family, used distribute eight outputs. Select inputs control state output banks. external feedback enables removing delay from external components. also provides adjustable inputto-output delay varying loading relative output loading. Various options available multiply input frequency 0.5, (see Available Configuration table details). Standard High drive strengths also ordered. special case when S2:S1 1:0, bypassed output from maximum frequency, thus behaving like (non-zero delay) fan-out buffer. These parts intended input-tolerant applications.
BLOCK DIAGRAM
Extra Divider (-083)
CLKA1 CLKA2 CLKA3 CLKA4
Bank
CLKA1 CLKA2 CLKB1 CLKB2
CLKA4 CLKA3 CLKB4 CLKB3
PL123E-08
Extra Divider (-082, -083)
CLKB1 CLKB2 CLKB3 CLKB4
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Bank
Selector Decoding
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
DESCRIPTION
Name REF[1] CLKA1[2] CLKA2[2] CLKB1[2] CLKB2[2] S2[3] S1[3] CLKB3[2] CLKB4[2] CLKA3[2] CLKA4[2] Type Input reference frequency Clock output, Bank Clock output, Bank 3.3V 2.5V) supply Ground Clock output, Bank Clock output, Bank Select input, Select input, Clock output, Bank Clock output, Bank Ground 3.3V 2.5V) supply Clock output, Bank Clock output, Bank feedback input Description
SELECT INPUT DECODING
A1-A4 Three-State Driven Driven[4] Driven B1-B4 Three-State Three-State Driven[4] Driven Output Source Reference Shutdown
AVAILABLE CONFIGURATIONS
Device PL123E-08 PL123E-08H PL123E-082 PL123E-082 PL123E-083 PL123E-083 Feedback From Bank Bank Bank Bank Bank Bank Bank Bank Bank Frequency Reference Reference Reference Reference Reference Reference Bank Frequency Reference Reference Reference Reference Reference Inverted Reference Reference
Notes: Weak pull-down. Weak pull-down outputs. Weak pull-up these inputs. Outputs inverted PL123E-082 -083 bypass mode (S2=1, S1=0). Output phase indeterminant 180° from input clock). phase integrity required, PL123E-082.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
ZERO-DELAY SKEW CONTROL
PLL's feedback path must closed connecting available eight outputs. output driving will drive (internal) output load plus additional loading placed this output pin. zero-delay applications, outputs, including connected output pin, must loaded equally. Varying loading between output pins adjust input-to-output delay.
LAYOUT RECOMMENDATIONS
following guidelines assist with performance optimized design: Signal Integrity Termination Considerations Keep traces short Trace Inductor. With capacitive load, equals ringing Long trace Transmission Line. Without proper termination this will cause reflections (causing ringing). Design long traces "striplines" "microstrips" with defined impedance. Terminate traces with characteristic impedance trace avoid reflections (see figure below). Decoupling Power Supply Considerations Place decoupling capacitors close possible pin(s) bypass noise from power supply Multiple pins should decoupled separately best performance. Value decoupling capacitor frequency dependant. Typical values 0.1F designs supporting frequencies below 50MHz (0.01F designs supporting frequencies above 50MHz).
Typical CMOS termination Place Series Resistor close possible CMOS output
CMOS Output Buffer (Typical buffer impedance line CMOS Input
Series Resistor Adjust value match output buffer impedance trace. Typical value
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
ABSOLUTE MAXIMUM CONDITIONS
Supply Voltage Ground Potential -0.5V 4.6V Input Voltage 0.5V 4.6V Storage Temperature -65°C 150°C Junction Temperature 150°C Static Discharge Voltage (per MIL-STD-883, Method 3015).> 2000V
OPERATING CONDITIONS
Description Supply Voltage, 3.3V Supplies Supply Voltage, 2.5V Supplies Operating Temperature (ambient)-Commercial Operating Temperature (ambient)-Industrial Load Capacitance, <100 MHz, 3.3V Supplies Load Capacitance, <100 MHz, 2.5V Supplies with High Drive Load Capacitance, <133.3 MHz, 3.3V Supplies Load Capacitance, <133.3 MHz, 2.5V Supplies, High Drive Load Capacitance, <133.3 MHz, 2.5V Supplies, Drive Load Capacitance, >133.3 MHz, 3.3V Supplies Load Capacitance, >133.3 MHz, 2.5V Supplies, High Drive Input Capacitance Closed-loop bandwidth (typical), 3.3V Supplies Closed-loop bandwidth (typical), 2.5V Supplies Output Impedance (typical), 3.3V Supplies with High Drive Output Impedance (typical), 3.3V Supplies, Standard Drive Output Impedance (typical), 2.5V Supplies, High Drive Output Impedance (typical), 2.5V Supplies, Standard Drive Power-up time reach minimum specified voltage (power ramps must monotonic) Dissipation, Junction Ambient, 16-pin Dissipation, Junction Ambient, 16-pin TSSOP Dissipation, Junction Case, 16-pin Dissipation, Junction Case, 16-pin TSSOP Theta Theta Theta Theta 0.01
Parameter
Unit
°C/W °C/W °C/W °C/W
Notes: Applies Test Circuit Applies both Clock input. Theta JEDEC test board conditions, 2S2P; Theta Mil-Spec 883E Method 1012.1.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
3.3V ELECTRICAL SPECIFICATIONS
Description Supply Voltage Input Voltage Input HIGH Voltage Input Leakage Current Input HIGH Current Output Voltage Output HIGH Voltage Power Down Supply Current Supply Current Parameter mode) (Standard Drive) (High Drive) (Standard Drive) (High Drive) (Commercial) (Industrial) Unloaded outputs, 66-MHz Test Conditions Unit
2.5V ELECTRICAL SPECIFICATIONS
Description Supply Voltage Input Voltage Input HIGH Voltage Input Leakage Current Input HIGH Current Output Voltage Output HIGH Voltage Power Down Supply Current Supply Current Parameter mode) (Standard Drive) (High Drive) (Standard Drive) (High Drive) (Commercial) (Industrial) Unloaded outputs, 66-MHz Test Conditions Unit
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
3.3V 2.5V ELECTRICAL SPECIFICATIONS
Description Maximum Frequency (Input/Output) Parameter Test Conditions 3.3V Supplies, High Drive 3.3V Supplies, Standard Drive 2.5V Supplies, High Drive 2.5V Supplies, Standard Drive Input Duty Cycle Output Duty Cycle [10] <133.3 >133.3 <133.3 >133.3 Standard Drive, <100 Standard Drive, <133.3 Rise, Fall Time (3.3V Supplies) [10] Standard Drive, <167 High Drive, <100 High Drive, <133.3 High Drive, >133.3 Standard Drive, <133.33 Rise, Fall Time (2.5V Supplies) [10] High Drive, <100 High Drive, <133.3 High Drive, >133.3 outputs equally loaded, 3.3V supplies, 2.5V supplies with standard drive outputs equally loaded, 2.5V supplies with high drive Bypass mode (S2:S1=1:0) enabled 3.3V enabled 2.5V Measured pins devices. 3.3V supplies. Measured pins devices. 2.5V supplies. Stable power supply, valid clocks presented pins -100 -200 ±150 ±300 Unit
Output Output Skew
[10]
Delay, Rising Edge Rising Edge [10]
Part Part Skew [10]
Lock Time [10]
LOCK
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PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
3.3V 2.5V ELECTRICAL SPECIFICATIONS (continued)
Description Parameter Test Conditions 3.3V Supplies, MHz, 3.3V Supplies, MHz, Drive 3.3V Supplies, MHz, High Drive 2.5V Supplies, MHz, Drive Cycle-to-Cycle Jit2.5V Supplies, MHz, High Drive ter, Peak [10,11] 2.5V Supplies, MHz, High Drive (-08, -08H) S2:S1 1:0, 3.3V, <15pF, Standard Drive S2:S1 1:0, 3.3V, <15pF, High Drive S2:S1 1:0, 2.5V, <15pF, Standard Drive S2:S1 1:0, 2.5V, <15pF, High Drive 3.3V Supplies, MHz, Cycle-to-Cycle Jit2.5V Supplies, MHz, ter, Peak [10,11] S2:S1 1:0, 3.3V, Standard Drive (-082, -083) S2:S1 1:0, 2.5V, Standard Drive 3.3V Supplies, 66-100 MHz, 3.3V Supplies, >100 MHz, 3.3V Supplies, MHz, Drive 3.3V Supplies, MHz, High Drive 2.5V Supplies, MHz, Drive Period Jitter, Peak (-08, -08H) [10,11] 2.5V Supplies, 66-100 MHz, High Drive 2.5V Supplies, >100 MHz, High Drive S2:S1 1:0, 3.3V, <15pF, Standard Drive S2:S1 1:0, 3.3V, <15pF, High Drive S2:S1 1:0, 2.5V, <15pF, Standard Drive S2:S1 1:0, 2.5V, <15pF, High Drive 3.3V Supplies, MHz, 2.5V Supplies, MHz, Period Jitter, Peak [10,11] (-082, -083) S2:S1 1:0, 3.3V, Standard Drive S2:S1 1:0, 2.5V, Standard Drive Unit
Notes: given maximum loading conditions. Operating Conditions Table. Parameter guaranteed design characterization. 100% tested production. Typical jitter measured 3.3V 2.5V, 29°C, with outputs driven into maximum specified load.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
SWITCHING WAVEFORMS
Duty Cycle Timing
VDD/2
VDD/2
Outputs Rise/Fall Time
OUTPUT
2.0V(1.8V)
2.0V(1.8V) 0.8V(0.6V)
3.3V (2.5V)
0.8V(0.6V) Output-Output Skew OUTPUT VDD/2
OUTPUT
VDD/2
Input-Output Propagation Delay INPUT VDD/2
VDD/2
Device-Device Skew FBK, Device VDD/2
FBK, Device
VDD/2
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PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
TEST CIRCUITS
Test Circuit
OUTPUTS
LOAD
PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT)
Narrow SOP, TSSOP
Symbol Min. 1.35 0.10 0.33 0.19 9.80 3.80 5.80 0.40 1.27 Max. 1.75 0.25 0.51 0.25 10.00 4.00 6.20 1.27 0.45 Min. 0.05 0.19 0.09 4.90 4.30 TSSOP Max. 1.20 0.15 0.30 0.20 5.10 4.50 6.40 0.75 0.65
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
ORDERING INFORMATION (GREEN PACKAGE COMPLIANT)
part ordering, please contact Sales Department: 47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER order number this device combination following: Part number, Package type Operating temperature range
Part/Order Number PL123E-08HOC PL123E-08HOC-R PL123E-08SC PL123E-08SC-R PL123E-08HSC PL123E-08HSC-R PL123E-082SC PL123E-082SC-R PL123E-083SC PL123E-083SC-R
Marking P123E-08H P123E-08H P123E-08 P123E-08 P123E-08H P123E-08H P123E-082 P123E-082 P123E-083 P123E-083 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin
Package Option TSSOP Tube TSSOP (Tape Reel) Tube (Tape Reel) Tube (Tape Reel) Tube (Tape Reel) Tube (Tape Reel)
Operating Range Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial
Continued next page
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-08
2.5V 3.3V, 10-220 MHz, Jitter, 8-Output Zero Delay Buffer
ORDERING INFORMATION (GREEN PACKAGE COMPLIANT) (continued)
(continued) PART NUMBER
Part/Order Number PL123E-08HOI PL123E-08HOI-R PL123E-08SI PL123E-08SI-R PL123E-08HSI PL123E-08HSI-R PL123E-082SI PL123E-082SI-R PL123E-083SI PL123E-083SI-R
Marking P123E-08H P123E-08H P123E-08 P123E-08 P123E-08H P123E-08H P123E-082 P123E-082 P123E-083 P123E-083 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin
Package Option TSSOP Tube TSSOP (Tape Reel) Tube (Tape Reel) Tube (Tape Reel) Tube (Tape Reel) Tube (Tape Reel)
Operating Range Industrial Industrial Industrial Industrial Industrial Industrial Industrial Industrial Industrial Industrial
PhaseLink Corporation reserves right make changes products specifications, both time without notice. information furnished Phaselink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
Solder reflow profile available
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
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