2.5V 3.3V, 10-220 MHz, Jitter, 4-Output Zero Delay Buffer Zero in

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2.5V 3.3V, 10-220 MHz, Jitter, 4-Output Zero Delay Buffer Zero in

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PL123E-04
2.5V 3.3V, 10-220 MHz, Jitter, 4-Output Zero Delay Buffer
Zero input-output propagation delay, adjustable capacitive load input Multiple configurations, "Available Configurations" table Multiple low-skew outputs operating range cycle-to-cycle jitter package 2.5V 3.3V operation Commercial industrial temperature available
DESCRIPTION
PL123E-04 PLL-based zero-delay buffer, used distribute four outputs. external feedback enables removing delay from external components. also provides adjustable input-to-output delay varying loading relative output loading. PL123E-042 option allows user obtain x0.5 frequencies output bank. exact multiplier depends which output connected pin. Refer Available Configurations table below more details. These parts intended input-tolerant applications.
BLOCK DIAGRAM
Extra Divider (-042)
CLKA1 CLKA2
CLKA1 CLKA2
View
CLKB2 CLKB1
PL123E-04
CLKB1 CLKB2
AVAILABLE CONFIGURATIONS
Device PL123E-04 PL123E-042 PL123E-042 Feedback From Bank Bank Bank Bank Bank Frequency Reference Reference Reference Bank Frequency Reference Reference Reference
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
2.5V 3.3V, 10-220 MHz, Jitter, 4-Output Zero Delay Buffer
DESCRIPTION
Name REF[1] CLKA1[2] CLKA2[2] CLKB1[2] CLKB2[2] Type Description Input reference frequency Clock output, Bank Clock output, Bank Ground Clock output, Bank Clock output, Bank 3.3V 2.5V Supply feedback input
Notes: Weak pull-down. Weak pull-down outputs.
ZERO-DELAY SKEW CONTROL
PLL's feedback path must closed connecting available four outputs. output driving will drive (internal) load plus additional loading placed this output pin. zero-delay applications, outputs, including connected output pin, must loaded equally. Varying loading between output pins adjust input-to-output delay.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
LAYOUT RECOMMENDATIONS following guidelines assist optimizing design: Signal Integrity Termination Considerations Keep traces short Trace Inductor. Adding capacitive load cause ringing. Long trace Transmission Line. Without proper termination this will cause reflections (causing ringing). Design long traces "striplines" "microstrips" with defined impedance. Terminate traces with characteristic impedance trace avoid reflections (see figure below). Decoupling Power Supply Considerations Place decoupling capacitors close possible pin(s) bypass noise from power supply Multiple pins should decoupled separately best performance. Value decoupling capacitor frequency dependant. Typical values 0.1F designs supporting frequencies below 50MHz (0.01F designs supporting frequencies above 50MHz).
Typical CMOS termination Place Series Resistor close possible CMOS output
CMOS Output Buffer (Typical buffer impedance line CMOS Input
Series Resistor Adjust value match output buffer impedance trace. Typical value
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
ABSOLUTE MAXIMUM CONDITIONS
Supply Voltage Ground Potential -0.5V 4.6V Input Voltage 0.5V 4.6V Storage Temperature -65°C 150°C Junction Temperature 150°C Static Discharge Voltage (per MIL-STD-883, Method 3015).> 2000V
OPERATING CONDITIONS
Description Supply Voltage, 3.3V Supplies Supply Voltage, 2.5V Supplies Operating Temperature (ambient)-Commercial Operating Temperature (ambient)-Industrial Load Capacitance, <100 MHz, 3.3V Supplies Load Capacitance, <133.3 MHz, 3.3V Supplies Load Capacitance, <133.3 MHz, 2.5V Supplies Load Capacitance, >133.3 MHz, 3.3V Supplies Input Capacitance Closed-loop bandwidth (typical), 3.3V Supplies Closed-loop bandwidth (typical), 2.5V Supplies Output Impedance (typical), 3.3V Supplies Output Impedance (typical), 2.5V Supplies Power-up time reach minimum specified voltage (power ramps must monotonic) Dissipation, Junction Ambient, 16-pin Dissipation, Junction Case, 16-pin Theta Theta 0.01 Parameter Unit °C/W °C/W
Notes: Applies Test Circuit Applies both Clock input. Theta JEDEC test board conditions, 2S2P; Theta Mil-Spec 883E Method 1012.1.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
3.3V ELECTRICAL SPECIFICATIONS
Description Supply Voltage Input Voltage Input HIGH Voltage Input Leakage Current Input HIGH Current Output Voltage Output HIGH Voltage Power Down Supply Current Supply Current Parameter mode) (Commercial) (Industrial) Unloaded outputs, 66-MHz Test Conditions Unit
2.5V ELECTRICAL SPECIFICATIONS
Description Supply Voltage Input Voltage Input HIGH Voltage Input Leakage Current Input HIGH Current Output Voltage Output HIGH Voltage Power Down Supply Current Supply Current Parameter mode) (Commercial) (Industrial) Unloaded outputs, 66-MHz Test Conditions Unit
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
3.3V 2.5V ELECTRICAL SPECIFICATIONS
Description Maximum Frequency (Input/Output) Input Duty Cycle Output Duty Cycle Rise, Fall Time (3.3V Supplies) Rise, Fall Time (2.5V Supplies) Output Output Skew
Parameter Test Conditions 3.3V Supplies 2.5V Supplies <133.3 >133.3 <133.3 >133.3 <100 <133.3 <167 <133.33 outputs equally loaded 3.3V Supplies 2.5V Supplies Measured pins devices. 3.3V supplies. Measured pins devices. 2.5V supplies. Stable power supply, valid clocks presented pins
-100 -200
±150 ±300
Unit
Delay, Rising Edge Rising Edge
Part Part Skew
Lock Time
LOCK
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
3.3V 2.5V ELECTRICAL SPECIFICATIONS (continued)
Description Cycle-to-Cycle Jitter, Peak (-04) Cycle-to-Cycle Jitter, Peak (-042) Period Jitter, Peak (-04) Parameter [7,8] Test Conditions 3.3V Supplies, MHz, 3.3V Supplies, MHz, 2.5V Supplies, MHz, [7,8] 3.3V Supplies, MHz, 2.5V Supplies, MHz, 3.3V Supplies, 66-100 MHz, [7,8] 3.3V Supplies, >100 MHz, 3.3V Supplies, MHz, 2.5V Supplies, MHz, Period Jitter, Peak (-042) [7,8] 3.3V Supplies, MHz, 2.5V Supplies, MHz, Unit
Notes: given maximum loading conditions. Operating Conditions Table. Parameter guaranteed design characterization. 100% tested production. Typical jitter measured 3.3V 2.5V, 29°C, with outputs driven into maximum specified load.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
SWITCHING WAVEFORMS
Duty Cycle Timing
1.4V
1.4V
Outputs Rise/Fall Time OUTPUT Output-Output Skew OUTPUT
2.0V 0.8V
2.0V 0.8V
3.3V
1.4V
OUTPUT
1.4V
Input-Output Propagation Delay INPUT VDD/2
VDD/2
Device-Device Skew FBK, Device VDD/2
FBK, Device
VDD/2
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
TEST CIRCUIT
Test Circuit
OUTPUTS
LOAD
PACKAGE DRAWINGS
8-Pin Symbol Dimension Min. Max. 1.35 1.75 0.10 0.25 1.25 1.50 0.33 0.53 0.19 0.27 4.80 5.00 3.80 4.00 5.80 6.20 0.40 0.89 1.27
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123E-04
3.3V Zero Delay Buffer
ORDERING INFORMATION (GREEN PACKAGE COMPLIANT)
part ordering, please contact Sales Department: 47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER order number this device combination following: Part number, Package type Operating temperature range
Part/Order Number PL123E-04SC PL123E-04SC-R PL123E-042SC PL123E-042SC-R PL123E-04SI PL123E-04SI-R PL123E-042SI PL123E-042SI-R
Marking P123E-04 P123E-04 P123E-042 P123E-042 P123E-04 P123E-04 P123E-042 P123E-042 8-Pin 8-Pin 8-Pin 8-Pin 8-Pin 8-Pin 8-Pin 8-Pin
Package Option Tube (Tape Tube (Tape Tube (Tape Tube (Tape Reel) Reel) Reel) Reel)
Operating Range Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial
PhaseLink Corporation, reserves right make changes products specifications, both time without notice. information furnished Phaselink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
Solder reflow profile available
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page

2.5V 3.3V, 10-220 MHz, Jitter, 4-Output Zero Delay Buffer Zero in

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