Fan-Out Buffer with Supports 3.3V, 2.5V, 1.8V power supplies Freq
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PL123-02N
Fan-Out Buffer with
Supports 3.3V, 2.5V, 1.8V power supplies Frequency Support 3.3V Supplies: 2.5V Supplies: 1.8V Supplies: Output-enable (OE) LVCMOS Input/Outputs Operating temperature range from -40°C 85°C Available space-saving 6-pin GREEN/RoHS compliant packages.
DESCRIPTION
PL123-02N low-cost general purpose 1-to-2 LVCMOS fan-out buffer. output-enable available enable outputs disable them into active state. When outputs disabled, consumes less than power. incorporates pull resistor giving default condition logic "1". input outputs LVCMOS levels, operate MHz. space-saving 6-pin package enables designs requiring minimal board area.
BLOCK DIAGRAM
CONFIGURATION DESCRIPTION
PL123-02N
CLK1
CLK0
DFN-6L (2.0mmx1.3mmx0.6mm)
Name CLK1 CLK0 Assignment Type Description Programmable Clock Output connection Reference input Output Enable (OE) input. Outputs enabled when high. Outputs `Active low' mode when low. connection Programmable Clock Output
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123-02N
Fan-Out Buffer with
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS PARAMETERS Supply Voltage Range Input Voltage Range Output Voltage Range Soldering Temperature (Green package) Storage Temperature Ambient Operating Temperature* SYMBOL MIN. -0.5 -0.5 -0.5 MAX. +0.5 +0.5 UNITS
Exposure device under conditions beyond limits specified Maximum Ratings extended periods cause permanent damage device affect product reliability. These conditions represent stress rating only, functional operations device these other conditions above operational limits noted this specification implied. *Operating temperature guaranteed design. Parts tested commercial grade only.
SPECIFICATIONS
PARAMETERS =3.3V Frequency Input Voltage Input Voltage High Output Enable Time Output Rise Time Output Fall Time Duty Cycle 15pF Load 15pF Load, 10/90% High Drive, 3.3V 15pF Load, 90/10% High Drive, 3.3V Measured 0.7xV =2.5V =1.8V CONDITIONS MIN. TYP. MAX. 0.3xV UNITS
Notes: Higher frequencies achieved lower capacitive loads.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123-02N
Fan-Out Buffer with
SPECIFICATIONS
PARAMETERS Supply Current, Dynamic, with Loaded CMOS Output Supply Current, Dynamic, with Loaded CMOS Output Supply Current, Dynamic, with Loaded CMOS Output Supply Current, Dynamic, with Loaded Outputs Operating Voltage Output Voltage Output High Voltage Output Current, Drive Output Current, Standard Drive Output Current, High Drive SYMBOL +4mA -4mA 0.4V, 2.4V 0.4V, 2.4V 0.4V, 2.4V CONDITIONS =3.3V, 32kHz, load=15pF =2.5V, 32KHz, load=15pF =1.8V, 32kHz, load=15pF When OE=0 1.62 MIN. TYP. 3.63 MAX. UNITS
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123-02N
Fan-Out Buffer with
LAYOUT CONSIDERATIONS PERFORMANCE OPTIMIZATION
following guidelines assist with performance optimized design: Keep traces short possible, well keeping other traces away from possible. Place 0.01µF~0.1µF decoupling capacitor between GND, component side PCB, close pin. recommended place this component backside PCB. Going through vias will reduce signal integrity, causing additional jitter phase noise. highly recommended keep traces short possible. When connecting long traces inch) CMOS output, important design traces transmission line `stripline', avoid reflections ringing. this case, CMOS output needs matched trace impedance. Usually `striplines' designed impedance CMOS outputs usually have lower than impedance matching achieved adding resistor series with CMOS output `stripline' trace. Please contact PhaseLink application note design outputs driving long traces additional layout assistance.
DFN-6L Evaluation Board
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123-02N
Fan-Out Buffer with
PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT)
Dimension (MM) Symbol 0.50 0.00 0.60 0.05
0.152 0.15 0.25
0.40BSC 1.25 1.95 0.75 0.95 0.20 1.35 2.05 0.85 1.05
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
PL123-02N
Fan-Out Buffer with
ORDERING INFORMATION (GREEN PACKAGE COMPLIANT)
part ordering, please contact Sales Department: 47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER order number this device combination following: Part number, Package type Operating temperature range
PL123-02N
PART NUMBER PACKAGE TYPE G=DFN-6L
R=TAPE REEL TEMPERATURE C=COMMERCIAL INDUSTRIAL
Part /Order Number PL123-02NGC-R
Marking P123-02N
Package Option 6-Pin (Tape Reel)
PhaseLink Corporation, reserves right make changes products specifications, both time without notice. information furnished Phaselink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
Solder reflow profile available
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 7/19/07 Page
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