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January 2005, Compiler Version 2.3.0 This document addresses know


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SONET/SDH Compiler
January 2005, Compiler Version 2.3.0
This document addresses known errata documentation changes version 2.3.0 SONET/SDH Compiler. Errata design functional defects errors. Errata cause SONET/SDH Compiler deviate from published specifications. Documentation changes include typos, errors, unclear descriptions omissions from current published specifications product documents. These documentation changes clarifications will incorporated into upcoming release SONET/SDH Compiler.
SONET/SDH Compiler v2.3.0 Issues
Altera identified following issues that affect SONET/SDH Compiler v2.3.0: "The AIRbus Interface Return Data Transfer Acknowledge Undefined Address Range" page "Incorrect Data Returned When AIRbus Interface Reads from Transmitter Section Trace Message Buffer" page "The APPLY_3FRM Field Transmitter Transport Control (TXT_REG_CTRL1) Register Does Behave Intended" page "The srxval Signal Gates Change Loss Signal Detection, Loss Frame Detection, Severely Errored Frame Reporting" page Deasserted, srxval Input Signal Causes Framer Immediately Into State" page "RDI-L Updated Until Framing Alignment State Machine Reaches SYNC State" page "RDI-P Updated Until Pointer Processor State Machine Reaches NORM State" page "The Detection AIS-P LOP-P Cause Corresponding RDI-P Value Inserted Wrong Paths" page
Altera Corporation ES-011305-1.0
Preliminary
SONET/SDH Compiler
"The RDI-L Value Inserted Into Transmit Frame Keeps Constant Value" page
"The RDI-P Value Inserted Into Transmit Frame Keeps Constant Value" page "Path Overhead Processing Unreliable Certain OC-48 Variations" page "The Error Rate Monitor Does Perform Specified" page "The Midbus Interface mtxerr Signal Does Behave Defined" page "The Stratix Transceiver Requires Specific altgxb Megafunction Reset Sequence" page "The Default Value Memory-Based Registers Should page "Incomplete Conditions Table User Guide" page
AIRbus Interface Return Data Transfer Acknowledge Undefined Address Range
asserting data transfer acknowledge (dtack) signal, MegaCore® function indicates that AIRbus access been completed. However, some variations MegaCore function fail assert dtack signal accesses certain addresses.
Affected Configurations
variations MegaCore function that incorporate SONET/SDH overhead processor (SSPROC) affected.
Design Impact
AIRbus interface hangs when accessing addresses range addr[msb:msb-1]=2'b11 because dtack signal does asserted.
Workaround
Ensure that access only address ranges listed top-level memory HTML register file generated Toolbench during MegaCore function generation.
Preliminary
Altera Corporation
SONET/SDH Compiler v2.3.0 Issues
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Incorrect Data Returned When AIRbus Interface Reads from Transmitter Section Trace Message Buffer
transmitter section trace message buffer (TXT_PRC_J0_MSG_BUF) holds trace message inserted into outgoing frames. Although AIRbus interface writes memory correctly, does read from correctly.
Affected Configurations
variations MegaCore function that incorporate SSPROC affected.
Design Impact
Reading from TXT_PRC_J0_MSG_BUF return incorrect data.
Workaround
retrieve correct memory contents, clear BUF_INS field transmitter control (TXT_PRC_J0_CTRL) register, read each memory location twice succession. second reading provides correct data.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
APPLY_3FRM Field Transmitter Transport Control (TXT_REG_CTRL1) Register Does Behave Intended
GR-253 (SONET) specification specifies that pointer increment decrement should performed within three frames previous pointer increment, decrement, data flag (NDF). (The specification such requirement.) Setting APPLY_3FRM supposed restrict allowable pointer increments decrements satisfy SONET requirement. However, setting this configuration causes transmitter restrict pointer movements only frames, only after pointer increment decrement, after NDF. SONET transmitter does restrict pointer increments decrements number frames after NDF.
Altera Corporation
Preliminary
SONET/SDH Compiler
Affected Configurations
variations MegaCore function affected.
Design Impact
SONET transmitter generate pointers that violate this three-frame window restricted pointer movements, causing problems downstream receiver.
Workaround
assert pointer increments decrements within three frames other pointer movements NDFs. This applies AIRbus- Midbus-induced pointer movements.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
srxval Signal Gates Change Loss Signal Detection, Loss Frame Detection, Severely Errored Frame Reporting
srxval signal, used validate srxdata bus, unnecessarily gating reporting state change loss signal (LOS), loss frame (LOF), severely errored frame (SEF) fields receiver transport interrupt status (RXT_REG_IS) register SONET/SDH receiver data path (SSRX_DATA) block.
Affected Configurations
variations MegaCore function affected.
Design Impact
srxval signal deasserted change state occurs LOS, LOF, SEF, state change interrupt reported corresponding bits RXT_REG_IS register.
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Preliminary
Altera Corporation
SONET/SDH Compiler v2.3.0 Issues
Deasserted, srxval Input Signal Causes Framer Immediately Into State
MegaCore function's current behavior causes framer immediately into state when srxval signal deasserted. MegaCore function's intended behavior framer enter state immediately, eventually enter state condition persists
Affected Configurations
variations MegaCore function affected.
Design Impact
srxval signal deasserted, framer immediately reports condition.
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
RDI-L Updated Until Framing Alignment State Machine Reaches SYNC State
line remote defect indicator (RDI-L) communicates receiver-line defects upstream (transmitting) device MegaCore function. After reset, RDI-L sent upstream device does updated until framing alignment state machine reaches SYNC state. However, once framer reaches SYNC state, RDI-L continuously updated even framer exits SYNC state, provided reset applied.
Affected Configurations
variations MegaCore function affected.
Design Impact
RDI-L does updated after reset until SYNC state achieved.
Altera Corporation
Preliminary
SONET/SDH Compiler
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
RDI-P Updated Until Pointer Processor State Machine Reaches NORM State
path remote defect indicator (RDI-P) communicates receiver-path defects upstream (transmitting) device MegaCore function. After reset, RDI-P that path does updated until pointer processor state machine reaches NORM state. However, once pointer processor that path reaches NORM state, RDI-P that path continuously updated even that path exits NORM state, provided reset applied.
Affected Configurations
variations MegaCore function that incorporate SSPROC affected.
Design Impact
RDI-P does updated after reset until NORM state achieved.
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Detection AIS-P LOP-P Cause Corresponding RDI-P Value Inserted Wrong Paths
receiver generates RDI-P value, path specific indication, from detection AIS-P LOP-P condition transmits that RDI-P value back upstream device. This RDI-P value erroneously inserted into more than path, thus falsely indicating RDI-Ps paths that have AIS-P LOP-P conditions.
Preliminary
Altera Corporation
SONET/SDH Compiler v2.3.0 Issues
Affected Configurations
channelized variations MegaCore function that incorporate SSPROC affected.
Design Impact
RDI-P value inserted into paths that have AIS-P LOP-P conditions.
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
RDI-L Value Inserted Into Transmit Frame Keeps Constant Value
receiver generates RDI-L value, path specific indication, transmits that RDI-L value back upstream device automatically inserting value into transmit frames. However, error MegaCore function causes inserted RDI-L value keep value bits TXT_PRC_AUTO_RDIL_CTRL register disabled. kept value RDI-L code before bits TXT_PRC_AUTO_RDIL_CTRL register were cleared.
Affected Configurations
variations MegaCore function that incorporate SSPROC affected.
Design Impact
RDI-L value retain undesired RDI-L code.
Workaround
Enable TXT_PRC_AUTO_RDIL_CTRL register.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Altera Corporation
Preliminary
SONET/SDH Compiler
RDI-P Value Inserted Into Transmit Frame Keeps Constant Value
receiver generates RDI-P value, path specific indication, transmits that RDI-P value back upstream device automatically inserting specific RDI-P codes into transmit frames. However, error MegaCore function causes RDI-P code keep value AUTO_LOP_RDIP, AUTO_TIMP_RDIP, AUTO_LCDP_RDIP bits TXP_PRC_AUTO_RDIP_CTRL1, TXP_PRC_AUTO_RDIP_CTRL2, TXP_PRC_AUTO_RDIP_CTRL3 registers, respectively, disabled. RDIP-P keeps constant value until those bits again.
Affected Configurations
variations MegaCore function that incorporate SSPROC affected.
Design Impact
RDI-P value retain undesired RDI-P code, render DEFAULT_RDIP_CODE ineffective.
Workaround
Enable AUTO_LOP_RDIP, AUTO_TIMP_RDIP, AUTO_LCDP_RDIP bits TXP_PRC_AUTO_RDIP_CTRL1, TXP_PRC_AUTO_RDIP_CTRL2, TXP_PRC_AUTO_RDIP_CTRL3 registers, respectively.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Path Overhead Processing Unreliable Certain OC-48 Variations
SONET/SDH receiver processor (SSRX_PROC) SONET/SDH transmitter processor (SSTX_PROC) process generate path overhead information. Most this processing consists tracking specific bytes successive frames each path, checking consistency, comparing expected values.
Affected Configurations
OC-48 variations MegaCore function that channelized STS-1 STS-3C affected.
Preliminary
Altera Corporation
SONET/SDH Compiler v2.3.0 Issues
Design Impact
receiver side, path overhead processing results incorrect, causing number path-related interrupts asserted. transmitter side, path overhead bytes that inserted into outgoing stream incorrect.
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Error Rate Monitor Does Perform Specified
error rate monitor identifies signal degrade signal fail conditions. SONET/SDH Compiler User Guide specifies that each error rate monitor uses sliding window protocol which sliding window size decomposed into eight sub-windows. size sub-windows defined contents following registers: RXT_PRC_SD_SET_SUB_WIN, RXT_PRC_SD_CLR_SUB_WIN, RXT_PRC_SF_SET_SUB_WIN, RXT_PRC_SF_CLR_SUB_WIN. However, algorithm implemented MegaCore function differs from documentation because uses sliding window consisting seven sub-windows, size which correspond contents registers plus
Affected Configurations
variations MegaCore function that incorporate SSPROC affected.
Design Impact
error rate monitor reports signal degrade signal fail conditions based algorithm that consistent with documentation.
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Altera Corporation
Preliminary
SONET/SDH Compiler
Midbus Interface mtxerr Signal Does Behave Defined
mtxerr signal used alter some data transmitted line side. However, because error MegaCore function, mtxerr signal does always behave specified, leading unexpected data transmit data.
Affected Configurations
OC-48 OC-192 variations MegaCore function that have path signal greater than STS-3C.
Design Impact
Asserting mtxerr signal does always produce expected results, which problematic because mtxerr signal used insert errors variety overhead bytes.
Workaround
workaround available.
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Stratix Transceiver Requires Specific altgxb Megafunction Reset Sequence
Stratix Transceiver User Guide states that specific reset sequence should followed reset altgxb megafunction. This sequence implemented SONET/SDH MegaCore function.
Affected Configurations
variations MegaCore function that altgxb megafunction affected.
Design Impact
SONET/SDH MegaCore function does comply with recommended Stratix transceiver reset sequence. However, problems have been encountered.
Workaround
workaround available.
Preliminary
Altera Corporation
SONET/SDH Compiler v2.3.0 Issues
Solution Status
This issue been fixed v2.3.1 SONET/SDH Compiler.
Default Value Memory-Based Registers Should
Many registers defined MegaCore function's register memory based, flop based. memories cannot reset, initialized value when MegaCore function reset. Altera recommends that write memory-based registers required your design initialize their content ensure predictable behavior.
Affected Configurations
variations MegaCore function affected.
Design Impact
MegaCore function reset does clear contents memory-based registers.
Workaround
workarounds possible:
Write content memory-based registers required your design ensure that they contain desired value.
Reprogram FPGA. This initializes memories zero.
Solution Status
help identify memory-based registers implement workaround, default values memory-based registers have been changed v2.3.1 SONET/SDH Compiler User Guide. These default values have also been changed source code HTML register files generated Toolbench during MegaCore function generation.
Altera Corporation
Preliminary
SONET/SDH Compiler
Incomplete Conditions Table User Guide
Table 3-3: Signal Label Mismatch Defect Conditions, page 3-23 SONET/SDH Compiler User Guide, there condition covering when expected functionality 'h00 received payload label 'h00.
Solution Status
These conditions have been added v2.3.1 SONET/SDH Compiler User Guide.
Contact Information Revision History
Table Revision History Version
more information, Altera's mySupport website www.altera.com/mysupport click Create Service Request. Choose Product Related Request form. Table shows revision history.
Date
January 2005
Details Change
First release SONET/SDH Compiler errata sheet v2.3.0.
Innovation Drive Jose, 95134 (408) 544-7000 www.altera.com Applications Hotline: (800) 800-EPLD Literature Services: lit_req@altera.com
Copyright 2005 Altera Corporation. rights reserved. Altera, Programmable Solutions Company, stylized Altera logo, specific device designations, other words logos that identified trademarks and/or service marks are, unless noted otherwise, trademarks service marks Altera Corporation U.S. other countries. other product service names property their respective holders. Altera products protected under numerous U.S. foreign patents pending applications, maskwork rights, copyrights. Altera warrants performance semiconductor products current specifications accordance with Altera's standard warranty, reserves right make changes products services time without notice. Altera assumes responsibility liability arising application information, product, service described herein except expressly agreed writing Altera Corporation. Altera customers advised obtain latest version device specifications before relying published information before placing orders products services.
Preliminary
Altera Corporation

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