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Compatible with Existing 32-Bit Code Base Including support SSE, SSE2,
Top Searches for this datasheetAthlon64 Processor Product Data Sheet Compatible with Existing 32-Bit Code Base Including support SSE, SSE2, SSE3*, MMXTM, 3DNow!technology legacy instructions *SSE3 supported later processors 754-Pin Package Specific Features Runs existing operating systems drivers Refer Functional Data Sheet, Local APIC on-chip Package, order# 31410, functional, electrical, mechanical details 754-pin package processors. Electrical Interfaces HyperTransporttechnology: LVDS-like differential, unidirectional SDRAM: SSTL_2 JEDEC specification Clock, reset, test signals also SDRAM-like electrical specifications Packaging 754-pin lidded micro 1.27-mm pitch 29x29-row array 40mm 40mm organic substrate Organic attach Integrated Memory Controller Low-latency, high-bandwidth 72-bit SDRAM 100, 133, 166, Supports three unbuffered DIMMs checking with double-bit detect single-bit correct HyperTransportTechnology Devices 16-bit link supporting speeds (1600 MT/s) Gigabytes/s each direction AMD64 Technology AMD64 technology instruction extensions 64-bit integer registers, 48-bit virtual addresses, physical addresses Eight additional 64-bit integer registers total) Eight additional 128-bit registers total) Cache 64-bit operations cycle, 3-cycle latency 64-Kbyte 2-Way Associative Parity-Protected Instruction Cache With advanced branch prediction 16-Way Associative ECC-Protected Cache Exclusive cache architecture-storage addition caches Mbyte, 512-Kbyte 256-Kbyte options Machine Check Architecture Includes hardware scrubbing major ECC-protected arrays Power Management Multiple low-power states System Management Mode (SMM) ACPI-compliant, including support processor performance states Publication Issue Date: 24659 Revision: September 2006 3.18 Advanced Micro Devices Athlon64 Processor Product Data Sheet 24659 Rev. 3.18 September 2006 939-Pin Package Specific Features Refer Functional Data Sheet, 939-Pin Package, order# 31411, functional, electrical, mechanical details 939-pin package processors. Electrical Interfaces HyperTransporttechnology: LVDS-like differential, unidirectional SDRAM: SSTL_2 JEDEC specification Clock, reset, test signals also SDRAM-like electrical specifications Packaging 939-pin lidded micro 1.27-mm pitch 31x31-row array 40mm 40mm organic substrate Organic attach Integrated Memory Controller Low-latency, high-bandwidth 144-bit SDRAM 100, 133, 166, Supports four unbuffered DIMMs checking with double-bit detect singlebit correct HyperTransportTechnology Devices 16-bit link supporting speeds (2000 MT/s) Gigabytes/s each direction Socket Specific Features Refer Socket Processor Functional Data Sheet, order# 31117, functional mechanical details socket processors. Refer Family Processor Electrical Data Sheet, order# 31119, electrical details socket processors. Electrical Interfaces HyperTransporttechnology: LVDS-like differential, unidirectional DDR2 SDRAM: SSTL_1.8 JEDEC specification Clock, reset, test signals also DDR2 SDRAM-like electrical specifications Packaging Lidded micro 31x31 grid array 1.27-mm pitch Compliant with RoHS Directive 2002/95/EC) with lead used only small amounts specifically exempted applications Integrated Memory Controller Low-latency, high-bandwidth 144-bit DDR2 SDRAM controller operating Supports four unbuffered DIMMs checking with double-bit detect singlebit correct HyperTransportTechnology Devices 16-bit link supporting speeds (2000 MT/s) Gigabytes/s each direction 24659 Rev. 3.18 September 2006 Athlon64 Processor Product Data Sheet Revision History Date September 2006 Revision 3.18 Description Public release. Added HyperTransportTechnology information under Socket Specific Features. Removed change bars. August 2006 June 2006 3.16 3.12 Added RoHS compliance statement. Added asterisk note SSE3. Public release. Clarified SSE3 support. Added Socket Specific Features Duplicated Electrical Interfaces under 754-pin 939-pin Specific Features. Added revision history. Removed multi core information. April 2005 3.10 2005, 2006 Advanced Micro Devices, Inc. rights reserved. contents this document provided connection with Advanced Micro Devices, Inc. ("AMD") products. makes representations warranties with respect accuracy completeness contents this publication reserves right make changes specifications product descriptions time without notice. information contained herein preliminary advance nature subject change without notice. license, whether express, implied, arising estoppel otherwise, intellectual property rights granted this publication. Except forth AMD's Standard Terms Conditions Sale, assumes liability whatsoever, disclaims express implied warranty, relating products including, limited implied warranty merchantability, fitness particular purpose, infringement intellectual property right. AMD's products designed, intended, authorized warranted components systems intended surgical implant into body, other applications intended support sustain life, other application which failure AMD's product could create situation where personal injury, death, severe property environmental damage occur. reserves right discontinue make changes products time without notice. Trademarks AMD, Arrow logo, Athlon combinations thereof, 3DNow! trademarks Advanced Micro Devices, Inc. HyperTransport licensed trademark HyperTransport Technology Consortium. trademark Intel Corporation. Other product names used this publication identification purposes only trademarks their respective companies. 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