Chapter Implementing Double Data Rate Signaling Cyclone Devices Chapte

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Chapter Implementing Double Data Rate Signaling Cyclone Devices Chapte

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This section provides documentation design considerations when utilizing Cyclone devices. addition these design considerations, refer Intellectual Property section Altera site complete offering cores Cyclone devices. This section contains following chapters:
Chapter Implementing Double Data Rate Signaling Cyclone Devices Chapter Using Cyclone Devices Multiple-Voltage Systems Chapter Designing with 1.5-V Devices
Refer each chapter specific revision history. information when each chapter updated, refer Chapter Revision Dates section, which appears complete handbook.
Altera Corporation
Section Preliminary
Cyclone Device Handbook, Volume
Section Preliminary
Altera Corporation
Implementing Double Data Rate Signaling Cyclone Devices
C51010-1.1
Introduction
Double data rate (DDR) transmission used many applications where fast data transmission needed, such memory access first-in first-out (FIFO) memory structures. uses both edges clock transmit data, which facilitates data transmission twice rate single data rate (SDR) architecture using same clock speed. This method also reduces number pins required transmit data. This chapter shows implementations double data rate interface using Cyclone® devices. Cyclone devices support input, output, bidirectional signaling.
more information using Cyclone devices applications with SDRAM FCRAM memory devices, "DDR Memory Support" page 10-4. input implementation shown Figure 10-1 uses four internal logic element (LE) registers located logic array block (LAB) adjacent input pin. data first four registers. register captures data present during rising edge clock. second register captures data present during falling edge clock.
Double Data Rate Input
Figure 10-1. Double Data Rate Input Implementation
ddr_out_h
p_edge_reg
ddr_h_sync_reg
n_edge_reg
ddr_out_l
ddr_l_sync_reg
Altera Corporation January 2007
10-1 Preliminary
Cyclone Device Handbook, Volume
third fourth registers synchronize data streams rising edge clock. Figure 10-2 shows examples functional waveforms from double data rate input implementation. Figure 10-2. Double Data Rate Input Functional Waveforms
ddr_out_l ddr_out_h
Double Data Rate Output
Figure 10-3 shows schematic representation double data rate output implemented Cyclone device. output logic implemented using adjacent output pin. registers used synchronize serial data streams. registered outputs then multiplexed common clock drive output times data rate. Figure 10-3. Double Data Rate Output Implementation
data_in_h
data1 reg_h data0 data_in_l result
reg_l
While clock signal logic-high, output from reg_h driven onto output pin. While clock signal logic-low, output from reg_l driven onto output pin. output available user pin. Figure 10-4 shows examples functional waveforms from double data rate output implementation.
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Altera Corporation January 2007
Bidirectional Double Data Rate
Figure 10-4. Double Data Rate Output Waveforms
data_in_h data_in_l
Bidirectional Double Data Rate
Figure 10-5 shows bidirectional interface, constructed using input output examples described previous sections. with input output examples, bidirectional available user pin, registers used implement bidirectional logic adjacent that pin. tri-state buffer (TRI) controls when device drives data onto bidirectional pin.
Figure 10-5. Bidirectional Double Data Rate Implementation
ddr_wen ddr_in_h
data1 result ddr_in_l data0
ddr_out_h
ddr_out_l
Altera Corporation January 2007
10-3 Preliminary
Cyclone Device Handbook, Volume
Figure 10-6 shows example waveforms from bidirectional double data rate implementation. Figure 10-6. Double Data Rate Bidirectional Waveforms
data_in_h data_in_l ddr_wen ddr~result data_out_h data_out_l
Memory Support
Cyclone device family supports both SDRAM FCRAM memory interfaces MHz.
more information extended memory support Cyclone devices, Section Cyclone FPGA Family Data Sheet. Utilizing both rising falling edges clock signal, double data rate transmission popular strategy increasing speed data transmission while reducing required number pins. Cyclone devices used implement this strategy applications such FIFO structures, SDRAM/FCRAM interfaces, well other time-sensitive memory access data-transmission situations.
Conclusion
10-4 Preliminary
Altera Corporation January 2007
Document
Document
Table 10-1 shows revision history this document.
Table 10-1. Document Revision History Date Document Version
January 2007 v1.1 2003 v1.0
Changes Made
Added document revision history. Added document Cyclone Device Handbook.
Summary Changes
Altera Corporation January 2007
10-5 Preliminary
Cyclone Device Handbook, Volume
10-6 Preliminary
Altera Corporation January 2007
Using Cyclone Devices Multiple-Voltage Systems
C51011-1.2
Introduction
meet demand higher system speed data communications, semiconductor vendors increasingly advanced processing technologies requiring lower operating voltages. result, printed circuit boards (PCBs) often incorporate devices conforming several voltage level standards, such 3.3-V, 2.5-V, 1.8-V 1.5-V. mixture components with various voltage level standards single inevitable. order accommodate this mixture devices single PCB, device that bridge interface between these devices needed. Cyclone® device family's MultiVoltI/O operation capability meets increasing demand compatibility with devices different voltages. MultiVolt operation separates power supply voltage from output voltage, enabling Cyclone devices interoperate with other devices using different voltage levels same PCB. addition MultiVolt operation, this chapter discusses several other features that allow Cyclone devices multiple-voltage systems without damaging device system, including:
Hot-Socketing-add remove Cyclone devices from powered-up system without affecting device system operation Power-Up Sequence flexibility-Cyclone devices accommodate possible power-up sequence Power-On Reset-Cyclone devices maintain reset state until voltage within operating range
Standards
buffer Cyclone device programmable supports wide range voltage standards. Each bank Cyclone device programmed comply with different standard. banks configured with following standards:
3.3-V LVTTL/LVCMOS 2.5-V LVTTL/LVCMOS 1.8-V LVTTL/LVCMOS 1.5-V LVCMOS LVDS SSTL-2 Class SSTL-3 Class
Altera Corporation January 2007
11-1 Preliminary
Cyclone Device Handbook, Volume
banks also include 3.3-V standard interface capability. Figure 11-1. Figure 11-1. Standards Supported Cyclone Devices
Bank
Notes (1), (2),
Bank also supports 3.3-V Standard
Bank also supports 3.3-V Standard Banks support 3.3-V LVTTL/LVCMOS 2.5-V LVTTL/LVCMOS 1.8-V LVTTL/LVCMOS 1.5-V LVCMOS LVDS SSTL-2 Class SSTL-3 Class
Bank
Bank
Individual Power
Bank
Notes Figure 11-1
Figure view silicon die. Figure graphical representation only. Refer list Quartus software exact locations. EP1C3 device 100-pin thin quad flat pack (TQFP) package does have support LVDS input external clock output.
MultiVolt Operation
Cyclone devices include MultiVolt operation capability, allowing core blocks device powered-up with separate supply voltages. VCCINT pins supply power device core VCCIO pins supply power device's buffers.
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5.0-V Device Compatibility
Supply device VCCIO pins that have MultiVolt capability same voltage level (e.g., 3.3-V, 2.5-V, 1.8-V, 1.5-V). Figure 11-2.
Figure 11-2. Implementing Multiple-Voltage System with Cyclone Device
5.0-V Device
Cyclone Device
3.3-V Device
2.5-V Device
5.0-V Device Compatibility
Cyclone device correctly interoperate with 5.0-V device output Cyclone device connected directly input 5.0-V device. VOUT Cyclone device greater than VCCIO, PMOS pull-up transistor still conducts driving high, preventing external pull-up resistor from pulling signal 5.0-V. Cyclone device drive 5.0-V LVTTL device connecting VCCIO pins Cyclone device This because output high voltage (VOH) 3.3-V interface meets minimum high-level voltage 2.4-V 5.0-V LVTTL device. Cyclone device cannot drive 5.0-V LVCMOS device.) Because Cyclone devices 3.3-V, 32-bit, 33-MHz compliant input circuitry accepts maximum high-level input voltage (VIH) 4.1-V. drive Cyclone device with 5.0-V device, must connect resistor (R2) between Cyclone device 5.0-V device. Figure 11-3.
Altera Corporation January 2007
11-3 Preliminary
Cyclone Device Handbook, Volume
Figure 11-3. Driving Cyclone Device with 5.0-Volt Device
Cyclone Device 5.0-V Device
0.25 0.25
CCIO Clamp CCIO
Model
VCCIO between 3.0-V 3.6-V clamping diode (not available EP1C3 devices) enabled, voltage point Figure 11-3 4.3-V less. limit large current draw from 5.0-V device, should small enough fast signal rise time large enough that does violate high-level output current (IOH) specifications devices driving trace. clamping diode Cyclone device support 25mA current. compute required value first calculate model pullup transistors 5.0-V device. This output resistor (R1) modeled dividing 5.0-V device supply voltage (VCC) IOH: VCC/IOH. Figure 11-4 shows example typical output drive characteristics 5.0-V device.
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5.0-V Device Compatibility
Figure 11-4. Output Drive Characteristics 5.0-V Device
VCCINT 5.0V VCCIO 5.0V
Typical Output Current (mA)
Output Voltage
shown above, 5.0-V/135 values usually shown data sheets reflect typical operating conditions. Subtract from data sheet value guard band. This subtraction applied above example gives value
should selected violate driving device's specification. example, above device maximum given clamping diode, VCCIO 0.7-V 3.7-V. Given that maximum supply load 5.0-V device (VCC) will 5.25-V, value calculated follows: 5.25V This analysis assumes worst-case conditions. your system will wide variation voltage-supply levels, adjust these calculations accordingly. Because 5.0-V device tolerance Cyclone devices requires clamp (not available EP1C3 devices), this clamp activated during configuration, 5.0-V signals driven into device until configured.
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Cyclone Device Handbook, Volume
Hot-Socketing
Hot-socketing, also known hot-swapping, refers inserting removing board device into system board while system power system support hot-socketing, plug-in removal subsystem device must damage system interrupt system operation. devices Cyclone family designed support hot-socketing without special design requirements. following features have been implemented Cyclone devices facilitate hot-socketing:
Devices driven before power-up with damage device. pins remain tri-stated during power-up. Signal pins drive VCCIO VCCINT power supplies. Because 5.0-V tolerance Cyclone devices require clamping diode, clamping diode only available after configuration finished, careful connect 5.0-V signals device.
Devices Driven before Power-Up
device pins, dedicated input pins, dedicated clock pins Cyclone devices driven before during power-up without damaging devices.
Pins Remain Tri-Stated during Power-Up
device that does support hot-socketing interrupt system operation cause contention driving before during power-up. Cyclone devices, pins tri-stated before during power-up configuration, will drive out.
Signal Pins Drive VCCIO VCCINT Power Supplies
device that does support hot-socketing will short power supplies together when powered-up through signal pins. This irregular powerup damage both driving driven devices disrupt card power-up. Cyclone devices, there current path from pins, dedicated input pins, dedicated clock pins VCCIO VCCINT pins before during power-up. Cyclone device inserted into removed from) powered-up system board without damaging interfering with system-board operation. When hot-socketing, Cyclone devices have minimal effect signal integrity backplane.
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Power-Up Sequence
maximum current when hot-socketing Cyclone devices less than whereas maximum current during hot-socketing less than period 10ns less.
During hot-socketing, signal pins device connected driven active system before power supply provide current device ground planes. Known latch-up, this condition cause parasitic diodes turn within device, causing device consume large amount current, possibly causing electrical damage. This operation also cause parasitic diodes turn inside driven device. Cyclone devices immune latch-up when hotsocketing.
Power-Up Sequence
Because Cyclone devices used multi-voltage environment, they designed tolerate possible power-up sequence. Either VCCINT VCCIO initially supply power device, 3.3-V, 2.5-V, 1.8-V, 1.5-V input signals drive devices without special precautions before VCCINT VCCIO applied. Cyclone devices operate with VCCIO voltage level that higher than VCCINT level. also change VCCIO supply voltage while board powered-up. However, must ensure that VCCINT VCCIO power supplies stay within correct device operating conditions. When VCCIO VCCINT supplied from different power sources Cyclone device, delay between VCCIO VCCINT occur. Normal operation does occur until both power supplies their recommended operating range. When VCCINT powered-up, IEEE Std. 1149.1 Joint Test Action Group (JTAG) circuitry active. connected VCCIO VCCIO powered-up, JTAG signals left floating. Thus, transition cause state machine transition unknown JTAG state, leading incorrect operation when VCCIO finally powered-up. disable JTAG state during power-up sequence, should pulled ensure that inadvertent rising edge does occur TCK.
Power-On Reset
When designing circuit, important consider system state power-up. Cyclone devices maintain reset state during power-up. When power applied Cyclone device, power-on-reset event occurs reaches recommended operating range within certain period time (specified maximum rise time). event does occur these conditions because slower rise times cause incorrect device initialization functional failure. VCCIO level banks that contains configuration pins must also reach acceptable level trigger event.
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Cyclone Device Handbook, Volume
VCCINT does remain specified operating range, operation assured until VCCINT re-enters range.
Conclusion
PCBs often contain 5.0-V, 3.3-V, 2.5-V, 1.8-V, 1.5-V devices. Cyclone device family's MultiVolt operation capability allows incorporate newer-generation devices with devices varying voltage levels. This capability also enables device core core voltage, VCCINT, while maintaining compatibility with other logic levels. Altera taken further steps make system design easier designing devices that allow VCCINT VCCIO power-up sequence incorporating support hot-socketing.
Document
Table 11-1 shows revision history this document.
Table 11-1. Document Revision History Date Document Version
January 2007 v1.2 October 2003 v1.1 2003 v1.0
Changes Made
Updated "Power-On Reset" section. Added 64-bit support information. Added document Cyclone Device Handbook.
Summary Changes
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Altera Corporation January 2007
Designing with 1.5-V Devices
C51012-1.3
Introduction
Cyclone® FPGA family provides best solution high-volume, cost-sensitive applications. Cyclone device fabricated leadingedge 1.5-V, 0.13-µm, all-layer copper SRAM process. Using 1.5-V operating voltage provides following advantages:
Lower power consumption compared 2.5-V 3.3-V devices. Lower operating temperature. Less need fans other temperature-control elements.
Since many existing designs based 5.0-V, 3.3-V 2.5-V power supplies, voltage regulator required lower voltage supply level 1.5-V. This document provides guidelines designing with Cyclone devices mixed-voltage single-voltage systems provides examples using voltage regulators. This document also includes information
Power Sequencing Socketing Using MultiVolt Pins Voltage Regulators 1.5-V Regulator Application Examples Board Layout Power Sequencing Socketing
Power Sequencing Socketing
Because 1.5-V Cyclone FPGAs used mixed-voltage environment, they have been designed specifically tolerate possible power-up sequence. Therefore, VCCIO VCCINT power supplies powered order. drive signals into Cyclone FPGAs before during power without damaging device. addition, Cyclone FPGAs drive during power since they tri-stated during power Once device reaches operating conditions configured, Cyclone FPGAs operate specified user.
Refer Cyclone FPGA Family Data Sheet more information.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
Using MultiVolt Pins
Cyclone FPGAs require 1.5-V VCCINT 3.3-V, 2.5-V, 1.8-V, 1.5-V supply voltage level (VCCIO). pins, including dedicated inputs, clock, I/O, JTAG pins, 3.3-V tolerant before after VCCINT VCCIO powered. When VCCIO connected 1.5-V, output compatible with 1.5-V logic levels. output pins made 1.8-V, 2.5-V, 3.3-V compatible using open-drain outputs pulled with external resistors. external resistors pull open-drain outputs with 1.8-V, 2.5-V, 3.3-V VCCIO. Table 12-1 summarizes Cyclone MultiVolt support.
Table 12-1. Cyclone MultiVolt Support Input Signal VCCIO
1.5-V 1.8-V 2.5-V 3.3-V Notes Table 12-1:
Note Output Signal 3.3-V
1.5-V
1.8-V
2.5-V
5.0-V
1.5-V
1.8-V
2.5-V
3.3-V
5.0-V
clamping diode must disabled drive input with voltages higher than VCCIO. When VCCIO 1.5-V 2.5-V 3.3-V input signal feeds input pin, higher leakage current expected. When VCCIO 1.8-V, Cyclone device drive 1.5-V device with 1.8-V tolerant inputs. When VCCIO 3.3-V 2.5-V input signal feeds input pin, when VCCIO 1.8-V 1.5-V input signal feeds input pin, VCCIO supply current slightly larger than expected. reason this increase that input signal level does drive VCCIO rail, which causes input buffer completely shut off. When VCCIO 2.5-V, Cyclone device drive 1.5-V 1.8-V device with 2.5-V tolerant inputs. Cyclone devices 5.0-V tolerant with external resistor internal clamp diode. When VCCIO 3.3-V, Cyclone device drive 1.5-V, 1.8-V, 2.5-V device with 3.3-V tolerant inputs. When VCCIO 3.3-V, Cyclone device drive device with 5.0-V LVTTL inputs 5.0-V LVCMOS inputs.
Figure 12-1 shows Cyclone FPGAs interface with 3.3-V 2.5-V devices while operating with 1.5-V VCCINT increase performance save power.
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Voltage Regulators
Figure 12-1. Cyclone FPGAs Interface with 3.3-V 2.5-V Devices
Cyclone Device 3.3-V 3.3-V Device 3.3-V CMOS VCCINT VCCIO1 VCCIO2 2.5-V 2.5-V Device 2.5-V CMOS
Voltage Regulators
This section explains generate 1.5-V supply from another system supply. Supplying power 1.5-V logic array and/or pins requires 5.0-V- 3.3-V-to-1.5-V voltage regulator. linear regulator ideal low-power applications because minimizes device count acceptable efficiency most applications. switching voltage regulator provides optimal efficiency. Switching regulators ideal high-power applications because their high efficiency. This section will help decide which regulator your system, implement regulator your design. There several companies that provide voltage regulators low-voltage devices, such Linear Technology Corporation, Maxim Integrated Products, Intersil Corporation (Elantec), National Semiconductor Corporation. Table 12-2 shows terminology specifications commonly encountered with voltage regulators. Symbols shown parentheses. symbols different linear switching regulators, linear regulator symbol listed first.
Table 12-2. Voltage Regulator Specifications Terminology (Part Specification/Terminology
Input voltage range (VIN,VCC) Line regulation (line regulation, VOUT)
Description
Minimum maximum input voltages define input voltage range, which determined regulator process voltage capabilities. Line regulation variation output voltage (VOUT) with changes input voltage (VIN). Error amplifier gain, pass transistor gain, output impedance influence line regulation. Higher gain results better regulation. Board layout regulator pin-outs also important because stray resistance introduce errors.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
Table 12-2. Voltage Regulator Specifications Terminology (Part Specification/Terminology
Load regulation (load regulation, VOUT)
Description
Load regulation variation output voltage caused changes input supply current. Linear Technology regulators designed minimize load regulation, which affected error amplifier gain, pass transistor gain, output impedance. Output voltage selection adjustable resistor voltage divider networks, connected error amplifier input, that control output voltage. There multiple output regulators that create 5.0-, 3.3-, 2.5-, 1.8- 1.5-V supplies. Quiescent current supply current during no-load quiescent state. This current sometimes used general term supply current used regulator. Dropout voltage difference between input output voltages when input enough cause output drop regulation. dropout voltage should possible better efficiency. Voltage regulators designed limit amount output current event failing load. short load causes output current voltage decrease. This event cuts power dissipation regulator during short circuit. This feature limits power dissipation regulator overheats. When specified temperature reached, regulator turns output drive transistors, allowing regulator cool. Normal operation resumes once regulator reaches normal operating temperature. input power supply fails, large output capacitors cause substantial reverse current flow backward through regulator, potentially causing damage. prevent damage, protection diodes regulator create path current flow from VOUT VIN. dominant pole placed output capacitor influences stability. Voltage regulator vendors assist output capacitor selection regulator designs that differ from what offered. minimum load from voltage divider network required good regulation, which also serves ground regulator's current path. Efficiency division output power input power. Each regulator model specific efficiency value. higher efficiency value, better regulator.
Output voltage selection
Quiescent current
Dropout voltage
Current limiting
Thermal overload protection
Reverse current protection
Stability
Minimum load requirements Efficiency
Linear Voltage Regulators
Linear voltage regulators generate regulated output from larger input voltage using current pass elements linear mode. There types linear regulators available: using series pass element another using shunt element (e.g., zener diode). Altera recommends using series linear regulators because shunt regulators less efficient.
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Voltage Regulators
Series linear regulators series pass element (i.e., bipolar transistor MOSFET) controlled feedback error amplifier (see Figure 12-2) regulate output voltage comparing output reference voltage. error amplifier drives transistor further continuously control flow current needed sustain steady voltage level across load. Figure 12-2. Series Linear Regulator
VOUT
Error Amplifier
Reference
Table 12-3 shows advantages disadvantages linear regulators compared switching regulators.
Table 12-3. Linear Regulator Advantages Disadvantages Advantages
Requires supporting components cost Requires less board space Quick transient response Better noise drift characteristics electromagnetic interference (EMI) radiation from switching components Tighter regulation
Disadvantages
Less efficient (typically 60%) Higher power dissipation Larger heat sink requirements
minimize difference between input output voltages improve efficiency linear regulators. dropout voltage minimum allowable difference between regulator's input output voltage.
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Cyclone Device Handbook, Volume
Linear regulators available with fixed, variable, single, multiple outputs. Multiple-output regulators generate multiple outputs (e.g., 1.5- 3.3-V outputs). board only 5.0-V power voltage supply, should multiple-output regulators. logic array requires 1.5-V power supply, 3.3-V power supply required interface with 3.3- 5.0-V devices. However, fixed-output regulators have fewer supporting components, reducing board space cost. Figure 12-3 shows example three-terminal, fixed-output linear regulator. Figure 12-3. Three-Terminal, Fixed-Output Linear Regulator
Linear Regulator
Adjustable-output regulators contain voltage divider network that controls regulator's output. Figure 12-4 shows also three-terminal linear regulator adjustable-output configuration. Figure 12-4. Adjustable-Output Linear Regulator
Linear Regulator IADJ VREF VOUT [VREF (IADJ
Switching Voltage Regulators
Step-down switching regulators provide 3.3-V-to-1.5-V conversion with efficiencies. This high efficiency comes from minimizing quiescent current, using low-resistance power MOSFET switch, and, higher-current applications, using synchronous switch reduce diode losses.
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Voltage Regulators
Switching regulators supply power pulsing output voltage current load. Table 12-4 shows advantages disadvantages switching regulators compared linear regulators. more information switching regulators, Step Down Switching Regulators from Linear Technology.
Table 12-4. Switching Regulator Advantages Disadvantages Advantages
Highly efficient (typically >80%) Reduced power dissipation Smaller heat sink requirements Wider input voltage range High power density
Disadvantages
Generates Complex design Requires more supporting components Higher cost Requires more board space
There types switching regulators, asynchronous synchronous. Asynchronous switching regulators have field effect transistor (FET) diode provide current path while (see Figure 12-5). Figure 12-5. Asynchronous Switching Regulator
MOSFET Switch Node VOUT
High-Frequency Circulating Path
LOAD
Synchronous switching regulators have voltage- current-controlled oscillator that controls time MOSFET devices that supply current circuit (see Figure 12-6).
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Cyclone Device Handbook, Volume
Figure 12-6. Voltage-Controlled Synchronous Switching Regulator
Voltage-Controlled Oscillator (VCO)
VOUT
Maximum Output Current
Select external MOSFET switching transistor (optional) based maximum output current that supply. MOSFET with on-resistance voltage rating high enough avoid avalanche breakdown. gate-drive voltages less than 9-V, logic-level MOSFET. logic-level MOSFET only required topologies with controller external MOSFET.
Selecting Voltage Regulators
Your design requirements determine which voltage regulator need. selecting voltage regulator understanding regulator parameters they relate design. following checklist help select proper regulator your design:
require 3.3-V, 2.5-V, 1.5-V output (VOUT)? What precision required regulated 1.5-V supplies (line load regulation)? What supply voltages (VIN VCC) available board? What voltage variance (input voltage range) expected VCC? What maximum (IOUT) required your Altera® device? What maximum current surge (IOUT(MAX)) that regulator will need supply instantaneously?
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Voltage Regulators
Choose Regulator Type
required, select either linear, asynchronous switching, synchronous switching regulator based your output current, regulator efficiency, cost, board-space requirements. DC-to-DC converters have output current capabilities from controller with external MOSFET rated higher current higher-outputcurrent applications.
Calculate Maximum Input Current
following equation estimate maximum input current based output power requirements maximum input voltage:
VOUT IOUT(MAX) VIN(MAX)
IIN,DC(MAX)
Where nominal efficiency: typically switching regulators, linear 2.5-V-to-1.5-V conversion, linear 3.3-V-to-1.5-V conversion, linear 5.0-V-to-1.5-V conversion. Once identify design requirements, select voltage regulator that best your design. Tables 12-5 12-6 list Linear Technology Elantec regulators available time this document published. There more regulators choose from depending your design specification. Contact regulator manufacturer availability.
Table 12-5. Linear Technology 1.5-V Output Voltage Regulators Voltage Regulator
LT1573 LT1083 LT1084 LT1085 LTC1649 LTC1775 Note Table 12-5:
3.3-V requires 3.3-V supply regulator's input 2.5-V supply bias transistors.
Regulator Type
Linear Linear Linear Linear Switching Switching
Total Number Components
IOUT
Special Features
Inexpensive solution Selectable output
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Cyclone Device Handbook, Volume
Table 12-6. Elantec 1.5-V Output Voltage Regulators Voltage Regulator
EL7551C EL7564CM EL7556BC EL7562CM EL7563CM
Regulator Type
Switching Switching Switching Switching Switching
Total Number Components
IOUT
Special Features
Voltage Divider Network
Design voltage divider network using adjustable output regulator. Follow controller converter IC's instructions adjust output voltage.
1.5-V Regulator Circuits
This section contains circuit diagrams voltage regulators discussed this chapter. voltage regulators this section generate 1.5-V power supply. Refer voltage regulator data sheet find detailed specifications. require further information that shown data sheet, contact regulator's vendor. Figures 12-7 through 12-12 show circuit diagrams Linear Technology voltage regulators listed Table 12-5. LT1573 linear voltage regulator converts 2.5-V 1.5-V with output current (see Figure 12-7).
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Voltage Regulators
Figure 12-7. LT1573: 2.5-V-to-1.5-V/6.0-A Linear Voltage Regulator
LT1573 LATCH CTIME SHDN COMP VOUT CIN1 VIN1
DRIVE
Motorola D45H11 VOUT LOAD
VIN2 CIN2 COUT
Notes Figure 12-7:
CIN1 COUT 100-F/10-V surface-mount tantalum capacitors. SHDN (active high) shut down regulator. CTIME 0.5-F capacitor 100-ms time room temperature. CIN2 15-F/10-V surface-mount tantalum capacitor.
adjustable 5.0- 1.5-V regulators (shown Figures 12-8 through 12-10) 3.0- 7.5-A low-cost, low-device-count, board-space-efficient solutions. Figure 12-8. LT1083: 5.0-V-to-1.5-V/7.5-A Linear Voltage Regulator
LT1083
VOUT 1.25
Note Figure 12-8:
This capacitor necessary maintain voltage level input regulator. There could voltage drop input voltage supply away.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
Figure 12-9. LT1084: 5.0-V-to-1.5-V/5.0-A Linear Voltage Regulator
LT1083
VOUT 1.25
Note Figure 12-9:
This capacitor necessary maintain voltage level input regulator. There could voltage drop input voltage supply away.
Figure 12-10. LT1085: 5.0-V-to-1.5-V/3-A Linear Voltage Regulator
LT1084
VOUT 1.25
Note Figure 12-10:
This capacitor necessary maintain voltage level input regulator. There could voltage drop input voltage supply away.
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Voltage Regulators
Figure 12-11 shows high-efficiency switching regulator circuit diagram. selectable resistor network controls output voltage. resistor values Figure 12-11 selected 1.5-V output operation. Figure 12-11. LT1649: 3.3-V-to-1.5-V/15-A Asynchronous Switching Regulator
MBR0530 RIMAX IRF7801 Parallel
3,300 LEXT VOUT 2.16
VCC1 VCC2 LTC1649
IRF7801
SHUTDOWN
SHDN
COMP
12.7
COUT 4,400
MBR0530 0.33
0.01
Notes Figure 12-11:
MBR0530 Motorola device. IRF7801 International Rectifier device. Refer Panasonic 12TS-1R2HL device.
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Cyclone Device Handbook, Volume
Figure 12-12 shows synchronous switching regulator with adjustable outputs. Figure 12-12. LTC1775: 5.0-V-to-1.5-V/5-A Synchronous Switching Regulator
EXTVCC SYNC
FDS8936A VOUT COUT
INTVCC
RUN/SS
BOOST
0.22 CMDSH-3
SGND
INTVCC
MBRS140
VOSENSE VPROG
PGND
CVCC
FDS8936A
OPEN
Notes Figure 12-12:
This KEMETT495X156M035AS capacitor. This Sumida CDRH127-6R1 inductor. This KEMETT510X687K004AS capacitor.
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Voltage Regulators
Figures 12-13 through 12-17 show circuit diagrams Elantec voltage regulators listed Table 12-6. Figures 12-13 through 12-15 show switching regulator that converts 5.0-V 1.5-V with different output current. Figure 12-13. EL7551C: 5.0-V-to-1.5-V/1-A Synchronous Switching Regulator
SGND
PGND
COSC PGND PGND VDRV VREF
Ceramic
EL7551C PGND
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Cyclone Device Handbook, Volume
Figure 12-14. EL7564CM: 5.0-V-to-1.5-V/4-A Synchronous Switching Regulator
VREF SGND 0.22 VDRV COSC
0.22
PGND PGND
EL7564CM
PGND PGND PGND
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Altera Corporation January 2007
Voltage Regulators
Figure 12-15. EL7556BC: 5.0-V-to-1.5-V/6-A Synchronous Switching Regulator
CREF Optional (3), 0.22
CSLOPE COSC
VSSP VSSP VSSP VSSP VSSP VCC2DET OUTEN EL7556BC
VSSP VSSP
39.2
VOUT
TEST PWRGD
Notes Figures 12-13 -12-15:
These capacitors ceramic capacitors. These capacitors ceramic tantalum capacitor. These BAT54S fast diodes. only required EL7556ACM. This Sprague 293D337X96R3 2X330F capacitor. This Sprague 293D337X96R3 3X330F capacitor.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
Figures 12-16 12-17 show switching regulator that converts with different output currents. Figure 12-16. EL7562CM: 3.3-V 1.5-V/2-A Synchronous Switching Regulator
SGND
PGND
COSC PGND
VREF
VDRV
PGND
PGND
VOUT
EL7562CM
Figure 12-17. EL7563CM: 3.3-V 1.5-V/4-A Synchronous Switching Regulator
VREF SGND
0.22 COSC
VDRV
0.22
0.22
PGND PGND
PGND PGND PGND
VOUT
EL7563CM
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Altera Corporation January 2007
1.5-V Regulator Application Examples
1.5-V Regulator Application Examples
following sections show process used select voltage regulator three sample designs. regulator selection based amount power that Cyclone device consumes. There variables consider when selecting voltage regulator. following variables apply Cyclone device power consumption:
fMAX Output bidirectional pins Average toggle rate pins (togIO) Average toggle rate logic elements (LEs) (togLC) User-mode consumption Maximum power-up ICCINT requirement Utilization VCCIO supply level VCCINT supply level
following variables apply voltage regulator:
Output voltage precision requirement Supply voltage board Voltage supply output current Variance board supply Efficiency
Different designs have different power consumptions based variables listed. Once calculate Cyclone device's power consumption, must consider much current Cyclone device needs. Cyclone power calculator (available www.altera.com) PowerGaugetool Quartus software determine current needs. Also check maximum power-up current requirement listed Power Consumption section Cyclone FPGA Family Data Sheet because power-up current requirement exceed user-mode current consumption specific design. Once determine minimum current Cyclone device requires, must select voltage regulator that generate desired output current with voltage current supply that available board using variables listed this section. example shown illustrate voltage regulator selection process.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
Synchronous Switching Regulator Example
This example shows worst-case scenario power consumption where design uses RAM. Table 12-7 shows design requirements 1.5-V design using Cyclone EP1C12 FPGA.
Table 12-7. Design Requirements Example EP1C12F324C Design Requirement
Output voltage precision requirement Supply voltages available board Voltage supply output current available this section Variance board supply (VIN) fMAX Average togIO Average togLC Utilization Output bidirectional pins VCCIO supply level VCCINT supply level Efficiency 12.5% 12.5% 100%
Value
Table 12-8 uses checklist page 12-8 help select appropriate voltage regulator.
Table 12-8. Voltage Regulator Selection Process EP1C12F324C Design (Part
Output voltage requirements Supply voltages Supply variance from Linear Technology data sheet Estimated Cyclone Power Calculator Estimated regulator powers Cyclone Power Calculator (not applicable this example because Total user-mode current consumption VOUT Supply variance ICCINT ICCIO
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Altera Corporation January 2007
Board Layout
Table 12-8. Voltage Regulator Selection Process EP1C12F324C Design (Part
EP1C12 maximum power-up current requirement Power Consumption section Cyclone FPGA Family Data Sheet other densities Maximum output current required Compare with Voltage regulator selection Linear Technology 1649 data sheet Intersil (Elantec) EL7562C data sheet
LTC1649 EL7562C
LTC1649
Nominal efficiency Line load regulation Line regulation load regulation (0.17 mV)/ 100% Minimum input voltage (VIN(MIN)) (VIN(MIN)) VIN(1 VIN) 3.3V(1 0.05) Maximum input current IIN, DC(MAX) (VOUT VIN(MIN)) Nominal efficiency Line Load Regulation 0.478%
(VIN(MIN)) 3.135 IIN, DC(MAX)
EL7562C
Nominal efficiency Line load regulation Line regulation load regulation (0.17 mV)/ 100% Minimum input voltage (VIN(MIN)) (VIN(MIN)) VIN(1 VIN) 3.3V(1 0.05) Maximum input current IIN, DC(MAX) (VOUT VIN(MIN)) Nominal efficiency Line Load Regulation 0.5% (VIN(MIN)) 3.135 IIN, DC(MAX)
Board Layout
Laying printed circuit board (PCB) properly extremely important high-frequency (100 kHz) switching regulator designs. poor layout results increased ground bounce, which affects reliability voltage regulator obscuring important voltage current feedback signals. Altera recommends using Gerber files predesigned layout filessupplied regulator vendor your board layout. cannot supplied layout files, contact voltage regulator vendor help re-designing board your design requirements while maintaining proper functionality.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
Altera recommends that separate layers signals, ground plane, voltage supply planes. support separate layers using multi-layer PCBs, assuming using signal layers. Figure 12-18 shows regulators generate 1.5-V 2.5-V power supplies system needs power supply systems. regulator used each power supply. Figure 12-18. Regulator Solution Systems that Require 5.0-V, 2.5-V 1.5-V Supply Levels
Regulator
1.5-V Device
Altera Cyclone FPGA Regulator 2.5-V Device
Figure 12-19 shows single regulator generate different power supplies (1.5-V 2.5-V). single regulator generate 1.5-V 2.5-V supplies from 5.0-V power supply minimize board size thus save cost.
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Altera Corporation January 2007
Board Layout
Figure 12-19. Single Regulator Solution Systems that Require 5.0-V, 2.5-V 1.5-V Supply Levels
1.5-V Device Regulator Altera Cyclone FPGA
2.5-V Device
Split-Plane Method
split-plane design method reduces number planes required placing power supply planes plane (see Figure 12-20). example, layout this method structured follows:
2.5-V plane, covering entire board plane split between 5.0-V 1.5-V
This technique assumes that majority devices 2.5-V. support MultiVolt I/O, Altera devices must have access 1.5-V 2.5-V planes.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
Figure 12-20. Split Board Layout 2.5-V Systems With 5.0-V 1.5-V Devices
2.5-V Device
5.0-V Device
1.5-V Device
5.0-V Device
Regulator
Altera Cyclone FPGA (1.5
2.5-V Device
2.5-V Device
1.5-V Device
2.5-V Device
Conclusion
With proliferation multiple voltage levels systems, important design voltage system that support low-power device like Cyclone devices. Designers must consider elements PCB, such power supplies, regulators, power consumption, board layout when successfully designing system that incorporates lowvoltage Cyclone family devices. Linear Technology Corporation. Application Note (Step-Down Switching Regulators). Milpitas: Linear Technology Corporation, 1989. Linear Technology Corporation. LT1573 Data Sheet (Low Dropout Regulator Driver). Milpitas: Linear Technology Corporation, 1997. Linear Technology Corporation. LT1083/LT1084/LT1085 Data Sheet (7.5 Dropout Positive Adjustable Regulators). Milpitas: Linear Technology Corporation, 1994. Linear Technology Corporation. LTC1649 Data Sheet (3.3V Input High Power Step-Down Switching Regulator Controller). Milpitas: Linear Technology Corporation, 1998.
References
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Altera Corporation January 2007
Document
Linear Technology Corporation. LTC1775 Data Sheet (High Power Rsense Current Mode Synchronous Step-Down Switching Regulator). Milpitas: Linear Technology Corporation, 1999. Intersil Corporation. EL7551C Data Sheet (Monolithic DC:DC StepDown Regulator). Milpitas: Intersil Corporation, 2002. Intersil Corporation. EL7564C Data Sheet (Monolithic DC:DC StepDown Regulator). Milpitas: Intersil Corporation, 2002. Intersil Corporation. EL7556BC Data Sheet (Integrated Adjustable Synchronous Switcher). Milpitas: Intersil Corporation, 2001. Intersil Corporation. EL7562C Data Sheet (Monolithic DC:DC StepDown Regulator). Milpitas: Intersil Corporation, 2002. Intersil Corporation. EL7563C Data Sheet (Monolithic DC:DC StepDown Regulator). Milpitas: Intersil Corporation, 2002.
Document
Table 12-9 shows revision history this document.
Table 12-9. Document Revision History Date Document Version
January 2007 v1.3 August 2005 v1.1 July 2003 v1.0 2003 v1.0
Changes Made
Added document revision history. Removed references Stratix "Introduction" "Power Sequencing Socketing" sections.
Summary Changes
Minor updates. Minor updates. Added document Cyclone Device Handbook.
Altera Corporation January 2007
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Cyclone Device Handbook, Volume
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Altera Corporation January 2007

Chapter Implementing Double Data Rate Signaling Cyclone Devices Chapte

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