CF52008-2.2 mixture Stratix® series, Cyclone® series, APEXII, Mer

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CF52008-2.2 mixture Stratix® series, Cyclone® series, APEXII, Mer

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Configuring Mixed Altera FPGA Chains
CF52008-2.2
mixture Stratix® series, Cyclone® series, APEXII, MercuryTM, APEX 20K, ACEX® FLEX® devices configured same configuration chain, provided that devices chain support selected configuration method, such passive serial (PS). This chapter discusses guidelines should follow when combining different device families same configuration chain. devices your configuration chain require 10-k pull-up resistors, external 10-k pull-up resistors should used support devices chain. pull-up resistors should tied supply that provides acceptable input voltage high level devices chain. DCLK, DATA0, nCONFIG, nSTATUS, CONF_DONE signals should tied together every device configuration chain. concurrent configuration using enhanced configuration devices, each device chain devices separate DCLK line, while DCLK, nCONFIG, nSTATUS, CONF_DONE shared. This ensures that configuration begins ends same time each device. Additionally, device detects error pulls nSTATUS low, devices chain will reset restart configuration.
General Guidelines
more information about connecting configuration control signals together, refer "Board Layout Tips Debugging Techniques" page 10-1 Configuration Handbook. FPGA configuration device that supports JTAG programming placed same JTAG chain. multi-device JTAG chains, external resistors should used TCK, TDI, pins. pull-up resistors should pulled supply that provides acceptable input voltage high level devices chain. interface signals JTAG pins Altera devices that have different VCCIO levels, need insert level shifters. will need insert level shifters tolerant voltage driven previous device's pin. example, first device JTAG chain back where VCCIO 5.0-V second device bank where VCCIO 1.8-V cannot accept 5.0-V inputs, need insert level shifter in-between devices' TDO-TDI interface.
Altera Corporation April 2007
Guidelines Configuration Chains with APEX 20KE Devices
Additionally, will need insert level shifters will recognize voltage driven previous device's input voltage high level (VIH). example, first device JTAG chain back where VCCIO 1.8-V second device bank where VCCIO 5.0-V does recognize 1.8-V logic high level, need insert level shifter in-between devices' TDO-TDI interface.
Guidelines Configuration Chains with APEX 20KE Devices
your configuration chain contains APEX 20KE device(s), must follow APEX 20KE power sequencing requirement outlined Configuring APEX 20KE APEX 20KC Devices Chapter Configuration Handbook. guidelines below should followed successful configuration your configuration chain with APEX 20KE Devices:
configuration schemes, 10-k pull-up resistors nCONFIG, nSTATUS, CONF_DONE. configuration schemes, ensure nCONFIG held upon power-up until both VCCINT VCCIO power supplies stable. using configuration device, nCONFIG must pulled-up VCCINT APEX 20KE device. using nINIT_CONF enhanced configuration device EPC2 device, need isolate 1.8-V VCCINT from configuration device's 3.3-V supply adding diode between nCONFIG nINIT_CONF pin.
Configuration Handbook, Volume
Altera Corporation April 2007
Configuring Mixed Altera FPGA Chains
Document Revision History
Table shows revision history this document.
Table 8-1. Document Revision History Date Document Version
April 2007 v2.2 August 2005 v2.1 July 2004 v2.0 September 2003 v1.0
Changes Made
Added document revision history. Removed active cross references refering document outside Chapter Added Stratix Cyclone device information throughout chapter. Initial Release.
Summary Changes
Altera Corporation April 2007
Configuration Handbook, Volume
Document Revision History
Configuration Handbook, Volume
Altera Corporation April 2007

CF52008-2.2 mixture Stratix® series, Cyclone® series, APEXII, Mer

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