AGX52014-1.0 This chapter provides package information Altera® Ar

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AGX52014-1.0 This chapter provides package information Altera® Ar

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Package Information Arria Devices
AGX52014-1.0
This chapter provides package information Altera® ArriaGX devices, including:
Device package cross reference Thermal resistance values Package outlines
Tables 14-1 shows which Altera Arria devices, respectively, available FineLine BGA® (FBGA) packages.
Table 14-1. Arria Devices FBGA Packages Device
EP1AGX20 Flip-chip FBGA Flip-chip FBGA EP1AGX35 Flip-chip FBGA Flip-chip FBGA EP1AGX50 Flip-chip FBGA Flip-chip FBGA Flip-chip FBGA EP1AGX60 Flip-chip FBGA Flip-chip FBGA Flip-chip FBGA EP1AGX90 Flip-chip FBGA
Package
Pins
1152 1152 1152
Altera Corporation 2007
14-1
Package Outlines
Thermal Resistance
Thermal resistance values Arria devices provided board that meets JDEC specifications typical board. following values provided:
(°C/W) still air-Junction-to-ambient thermal resistance with flow when heat sink used. (°C/W) ft./min.-Junction-to-ambient thermal resistance with ft./min. airflow when heat sink used. (°C/W) ft./min.-Junction-to-ambient thermal resistance with ft./min. airflow when heat sink used. (°C/W) ft./min.-Junction-to-ambient thermal resistance with ft./min. airflow when heat sink used. JC-Junction-to-case thermal resistance device. JB-Junction-to-board thermal resistance device.
Table 14-2 provides (junction-to-ambient thermal resistance), (junction-to-case thermal resistance), (junction-to-board thermal resistance) values Arria devices.
Table 14-2. Arria Device Thermal Resistance Device
EP1AGX20
Count
Package
FBGA FBGA FBGA FBGA FBGA FBGA FBGA FBGA FBGA FBGA FBGA
C/W) Still
12.8 11.1 12.8 11.1 12.7 10.9 12.7 10.9
C/W) ft./min.
10.3 10.3 10.2 10.2
C/W) C/W) C/W) C/W) ft./min. ft./min.
0.24 0.24 0.15 0.15 0.15 0.15 0.11 3.14 3.14 3.14 3.14 2.86 2.84 2.86 2.84 2.33
EP1AGX35
EP1AGX50
1152
EP1AGX60
1152
EP1AGX90
1152
Package Outlines
package outlines listed order ascending count. Altera package outlines meet requirements JEDEC Publication
14-2 Arria Device Handbook, Volume
Altera Corporation 2007
Package Information Arria Devices
484-Pin FBGA Flip Chip
dimensions tolerances conform ASME Y14.5M 1994. Controlling dimension millimeters. indicated dot, special feature, proximity package surface.
Tables 14-3 14-4 show package information package outline figure references, respectively, 484-pin FBGA packaging.
Table 14-3. 484-Pin FBGA Package Information Description
Ordering code reference Package acronym Substrate material Solder ball composition JEDEC outline reference Maximum lead coplanarity Weight Moisture sensitivity level FBGA Regular: 63Sn:37Pb (Typ.) Pb-free: Sn:3Ag:0.5Cu (Typ.) MS-034 variation: AAJ-1 0.008 inches (0.20 Printed moisture barrier
Specification
Table 14-4. 484-Pin FBGA Package Outline Dimensions Millimeter Symbol Min.
0.50 0.30 0.25
Nom.
23.00 23.00 0.60 1.00
Max.
3.50 3.00 2.50
0.70
Altera Corporation 2007
14-3 Arria Device Handbook, Volume
Package Outlines
Figure 14-1 shows package outline 484-pin FineLine packaging. Figure 14-1. 484-Pin FBGA Package Outline
VIEW
BOTTOM VIEW
Corner
14-4 Arria Device Handbook, Volume
Altera Corporation 2007
Package Information Arria Devices
780-Pin FBGA Flip Chip
Arria Device Handbook, Volume 2All dimensions tolerances conform ASME Y14.5M 1994. Controlling dimension millimeters. indicated dot, special feature, proximity package surface.
Tables 14-5 14-6 show package information package outline figure references, respectively, 780-pin FBGA packaging.
Table 14-5. 780-Pin FBGA Package Information Description
Ordering code reference Package acronym Substrate material Solder ball composition JEDEC outline reference Maximum lead coplanarity Weight Moisture Sensitivity Level FBGA Regular: 63Sn:37Pb (Typ.) Pb-free: Sn:3Ag:0.5Cu (Typ.) MS-034 variation: AAM-1
Specification
0.008 inches (0.20 11.9 Printed moisture barrier
Table 14-6. 780-Pin FBGA Package Outline Dimensions Millimeters Symbol Min.
0.50 0.30 0.25
Nom.
29.00 29.00 0.60 1.00
Max.
3.50 3.00 2.50
0.70
Altera Corporation 2007
14-5 Arria Device Handbook, Volume
Package Outlines
Figure 14-2 shows package outline 780-pin FineLine packaging. Figure 14-2. 780-Pin FBGA Package Outline
VIEW
BOTTOM VIEW
Corner
14-6 Arria Device Handbook, Volume
Altera Corporation 2007
Package Information Arria Devices
1,152-Pin FBGA Flip Chip
dimensions tolerances conform ASME Y14.5M 1994. Controlling dimension millimeters. indicated dot, special feature, proximity package surface.
Tables 14-7 14-8 show package information package outline figure references, respectively, 1,152-pin FBGA packaging.
Table 14-7. 1,152-Pin FBGA Package Information Description
Ordering code reference Package acronym Substrate material Solder ball composition JEDEC outline reference Maximum lead coplanarity Weight Moisture sensitivity level FBGA Regular: 63Sn:37Pb (Typ.) Pb-free: Sn:3Ag:0.5Cu (Typ.) MS-034 variation: AAR-1
Specification
0.008 inches (0.20 15.8 Printed moisture barrier
Table 14-8. 1,152-Pin FBGA Package Outline Dimensions Millimeters Symbol Min.
0.50 0.30 0.25
Nom.
35.00 35.00 0.60 1.00
Max.
3.50 3.00 2.50
0.70
Altera Corporation 2007
14-7 Arria Device Handbook, Volume
Document Revision History
Figure 14-3 shows package outline 1,152-pin FineLine packaging. Figure 14-3. 1,152-Pin FBGA Package Outline
VIEW
BOTTOM VIEW
Corner
Document Revision History
Table 14-9 shows revision history this document.
Table 14-9. Document Revision History Date Document Version
2007 v1.0
Changes Made
Initial Release
Summary Changes
14-8 Arria Device Handbook, Volume
Altera Corporation 2007

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