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DeCypher DHM8100A

November / 2006

PRODUCT INFORMATION
DeCypher DHM8100A
November / 2006
DeCypher DHM8100A High Definition Multi-Format Decoder SoC
The DeCypher DHM8100A is a high-definition streaming media decoder with support for H.264 / AVC, VC-1, MPEG-2 and MPEG4 video decoding. The highly integrated System on Chip also features an advanced Digital Rights Management (DRM) engine, networking support and multiple MIPS32® processors. The DHM8100A is an ideal solution for next generation IP STB, Digital TV, Blu-ray DVD Player and HD-DVD Player, Digital Media Adapter. N High-performance 32-bit unified memory interface N Full 32-bit graphics engine with advanced video and graphics scaler
Host Processor
N 32 KB I&D Cache N MIPS32® 24KE processor (333MHz) N MIPS16e code compression N Memory Manager Unit (MMU)
Video Decoding Formats
N VC-1 AP@L3 N AVC HP@L4.1 (with redundant slices)
Security
N AES 128, 192, and 256 bits N CSS descrambling N DES / 3DES
Main Features
N Single chip solution supports H.264 / AVC, VC-1, MPEG-4 and MPEG-2 video formats N Advanced DRM engine includes dedicated processor with integrated AES, 3 / DES, RC4, and OTP memory N Simultaneous decode and display of one HD and one SD stream N Integrated HDMI transmitter with HDCP
N MPEG-4 ASP@L5 (no global motion compensation (GMC), data partition, or OBMC) N MPEG-2 MP@HL and MP@ML
Audio Decoding Formats
N Microsoft® WMA and WMA Pro N Dolby Digital® (AC-3)
N Microsoft® WMDRM N Three 256-bit OTPs
N Microsoft® Block Cipher
N MPEG-1 / 2 Layer I, II, and III (MP3)
N MPEG-4 AAC Low Complexity and High Efficiency
PRODUCT INFORMATION
DeCypher DHM8100A
Applications
N Next Generation DVD Player (HD-DVD or Blu-Ray) N Integrated Digital TV (IDTV) N Digital Media Adapter N IP Set-Top Box
November / 2006
N Networked Digital TV (nDTV)
Architecture
Fig. 1: Block Diagram of the DeCypher DHM8100A
All information and data contained in this product information are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. Product or development sample availability and delivery are exclusively subject to our respective order confirmation form. By this publication, Micronas USA, Inc. does not assume responsibility for patent infringements or other rights of third parties which may result from its use.
No part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of Micronas USA, Inc. Edition Nov. 2, 2006 Order No. 6251-696-1-5PI
Micronas USA, Inc. 2805 Mission College Blvd. Santa Clara, CA 95054-1838 USA t: +1-408-625-1200 · f: +1-408-625-1299 · http://support.micronasusa.com · www.micronasusa.com