Data Sheet June 2006 FN662.5 High Frequency Transistor Array

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Data Sheet June 2006 FN662.5 High Frequency Transistor Array

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CA3127
Data Sheet June 2006 FN662.5
High Frequency Transistor Array
CA3127 consists five general purpose silicon transistors common monolithic substrate. Each completely isolated transistors exhibits noise value excess 1GHz, making CA3127 useful from 500MHz. Access provided each terminals individual transistors separate substrate connection been provided maximum application flexibility. monolithic construction CA3127 provides close electrical thermal matching five transistors.
Features
Gain Bandwidth Product (fT) >1GHz Power Gain 30dB (Typ) 100MHz Noise Figure. 3.5dB (Typ) 100MHz Five Independent Transistors Common Substrate Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Amplifiers Multifunction Combinations RF/Mixer/Oscillator Sense Amplifiers
Ordering Information
PART NUMBER CA3127M CA3127MZ (Note) PART MARKING CA3127 CA3127MZ TEMP. RANGE (°C) PACKAGE SOIC SOIC (Pb-free) PKG. DWG. M16.15 M16.15
Synchronous Detectors Mixers Converter Amplifiers Synthesizers Cascade Amplifiers
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pb-free peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020.
Pinout
CA3127 (SOIC) VIEW
SUBSTRATE
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL or1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2006. Rights Reserved. other trademarks mentioned property their respective owners.
CA3127
Absolute Maximum Ratings
following ratings apply each transistor device Collector-to-Emitter Voltage, VCEO .15V Collector-to-Base Voltage, VCBO .20V Collector-to-Substrate Voltage, VCIO (Note .20V Collector Current, 20mA
Thermal Information
Thermal Resistance (Typical, Note
(°C/W)
Operating Conditions
Temperature Range. .-55°C 125°C
SOIC Package Maximum Power Dissipation, (Any Transistor). .85mW Maximum Junction Temperature (Die) 175°C Maximum Junction Temperature (Plastic Packages) 150°C Maximum Storage Temperature Range -65°C 150°C Maximum Lead Temperature (Soldering 10s) 300°C (SOIC Lead Tips Only)
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: collector each transistor CA3127 isolated from substrate integral diode. substrate (Terminal must connected most negative point external circuit maintain isolation between transistors provide normal transistor action. measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER
25°C TEST CONDITIONS UNITS
CHARACTERISTICS (For Each Transistor) Collector-to-Base Breakdown Voltage Collector-to-Emitter Breakdown Voltage Collector-to-Substrate Breakdown-Voltage Emitter-to-Base Breakdown Voltage (Note Collector-Cutoff-Current Collector-Cutoff-Current Forward-Current Transfer Ratio 10µA, 1mA, 10µA, 10µA, 10V, 0.1mA Base-to-Emitter Voltage 0.1mA Collector-to-Emitter Saturation Voltage Magnitude Difference Magnitude Difference DYNAMIC CHARACTERISTICS Noise Figure Gain-Bandwidth Product Collector-to-Base Capacitance Collector-to-Substrate Capacitance Emitter-to-Base Capacitance Voltage Gain Power Gain Noise Figure 100kHz, 500, 1MHz 1MHz 1MHz 10MHz, Cascode Configuration 100MHz, 12V, 1.15 Fig. 10mA, Matched 0.71 0.66 0.60 0.81 0.76 0.70 0.26 0.91 0.86 0.80 0.50
FN662.5 June 2006
CA3127
Electrical Specifications
PARAMETER Input Resistance Output Resistance Input Capacitance Output Capacitance Magnitude Forward Transadmittance NOTE: When used zener reference voltage, device must subjected more than 0.1mJ energy from possible capacitance electrostatic discharge order prevent degradation junction. Maximum operating zener current should less than 10mA. 25°C TEST CONDITIONS Common-Emitter Configuration 1mA, UNITS
Test Circuits
BIAS-CURRENT
0.01
0.01µF 0.01 470pF 470pF
FIGURE VOLTAGE-GAIN TEST CIRCUIT USING CURRENT-MIRROR BIASING
SHIELD 1000pF 0.3µH 1.8pF (NOTE 1000 1000 +12V 1000 1000 TEST POINT (NOTE 0.47µH
NOTES: This circuit chosen because conveniently represents close approximation performance properly unilateralized single transistor this type. current-mirror configuration facilitates simplified biasing. cascode circuit implies that transistors cannot used individually. E.F. Johnson number 160-104-1 equivalent.
OHMITE Z144
FIGURE 100MHz POWER-GAIN NOISE-FIGURE TEST CIRCUIT
FN662.5 June 2006
CA3127
GENERAL RADIO 1021-P1 100MHz GENERATOR
ATTN
100MHz TEST
BOONTON VOLTMETER
12VDC POWER SUPPLY
FIGURE POWER GAIN SET-UP
NOISE SOURCE HEWLETT PACKARD HP343A
100MHz TEST
100MHz POST AMPLIFIER
NOISE FIGURE METER HEWLETT PACKARD HP342A
12VDC POWER SUPPLY
15VDC POWER SUPPLY
FIGURE NOISE FIGURE SET-UP FIGURE BLOCK DIAGRAMS POWER-GAIN NOISE-FIGURE TEST SET-UPS
Typical Performance Curves
25°C RSOURCE 10Hz 25°C RSOURCE 10Hz 100Hz
NOISE FIGURE (dB)
NOISE FIGURE (dB)
100Hz
10kHz
1kHz
1kHz 10kHz 100kHz
100kHz 0.01 COLLECTOR CURRENT (mA) 0.01 COLLECTOR CURRENT (mA)
FIGURE NOISE FIGURE COLLECTOR CURRENT
FIGURE NOISE FIGURE COLLECTOR CURRENT
FN662.5 June 2006
CA3127 Typical Performance Curves
(Continued)
BASE-TO-EMITTER VOLTAGE
25°C GAIN-BANDWIDTH PRODUCT (GHz)
-55°C 125°C 25°C
COLLECTOR CURRENT (mA)
COLLECTOR CURRENT (mA)
FIGURE GAIN-BANDWIDTH PRODUCT COLLECTOR CURRENT
FIGURE BASE-TO-EMITTER VOLTAGE COLLECTOR CURRENT
25°C 1MHz 2.25 2.00 CAPACITANCE (pF) 1.75 1.50 1.25 1.00 0.75 0.50 0.25
CAPACITANCE (pF)
TRANSISTOR
TOTAL TOTAL TOTAL TOTAL
BIAS
BIAS VOLTAGE
0.025 0.190 0.090 0.125 0.365 0.610 0.475 1.65 0.015 0.170 0.225 0.265 0.130 0.360 0.085 1.35 0.040 0.200 0.215 0.240 0.360 0.625 0.210 1.40 0.040 0.190 0.225 0.270 0.365 0.610 0.085 1.25 0.010 0.165 0.095 0.115 0.140 0.365 0.090 1.35
FIGURE CAPACITANCE BIAS VOLTAGE
FIGURE TYPICAL CAPACITANCE VALUES 1MHz. THREE TERMINAL MEASUREMENT. GUARD TERMINALS EXCEPT THOSE UNDER TEST.
FN662.5 June 2006
CA3127 Typical Performance Curves
VOLTAGE GAIN (dB) 100M FREQUENCY (Hz) 0.2mA 0.5mA VOLTAGE GAIN (dB) 25°C, TEST CIRCUIT FIGURE
(Continued)
25°C, TEST CIRCUIT FIGURE 100M FREQUENCY (Hz) 0.5mA 0.2mA
FIGURE VOLTAGE GAIN FREQUENCY FIGURE VOLTAGE GAIN FREQUENCY
FORWARD CURRENT TRANSFER RATIO
25°C INPUT CONDUCTANCE (g11) SUSCEPTANCE (b11) (mS) 100M FREQUENCY (Hz) 25°C,
COLLECTOR CURRENT (mA)
FIGURE FORWARD-CURRENT TRANSFER RATIO (hFE) COLLECTOR CURRENT
FIGURE INPUT ADMITTANCE (Y11) FREQUENCY
FN662.5 June 2006
CA3127 Typical Performance Curves
(Continued)
OUTPUT CONDUCTANCE (g22) (mS)
25°C 200MHz INPUT CONDUCTANCE (g11) SUSCEPTANCE (b11) (mS) COLLECTOR CURRENT (mA)
100M
FREQUENCY (Hz)
FIGURE INPUT ADMITTANCE (Y11) COLLECTOR CURRENT
FIGURE OUTPUT ADMITTANCE (Y22) FREQUENCY
MAGNITUDE FORWARD TRANSADMITTANCE (|Y21|) (mS)
OUTPUT CONDUCTANCE (g22) (mS)
25°C 200MHz 0.400 0.375 0.350 0.325 0.300 0.275 0.250 0.225 0.200 0.175
25°C OUTPUT SUSCEPTANCE (b22) (mS) |Y21| 200MHz PHASE-ANGLE FORWARD TRANSADMITTANCE (|21|)
COLLECTOR CURRENT (mA)
-100 COLLECTOR CURRENT (mA)
FIGURE OUTPUT ADMITTANCE (Y22) COLLECTOR CURRENT
FIGURE FORWARD TRANSADMITTANCE (Y21) COLLECTOR CURRENT
FN662.5 June 2006
OUTPUT SUSCEPTANCE (b22) (mS)
25°C
CA3127 Typical Performance Curves
(Continued)
25°C MAGNITUDE FORWARD TRANSADMITTANCE (|Y21|) (mS)
MAGNITUDE REVERSE TRANSADMITTANCE (|Y12|) (mS) PHASE-ANGLE FORWARD TRANSADMITTANCE (|21|)
200MHz
-100 -110 -120 -130 -140
100M
|Y21|
-100
|Y12| 0.21
150M 200M FREQUENCY (Hz)
-150 COLLECTOR CURRENT (mA)
FIGURE FORWARD TRANSADMITTANCE (Y21) FREQUENCY
FIGURE REVERSE TRANSADMITTANCE (Y12) COLLECTOR CURRENT
25°C MAGNITUDE REVERSE TRANSADMITTANCE (|Y12|) (mS) 100M |Y12| -100 -105 -110 -115 -120 FREQUENCY (Hz) PHASE-ANGLE REVERSE TRANSADMITTANCE (|12|)
FIGURE REVERSE TRANSADMITTANCE (Y12) FREQUENCY
FN662.5 June 2006
PHASE-ANGLE REVERSE TRANSADMITTANCE (|12|)
25°C
CA3127 Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M16.15 (JEDEC MS-012-AC ISSUE
LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 1.35 0.10 0.33 0.19 9.80 3.80 1.75 0.25 0.51 0.25 10.00 4.00 NOTES Rev. 6/05
0.0532 0.0040 0.013 0.0075 0.3859 0.1497
0.0688 0.0098 0.020 0.0098 0.3937 0.1574
0.10(0.004)
0.050 0.2284 0.0099 0.016 0.2440 0.0196 0.050
1.27 5.80 0.25 0.40 6.20 0.50 1.27
0.25(0.010)
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch). Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
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Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
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FN662.5 June 2006

Data Sheet June 2006 FN662.5 High Frequency Transistor Array

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